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From: Peter Zijlstra <peterz@infradead.org>
To: "Liang, Kan" <kan.liang@intel.com>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"mingo@kernel.org" <mingo@kernel.org>,
	"acme@infradead.org" <acme@infradead.org>,
	"eranian@google.com" <eranian@google.com>,
	"andi@firstfloor.org" <andi@firstfloor.org>
Subject: Re: [PATCH V6 3/6] perf, x86: large PEBS interrupt threshold
Date: Wed, 15 Apr 2015 20:41:15 +0200	[thread overview]
Message-ID: <20150415184115.GX21418@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <37D7C6CF3E00A74B8858931C1DB2F077017C733A@SHSMSX103.ccr.corp.intel.com>

On Wed, Apr 15, 2015 at 06:35:48PM +0000, Liang, Kan wrote:
> 
> > 
> > On Thu, Apr 09, 2015 at 12:37:43PM -0400, Kan Liang wrote:
> > > @@ -280,8 +280,9 @@ static int alloc_pebs_buffer(int cpu)
> > >  	ds->pebs_absolute_maximum = ds->pebs_buffer_base +
> > >  		max * x86_pmu.pebs_record_size;
> > >
> > > -	ds->pebs_interrupt_threshold = ds->pebs_buffer_base +
> > > -		thresh * x86_pmu.pebs_record_size;
> > > +	if (x86_pmu.intel_cap.pebs_format < 1)
> > > +		ds->pebs_interrupt_threshold = ds->pebs_buffer_base +
> > > +			x86_pmu.pebs_record_size;
> > >
> > >  	return 0;
> > >  }
> > 
> > I can't seem to figure out what this is about.. help?
> 
> We move AUTO_RELOAD and large PEBS check to intel_pmu_hw_config.
> But for earlier platform, it calls x86_pmu_hw_config.
> So we force single PEBS record for old platform.

We're talking about intel_pmu vs core_pmu right? I don't think core_pmu
supports PEBS at all.

  reply	other threads:[~2015-04-15 18:41 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-04-09 16:37 [PATCH V6 0/6] large PEBS interrupt threshold Kan Liang
2015-04-09 16:37 ` [PATCH V6 1/6] perf, x86: use the PEBS auto reload mechanism when possible Kan Liang
2015-04-09 16:37 ` [PATCH V6 2/6] perf, x86: introduce setup_pebs_sample_data() Kan Liang
2015-04-09 16:37 ` [PATCH V6 3/6] perf, x86: large PEBS interrupt threshold Kan Liang
2015-04-15 17:14   ` Peter Zijlstra
2015-04-15 17:48     ` Liang, Kan
2015-04-15 18:10       ` Peter Zijlstra
2015-04-15 18:05   ` Peter Zijlstra
2015-04-15 18:35     ` Liang, Kan
2015-04-15 18:41       ` Peter Zijlstra [this message]
2015-04-16 18:45   ` Peter Zijlstra
2015-04-09 16:37 ` [PATCH V6 4/6] perf, x86: handle multiple records in PEBS buffer Kan Liang
2015-04-09 21:01   ` Andi Kleen
2015-04-15 18:28   ` Peter Zijlstra
2015-04-15 18:36   ` Peter Zijlstra
2015-04-16 12:53   ` Peter Zijlstra
2015-04-17  8:11     ` Peter Zijlstra
2015-04-17 12:50       ` Liang, Kan
2015-04-17 13:12         ` Peter Zijlstra
2015-04-17 14:19           ` Liang, Kan
2015-04-17 14:44             ` Peter Zijlstra
2015-04-17 18:20               ` Andi Kleen
2015-04-17 18:25                 ` Peter Zijlstra
2015-04-09 16:37 ` [PATCH V6 5/6] perf, x86: drain PEBS buffer during context switch Kan Liang
2015-04-09 16:37 ` [PATCH V6 6/6] perf, x86: enlarge PEBS buffer Kan Liang

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