From: Peter Zijlstra <peterz@infradead.org>
To: Kan Liang <kan.liang@intel.com>
Cc: linux-kernel@vger.kernel.org, mingo@kernel.org,
acme@infradead.org, eranian@google.com, andi@firstfloor.org
Subject: Re: [PATCH V6 4/6] perf, x86: handle multiple records in PEBS buffer
Date: Fri, 17 Apr 2015 10:11:00 +0200 [thread overview]
Message-ID: <20150417081100.GZ24151@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <20150416125342.GZ23123@twins.programming.kicks-ass.net>
On Thu, Apr 16, 2015 at 02:53:42PM +0200, Peter Zijlstra wrote:
> When the PEBS interrupt threshold is larger than one record and the
> machine supports multiple PEBS events, the records of these events are
> mixed up and we need to demultiplex them.
>
> Demuxing the records is hard because the hardware is deficient. The
> hardware has two issues that, when combined, create impossible scenarios
> to demux.
>
> The first issue is that the 'status' field of the PEBS record is a copy
> of the GLOBAL_STATUS MSR at PEBS assist time. To see why this is a
> problem let us first describe the regular PEBS cycle:
>
> A) the CTRn value reaches 0:
> - the corresponding bit in GLOBAL_STATUS gets set
> - we start arming the hardware assist
>
> < some unspecified amount of time later --
> this could cover multiple events of interest >
>
> B) the hardware assist is armed, any next event will trigger it
>
> C) a matching event happens:
> - the hardware assist triggers and generates a PEBS record
> this includes a copy of GLOBAL_STATUS at this moment
> - if we auto-reload we (re)set CTRn
Is this actually true? Do we reload here or on A ?
> - we clear the relevant bit in GLOBAL_STATUS
next prev parent reply other threads:[~2015-04-17 8:11 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-09 16:37 [PATCH V6 0/6] large PEBS interrupt threshold Kan Liang
2015-04-09 16:37 ` [PATCH V6 1/6] perf, x86: use the PEBS auto reload mechanism when possible Kan Liang
2015-04-09 16:37 ` [PATCH V6 2/6] perf, x86: introduce setup_pebs_sample_data() Kan Liang
2015-04-09 16:37 ` [PATCH V6 3/6] perf, x86: large PEBS interrupt threshold Kan Liang
2015-04-15 17:14 ` Peter Zijlstra
2015-04-15 17:48 ` Liang, Kan
2015-04-15 18:10 ` Peter Zijlstra
2015-04-15 18:05 ` Peter Zijlstra
2015-04-15 18:35 ` Liang, Kan
2015-04-15 18:41 ` Peter Zijlstra
2015-04-16 18:45 ` Peter Zijlstra
2015-04-09 16:37 ` [PATCH V6 4/6] perf, x86: handle multiple records in PEBS buffer Kan Liang
2015-04-09 21:01 ` Andi Kleen
2015-04-15 18:28 ` Peter Zijlstra
2015-04-15 18:36 ` Peter Zijlstra
2015-04-16 12:53 ` Peter Zijlstra
2015-04-17 8:11 ` Peter Zijlstra [this message]
2015-04-17 12:50 ` Liang, Kan
2015-04-17 13:12 ` Peter Zijlstra
2015-04-17 14:19 ` Liang, Kan
2015-04-17 14:44 ` Peter Zijlstra
2015-04-17 18:20 ` Andi Kleen
2015-04-17 18:25 ` Peter Zijlstra
2015-04-09 16:37 ` [PATCH V6 5/6] perf, x86: drain PEBS buffer during context switch Kan Liang
2015-04-09 16:37 ` [PATCH V6 6/6] perf, x86: enlarge PEBS buffer Kan Liang
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