From: Kan Liang <kan.liang@intel.com>
To: a.p.zijlstra@chello.nl, linux-kernel@vger.kernel.org
Cc: mingo@kernel.org, acme@infradead.org, eranian@google.com,
andi@firstfloor.org, Kan Liang <kan.liang@intel.com>
Subject: [PATCH V6 6/6] perf, x86: enlarge PEBS buffer
Date: Thu, 9 Apr 2015 12:37:46 -0400 [thread overview]
Message-ID: <1428597466-8154-7-git-send-email-kan.liang@intel.com> (raw)
In-Reply-To: <1428597466-8154-1-git-send-email-kan.liang@intel.com>
From: Yan, Zheng <zheng.z.yan@intel.com>
Currently the PEBS buffer size is 4k, it only can hold about 21
PEBS records. This patch enlarges the PEBS buffer size to 64k
(the same as BTS buffer), 64k memory can hold about 330 PEBS
records. This will significantly the reduce number of PMI when
large PEBS interrupt threshold is used.
Signed-off-by: Yan, Zheng <zheng.z.yan@intel.com>
Signed-off-by: Kan Liang <kan.liang@intel.com>
---
arch/x86/kernel/cpu/perf_event_intel_ds.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c
index 3d8950a..dfbcaad 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
@@ -11,7 +11,7 @@
#define BTS_RECORD_SIZE 24
#define BTS_BUFFER_SIZE (PAGE_SIZE << 4)
-#define PEBS_BUFFER_SIZE PAGE_SIZE
+#define PEBS_BUFFER_SIZE (PAGE_SIZE << 4)
#define PEBS_FIXUP_SIZE PAGE_SIZE
/*
--
1.7.11.7
prev parent reply other threads:[~2015-04-09 16:38 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-09 16:37 [PATCH V6 0/6] large PEBS interrupt threshold Kan Liang
2015-04-09 16:37 ` [PATCH V6 1/6] perf, x86: use the PEBS auto reload mechanism when possible Kan Liang
2015-04-09 16:37 ` [PATCH V6 2/6] perf, x86: introduce setup_pebs_sample_data() Kan Liang
2015-04-09 16:37 ` [PATCH V6 3/6] perf, x86: large PEBS interrupt threshold Kan Liang
2015-04-15 17:14 ` Peter Zijlstra
2015-04-15 17:48 ` Liang, Kan
2015-04-15 18:10 ` Peter Zijlstra
2015-04-15 18:05 ` Peter Zijlstra
2015-04-15 18:35 ` Liang, Kan
2015-04-15 18:41 ` Peter Zijlstra
2015-04-16 18:45 ` Peter Zijlstra
2015-04-09 16:37 ` [PATCH V6 4/6] perf, x86: handle multiple records in PEBS buffer Kan Liang
2015-04-09 21:01 ` Andi Kleen
2015-04-15 18:28 ` Peter Zijlstra
2015-04-15 18:36 ` Peter Zijlstra
2015-04-16 12:53 ` Peter Zijlstra
2015-04-17 8:11 ` Peter Zijlstra
2015-04-17 12:50 ` Liang, Kan
2015-04-17 13:12 ` Peter Zijlstra
2015-04-17 14:19 ` Liang, Kan
2015-04-17 14:44 ` Peter Zijlstra
2015-04-17 18:20 ` Andi Kleen
2015-04-17 18:25 ` Peter Zijlstra
2015-04-09 16:37 ` [PATCH V6 5/6] perf, x86: drain PEBS buffer during context switch Kan Liang
2015-04-09 16:37 ` Kan Liang [this message]
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