From: Like Xu <like.xu@linux.intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
Peter Zijlstra <peterz@infradead.org>,
kvm@vger.kernel.org, Andi Kleen <ak@linux.intel.com>,
Jim Mattson <jmattson@google.com>,
Wanpeng Li <wanpengli@tencent.com>
Cc: Sean Christopherson <sean.j.christopherson@intel.com>,
Joerg Roedel <joro@8bytes.org>,
Liran Alon <liran.alon@oracle.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Liang Kan <kan.liang@linux.intel.com>,
Wei Wang <wei.w.wang@intel.com>,
Like Xu <like.xu@linux.intel.com>,
linux-kernel@vger.kernel.org
Subject: [PATCH v9 10/10] KVM: x86: Remove the common trap handler of the MSR_IA32_DEBUGCTLMSR
Date: Fri, 13 Mar 2020 10:16:16 +0800 [thread overview]
Message-ID: <20200313021616.112322-11-like.xu@linux.intel.com> (raw)
In-Reply-To: <20200313021616.112322-1-like.xu@linux.intel.com>
From: Wei Wang <wei.w.wang@intel.com>
The debugctl msr is not completely identical on AMD and Intel CPUs, for
example, FREEZE_LBRS_ON_PMI is supported by Intel CPUs only. Now, this
msr is handled separately in svm.c and intel_pmu.c. So remove the
common debugctl msr handling code in kvm_get/set_msr_common.
Signed-off-by: Wei Wang <wei.w.wang@intel.com>
---
arch/x86/kvm/x86.c | 13 -------------
1 file changed, 13 deletions(-)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 3771d5fb2524..5ad36e71b3eb 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -2756,18 +2756,6 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
return 1;
}
break;
- case MSR_IA32_DEBUGCTLMSR:
- if (!data) {
- /* We support the non-activated case already */
- break;
- } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
- /* Values other than LBR and BTF are vendor-specific,
- thus reserved and should throw a #GP */
- return 1;
- }
- vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
- __func__, data);
- break;
case 0x200 ... 0x2ff:
return kvm_mtrr_set_msr(vcpu, msr, data);
case MSR_IA32_APICBASE:
@@ -3025,7 +3013,6 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
switch (msr_info->index) {
case MSR_IA32_PLATFORM_ID:
case MSR_IA32_EBL_CR_POWERON:
- case MSR_IA32_DEBUGCTLMSR:
case MSR_IA32_LASTBRANCHFROMIP:
case MSR_IA32_LASTBRANCHTOIP:
case MSR_IA32_LASTINTFROMIP:
--
2.21.1
next prev parent reply other threads:[~2020-03-13 2:19 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-13 2:16 [PATCH v9 00/10] Guest Last Branch Recording Enabling Like Xu
2020-03-13 2:16 ` [PATCH v9 01/10] perf/x86: Fix msr variable type for the LBR msrs Like Xu
2020-03-13 2:16 ` [PATCH v9 02/10] perf/x86/lbr: Add interface to get basic information about LBR stack Like Xu
2020-03-13 2:16 ` [PATCH v9 03/10] perf/x86: Add constraint to create guest LBR event without hw counter Like Xu
2020-04-09 16:37 ` Peter Zijlstra
2020-04-10 3:03 ` Xu, Like
2020-04-17 8:40 ` Xu, Like
2020-04-17 10:30 ` Peter Zijlstra
2020-03-13 2:16 ` [PATCH v9 04/10] perf/x86: Keep LBR stack unchanged on the host for guest LBR event Like Xu
2020-04-09 16:45 ` Peter Zijlstra
2020-04-10 3:10 ` Xu, Like
2020-03-13 2:16 ` [PATCH v9 05/10] KVM: x86: Add KVM_CAP_X86_GUEST_LBR interface to dis/enable LBR feature Like Xu
2020-03-13 2:16 ` [PATCH v9 06/10] KVM: x86/pmu: Tweak kvm_pmu_get_msr to pass 'struct msr_data' in Like Xu
2020-03-13 2:16 ` [PATCH v9 07/10] KVM: x86/pmu: Add LBR feature emulation via guest LBR event Like Xu
2020-03-13 2:16 ` [PATCH v9 08/10] KVM: x86/pmu: Release guest LBR event via vPMU lazy release mechanism Like Xu
2020-03-13 2:16 ` [PATCH v9 09/10] KVM: x86: Expose MSR_IA32_PERF_CAPABILITIES to guest for LBR record format Like Xu
2020-03-13 2:16 ` Like Xu [this message]
2020-03-20 8:45 ` [PATCH v9 00/10] Guest Last Branch Recording Enabling Xu, Like
2020-04-02 12:59 ` Xu, Like
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