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From: "Daniel Walker (danielwa)" <danielwa@cisco.com>
To: "Tudor.Ambarus@microchip.com" <Tudor.Ambarus@microchip.com>
Cc: "xe-linux-external(mailer list)" <xe-linux-external@cisco.com>,
	"miquel.raynal@bootlin.com" <miquel.raynal@bootlin.com>,
	"richard@nod.at" <richard@nod.at>,
	"vigneshr@ti.com" <vigneshr@ti.com>,
	"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] mtd: spi-nor: Add 4B_OPCODES flag to n25q256a
Date: Mon, 20 Apr 2020 16:25:51 +0000	[thread overview]
Message-ID: <20200420162550.GZ24466@zorba> (raw)
In-Reply-To: <12178429.kzmL6e4XO6@192.168.0.120>

On Mon, Apr 20, 2020 at 03:45:59PM +0000, Tudor.Ambarus@microchip.com wrote:
> Hi, Daniel,
> 
> On Friday, April 17, 2020 8:46:19 PM EEST Daniel Walker wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> > content is safe
> > 
> > The n25q256a supports 4-byte opcodes so lets add the flag.
> 
> This is not true for all the n25q256a flashes. SPINOR_OP_PP_4B, 
> SPINOR_OP_BE_4K_4B and SPINOR_OP_SE_4B are valid just for the part numbers 
> N25Q256A83ESF40x, N25Q256A83E1240x, and N25Q256A83ESFA0F.
> 
> You need to differentiate between the aforementioned flashes and the rest in 
> the n25q256a, in order to add the 4-byte opcodes flag.

How do you suggest I do that ? Can I add a new entry into this table with more
specific information about the chips ?

Daniel

  reply	other threads:[~2020-04-20 16:34 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-17 17:46 [PATCH] mtd: spi-nor: Add 4B_OPCODES flag to n25q256a Daniel Walker
2020-04-20 15:45 ` Tudor.Ambarus
2020-04-20 16:25   ` Daniel Walker (danielwa) [this message]
2020-04-21  4:52     ` Tudor.Ambarus
2020-04-21 16:24       ` Daniel Walker (danielwa)

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