public inbox for linux-kernel@vger.kernel.org
 help / color / mirror / Atom feed
From: <Tudor.Ambarus@microchip.com>
To: <danielwa@cisco.com>
Cc: <xe-linux-external@cisco.com>, <miquel.raynal@bootlin.com>,
	<richard@nod.at>, <vigneshr@ti.com>,
	<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] mtd: spi-nor: Add 4B_OPCODES flag to n25q256a
Date: Tue, 21 Apr 2020 04:52:01 +0000	[thread overview]
Message-ID: <9715610.TpusJ8o3lr@192.168.0.120> (raw)
In-Reply-To: <20200420162550.GZ24466@zorba>

On Monday, April 20, 2020 7:25:51 PM EEST Daniel Walker (danielwa) wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
> On Mon, Apr 20, 2020 at 03:45:59PM +0000, Tudor.Ambarus@microchip.com wrote:
> > Hi, Daniel,
> > 
> > On Friday, April 17, 2020 8:46:19 PM EEST Daniel Walker wrote:
> > > EXTERNAL EMAIL: Do not click links or open attachments unless you know
> > > the
> > > content is safe
> > > 
> > > The n25q256a supports 4-byte opcodes so lets add the flag.
> > 
> > This is not true for all the n25q256a flashes. SPINOR_OP_PP_4B,
> > SPINOR_OP_BE_4K_4B and SPINOR_OP_SE_4B are valid just for the part numbers
> > N25Q256A83ESF40x, N25Q256A83E1240x, and N25Q256A83ESFA0F.
> > 
> > You need to differentiate between the aforementioned flashes and the rest
> > in the n25q256a, in order to add the 4-byte opcodes flag.
> 
> How do you suggest I do that ? Can I add a new entry into this table with
> more specific information about the chips ?
> 

We need to find a differentiator at runtime. If we are lucky, there might be 
some SFDP changes between the 4-byte opcodes capable flashes and the rest. 
Please dump all the sfdp tables, we can start from there. There's a thread 
that might interest you, see http://u-boot.10912.n7.nabble.com/Regressions-in-MTD-SPI-FLASH-td382956.html#a383126.

A more elegant way to solve it, is by parsing the 4bait sfdp table, but I 
haven't checked if this flash supports it or not. Anyway, not something that 
we can control, the manufacturer should add it.

Cheers,
ta



  reply	other threads:[~2020-04-21  4:52 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-17 17:46 [PATCH] mtd: spi-nor: Add 4B_OPCODES flag to n25q256a Daniel Walker
2020-04-20 15:45 ` Tudor.Ambarus
2020-04-20 16:25   ` Daniel Walker (danielwa)
2020-04-21  4:52     ` Tudor.Ambarus [this message]
2020-04-21 16:24       ` Daniel Walker (danielwa)

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=9715610.TpusJ8o3lr@192.168.0.120 \
    --to=tudor.ambarus@microchip.com \
    --cc=danielwa@cisco.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mtd@lists.infradead.org \
    --cc=miquel.raynal@bootlin.com \
    --cc=richard@nod.at \
    --cc=vigneshr@ti.com \
    --cc=xe-linux-external@cisco.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox