[PATCH v1 0/2] pinctrl: intel: Unify the way of handling chained IRQ

[PATCH v1 0/2] pinctrl: intel: Unify the way of handling chained IRQ

[Andy Shevchenko]

Some of the drivers are using the dedicated helpers (chained_irq_enter(),
chained_irq_exit() helpers) and some relies on the specific implementations
of the parent IRQ chip and its configuration. Update the latter ones to
use dedicated helpers that cover all possible scenarios.

Andy Shevchenko (2):
  pinctrl: baytrail: Use dedicated helpers for chained IRQ handlers
  pinctrl: lynxpoint: Use dedicated helpers for chained IRQ handlers

 drivers/pinctrl/intel/pinctrl-baytrail.c  | 5 ++++-
 drivers/pinctrl/intel/pinctrl-lynxpoint.c | 5 ++++-
 2 files changed, 8 insertions(+), 2 deletions(-)

-- 
2.43.0.rc1.1336.g36b5255a03ac

[PATCH v1 1/2] pinctrl: baytrail: Use dedicated helpers for chained IRQ handlers

[Andy Shevchenko]

Instead of relying on the fact that the parent IRQ chip supports
fasteoi mode and calling the respective callback at the end of
the interrupt handler, surround it with enter and exit helpers
for chained IRQ handlers which will consider all possible cases.

This in particular unifies how GPIO drivers handle IRQ.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
 drivers/pinctrl/intel/pinctrl-baytrail.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c
index 7340dc20349c..c4458ac539ff 100644
--- a/drivers/pinctrl/intel/pinctrl-baytrail.c
+++ b/drivers/pinctrl/intel/pinctrl-baytrail.c
@@ -1355,6 +1355,8 @@ static void byt_gpio_irq_handler(struct irq_desc *desc)
 	void __iomem *reg;
 	unsigned long pending;
 
+	chained_irq_enter(chip, desc);
+
 	/* check from GPIO controller which pin triggered the interrupt */
 	for (base = 0; base < vg->chip.ngpio; base += 32) {
 		reg = byt_gpio_reg(vg, base, BYT_INT_STAT_REG);
@@ -1369,7 +1371,8 @@ static void byt_gpio_irq_handler(struct irq_desc *desc)
 		for_each_set_bit(pin, &pending, 32)
 			generic_handle_domain_irq(vg->chip.irq.domain, base + pin);
 	}
-	chip->irq_eoi(data);
+
+	chained_irq_exit(chip, desc);
 }
 
 static bool byt_direct_irq_sanity_check(struct intel_pinctrl *vg, int pin, u32 conf0)
-- 
2.43.0.rc1.1336.g36b5255a03ac

[PATCH v1 2/2] pinctrl: lynxpoint: Use dedicated helpers for chained IRQ handlers

[Andy Shevchenko]

Instead of relying on the fact that the parent IRQ chip supports
fasteoi mode and calling the respective callback at the end of
the interrupt handler, surround it with enter and exit helpers
for chained IRQ handlers which will consider all possible cases.

This in particular unifies how GPIO drivers handle IRQ.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
 drivers/pinctrl/intel/pinctrl-lynxpoint.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/pinctrl/intel/pinctrl-lynxpoint.c b/drivers/pinctrl/intel/pinctrl-lynxpoint.c
index cc5ede17c383..ac5459a4c63e 100644
--- a/drivers/pinctrl/intel/pinctrl-lynxpoint.c
+++ b/drivers/pinctrl/intel/pinctrl-lynxpoint.c
@@ -549,6 +549,8 @@ static void lp_gpio_irq_handler(struct irq_desc *desc)
 	unsigned long pending;
 	u32 base, pin;
 
+	chained_irq_enter(chip, desc);
+
 	/* check from GPIO controller which pin triggered the interrupt */
 	for (base = 0; base < lg->chip.ngpio; base += 32) {
 		reg = lp_gpio_reg(&lg->chip, base, LP_INT_STAT);
@@ -560,7 +562,8 @@ static void lp_gpio_irq_handler(struct irq_desc *desc)
 		for_each_set_bit(pin, &pending, 32)
 			generic_handle_domain_irq(lg->chip.irq.domain, base + pin);
 	}
-	chip->irq_eoi(data);
+
+	chained_irq_exit(chip, desc);
 }
 
 static void lp_irq_ack(struct irq_data *d)
-- 
2.43.0.rc1.1336.g36b5255a03ac

Re: [PATCH v1 0/2] pinctrl: intel: Unify the way of handling chained IRQ

[Hans de Goede]

Hi,

On 29-Jan-25 3:49 PM, Andy Shevchenko wrote:
> Some of the drivers are using the dedicated helpers (chained_irq_enter(),
> chained_irq_exit() helpers) and some relies on the specific implementations
> of the parent IRQ chip and its configuration. Update the latter ones to
> use dedicated helpers that cover all possible scenarios.
> 
> Andy Shevchenko (2):
>   pinctrl: baytrail: Use dedicated helpers for chained IRQ handlers
>   pinctrl: lynxpoint: Use dedicated helpers for chained IRQ handlers

Thanks, patches looks good to me:

Reviewed-by: Hans de Goede <hdegoede@redhat.com>

For the series.

Regards,

Hans


> 
>  drivers/pinctrl/intel/pinctrl-baytrail.c  | 5 ++++-
>  drivers/pinctrl/intel/pinctrl-lynxpoint.c | 5 ++++-
>  2 files changed, 8 insertions(+), 2 deletions(-)
> 

Re: [PATCH v1 0/2] pinctrl: intel: Unify the way of handling chained IRQ

[Mika Westerberg]

On Wed, Jan 29, 2025 at 04:49:38PM +0200, Andy Shevchenko wrote:
> Some of the drivers are using the dedicated helpers (chained_irq_enter(),
> chained_irq_exit() helpers) and some relies on the specific implementations
> of the parent IRQ chip and its configuration. Update the latter ones to
> use dedicated helpers that cover all possible scenarios.
> 
> Andy Shevchenko (2):
>   pinctrl: baytrail: Use dedicated helpers for chained IRQ handlers
>   pinctrl: lynxpoint: Use dedicated helpers for chained IRQ handlers

Both,

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>

Re: [PATCH v1 0/2] pinctrl: intel: Unify the way of handling chained IRQ

[Andy Shevchenko]

On Thu, Jan 30, 2025 at 02:47:43PM +0200, Mika Westerberg wrote:
> On Wed, Jan 29, 2025 at 04:49:38PM +0200, Andy Shevchenko wrote:
> > Some of the drivers are using the dedicated helpers (chained_irq_enter(),
> > chained_irq_exit() helpers) and some relies on the specific implementations
> > of the parent IRQ chip and its configuration. Update the latter ones to
> > use dedicated helpers that cover all possible scenarios.
> > 
> > Andy Shevchenko (2):
> >   pinctrl: baytrail: Use dedicated helpers for chained IRQ handlers
> >   pinctrl: lynxpoint: Use dedicated helpers for chained IRQ handlers
> 
> Both,
> 
> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>

Pushed to my review and testing queue, thanks!

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v1 1/2] pinctrl: baytrail: Use dedicated helpers for chained IRQ handlers

[Linus Walleij]

On Wed, Jan 29, 2025 at 3:52 PM Andy Shevchenko
<andriy.shevchenko@linux.intel.com> wrote:

> Instead of relying on the fact that the parent IRQ chip supports
> fasteoi mode and calling the respective callback at the end of
> the interrupt handler, surround it with enter and exit helpers
> for chained IRQ handlers which will consider all possible cases.
>
> This in particular unifies how GPIO drivers handle IRQ.
>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

Looks fine to me, also 2/2.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Expect to get this from you as pull request!

Yours,
Linus Walleij