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* [PATCH 0/5] Add J722S CSI support
@ 2025-02-18 18:54 Vaishnav Achath
  2025-02-18 18:54 ` [PATCH 1/5] arm64: dts: ti: k3-j722s-main: Add BCDMA CSI overrides Vaishnav Achath
                   ` (6 more replies)
  0 siblings, 7 replies; 10+ messages in thread
From: Vaishnav Achath @ 2025-02-18 18:54 UTC (permalink / raw)
  To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, devicetree,
	linux-arm-kernel
  Cc: linux-kernel, jai.luthra, y-abhilashchandra, vaishnav.a

This series adds support for CSI2RX capture on J722S EVM
and enables IMX219 and OV5640 overlays to enables
4 sensors on EVM, this provides a reference for a user to
enable a different sensor on any of the ports.

Test logs:
IMX219: https://gist.github.com/vaishnavachath/60cc2ef257601f27f28a315f8cf669c4
OV5640: https://gist.github.com/vaishnavachath/648202286d4d34d4d25f7c8c9db8b8bd

Vaishnav Achath (5):
  arm64: dts: ti: k3-j722s-main: Add BCDMA CSI overrides
  arm64: dts: ti: k3-j722s-main: Add CSI2RX nodes
  arm64: dts: ti: k3-j722s-evm: Add camera peripherals
  arm64: dts: ti: k3-j722s-evm: Add overlay for quad IMX219
  arm64: dts: ti: k3-j722s-evm: Add overlay for TEVI OV5640

 arch/arm64/boot/dts/ti/Makefile               |   9 +
 ...k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtso | 304 +++++++++++++++++
 .../k3-j722s-evm-csi2-quad-tevi-ov5640.dtso   | 319 ++++++++++++++++++
 arch/arm64/boot/dts/ti/k3-j722s-evm.dts       |  28 ++
 arch/arm64/boot/dts/ti/k3-j722s-main.dtsi     | 193 +++++++++++
 5 files changed, 853 insertions(+)
 create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtso
 create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-tevi-ov5640.dtso

-- 
2.34.1


^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH 1/5] arm64: dts: ti: k3-j722s-main: Add BCDMA CSI overrides
  2025-02-18 18:54 [PATCH 0/5] Add J722S CSI support Vaishnav Achath
@ 2025-02-18 18:54 ` Vaishnav Achath
  2025-02-18 18:54 ` [PATCH 2/5] arm64: dts: ti: k3-j722s-main: Add CSI2RX nodes Vaishnav Achath
                   ` (5 subsequent siblings)
  6 siblings, 0 replies; 10+ messages in thread
From: Vaishnav Achath @ 2025-02-18 18:54 UTC (permalink / raw)
  To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, devicetree,
	linux-arm-kernel
  Cc: linux-kernel, jai.luthra, y-abhilashchandra, vaishnav.a

J722S has a dedicated CSI BCDMA instance which is slightly different
from AM62P in TX channel support, add the overrides and additional
properties to support CSI BCDMA on J722S.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
index 3ac2d45a0558..f8e4424f3bb7 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
@@ -204,6 +204,16 @@ c7x_1: dsp@7e200000 {
 	};
 };
 
+&main_bcdma_csi {
+	compatible = "ti,j722s-dmss-bcdma-csi";
+	reg = <0x00 0x4e230000 0x00 0x100>,
+	      <0x00 0x4e180000 0x00 0x20000>,
+	      <0x00 0x4e300000 0x00 0x10000>,
+	      <0x00 0x4e100000 0x00 0x80000>;
+	reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
+	ti,sci-rm-range-tchan = <0x22>;
+};
+
 /* MCU domain overrides */
 
 &mcu_r5fss0_core0 {
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 2/5] arm64: dts: ti: k3-j722s-main: Add CSI2RX nodes
  2025-02-18 18:54 [PATCH 0/5] Add J722S CSI support Vaishnav Achath
  2025-02-18 18:54 ` [PATCH 1/5] arm64: dts: ti: k3-j722s-main: Add BCDMA CSI overrides Vaishnav Achath
@ 2025-02-18 18:54 ` Vaishnav Achath
  2025-02-18 18:54 ` [PATCH 3/5] arm64: dts: ti: k3-j722s-evm: Add camera peripherals Vaishnav Achath
                   ` (4 subsequent siblings)
  6 siblings, 0 replies; 10+ messages in thread
From: Vaishnav Achath @ 2025-02-18 18:54 UTC (permalink / raw)
  To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, devicetree,
	linux-arm-kernel
  Cc: linux-kernel, jai.luthra, y-abhilashchandra, vaishnav.a

J722S has 4 CSI2RX receiver instances with external DPHY. The first CSI2RX
instance node is derived from the AM62P common dtsi, Add the nodes for the
subsequent three instances and keep them disabled.

TRM (12.6 Camera Peripherals): https://www.ti.com/lit/zip/sprujb3

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 183 ++++++++++++++++++++++
 1 file changed, 183 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
index f8e4424f3bb7..e69e9b34c0a4 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
@@ -154,6 +154,189 @@ usb1: usb@31200000 {
 		};
 	};
 
+	ti_csi2rx1: ticsi2rx@30122000 {
+		compatible = "ti,j721e-csi2rx-shim";
+		reg = <0x00 0x30122000 0x00 0x1000>;
+		ranges;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		dmas = <&main_bcdma_csi 0 0x5100 0>;
+		dma-names = "rx0";
+		power-domains = <&k3_pds 247 TI_SCI_PD_EXCLUSIVE>;
+		status = "disabled";
+
+		cdns_csi2rx1: csi-bridge@30121000 {
+			compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
+			reg = <0x00 0x30121000 0x00 0x1000>;
+			clocks = <&k3_clks 247 0>, <&k3_clks 247 3>, <&k3_clks 247 0>,
+				 <&k3_clks 247 0>, <&k3_clks 247 4>, <&k3_clks 247 4>;
+			clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
+				      "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";
+			phys = <&dphy1>;
+			phy-names = "dphy";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				csi1_port0: port@0 {
+					reg = <0>;
+					status = "disabled";
+				};
+
+				csi1_port1: port@1 {
+					reg = <1>;
+					status = "disabled";
+				};
+
+				csi1_port2: port@2 {
+					reg = <2>;
+					status = "disabled";
+				};
+
+				csi1_port3: port@3 {
+					reg = <3>;
+					status = "disabled";
+				};
+
+				csi1_port4: port@4 {
+					reg = <4>;
+					status = "disabled";
+				};
+			};
+		};
+	};
+
+	ti_csi2rx2: ticsi2rx@30142000 {
+		compatible = "ti,j721e-csi2rx-shim";
+		reg = <0x00 0x30142000 0x00 0x1000>;
+		ranges;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		power-domains = <&k3_pds 248 TI_SCI_PD_EXCLUSIVE>;
+		dmas = <&main_bcdma_csi 0 0x5200 0>;
+		dma-names = "rx0";
+		status = "disabled";
+
+		cdns_csi2rx2: csi-bridge@30141000 {
+			compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
+			reg = <0x00 0x30141000 0x00 0x1000>;
+			clocks = <&k3_clks 248 0>, <&k3_clks 248 3>, <&k3_clks 248 0>,
+				 <&k3_clks 248 0>, <&k3_clks 248 4>, <&k3_clks 248 4>;
+			clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
+				      "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";
+			phys = <&dphy2>;
+			phy-names = "dphy";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				csi2_port0: port@0 {
+					reg = <0>;
+					status = "disabled";
+				};
+
+				csi2_port1: port@1 {
+					reg = <1>;
+					status = "disabled";
+				};
+
+				csi2_port2: port@2 {
+					reg = <2>;
+					status = "disabled";
+				};
+
+				csi2_port3: port@3 {
+					reg = <3>;
+					status = "disabled";
+				};
+
+				csi2_port4: port@4 {
+					reg = <4>;
+					status = "disabled";
+				};
+			};
+		};
+	};
+
+	ti_csi2rx3: ticsi2rx@30162000 {
+		compatible = "ti,j721e-csi2rx-shim";
+		reg = <0x00 0x30162000 0x00 0x1000>;
+		ranges;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		dmas = <&main_bcdma_csi 0 0x5300 0>;
+		dma-names = "rx0";
+		power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;
+		status = "disabled";
+
+		cdns_csi2rx3: csi-bridge@30161000 {
+			compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
+			reg = <0x00 0x30161000 0x00 0x1000>;
+			clocks = <&k3_clks 249 0>, <&k3_clks 249 3>, <&k3_clks 249 0>,
+				 <&k3_clks 249 0>, <&k3_clks 249 4>, <&k3_clks 249 4>;
+			clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
+				      "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";
+			phys = <&dphy3>;
+			phy-names = "dphy";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				csi3_port0: port@0 {
+					reg = <0>;
+					status = "disabled";
+				};
+
+				csi3_port1: port@1 {
+					reg = <1>;
+					status = "disabled";
+				};
+
+				csi3_port2: port@2 {
+					reg = <2>;
+					status = "disabled";
+				};
+
+				csi3_port3: port@3 {
+					reg = <3>;
+					status = "disabled";
+				};
+
+				csi3_port4: port@4 {
+					reg = <4>;
+					status = "disabled";
+				};
+			};
+		};
+	};
+
+	dphy1: phy@30130000 {
+		compatible = "cdns,dphy-rx";
+		reg = <0x00 0x30130000 0x00 0x1100>;
+		#phy-cells = <0>;
+		power-domains = <&k3_pds 251 TI_SCI_PD_EXCLUSIVE>;
+		status = "disabled";
+	};
+
+	dphy2: phy@30150000 {
+		compatible = "cdns,dphy-rx";
+		reg = <0x00 0x30150000 0x00 0x1100>;
+		#phy-cells = <0>;
+		power-domains = <&k3_pds 252 TI_SCI_PD_EXCLUSIVE>;
+		status = "disabled";
+	};
+
+	dphy3: phy@30170000 {
+		compatible = "cdns,dphy-rx";
+		reg = <0x00 0x30170000 0x00 0x1100>;
+		#phy-cells = <0>;
+		power-domains = <&k3_pds 253 TI_SCI_PD_EXCLUSIVE>;
+		status = "disabled";
+	};
+
 	main_r5fss0: r5fss@78400000 {
 		compatible = "ti,am62-r5fss";
 		#address-cells = <1>;
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 3/5] arm64: dts: ti: k3-j722s-evm: Add camera peripherals
  2025-02-18 18:54 [PATCH 0/5] Add J722S CSI support Vaishnav Achath
  2025-02-18 18:54 ` [PATCH 1/5] arm64: dts: ti: k3-j722s-main: Add BCDMA CSI overrides Vaishnav Achath
  2025-02-18 18:54 ` [PATCH 2/5] arm64: dts: ti: k3-j722s-main: Add CSI2RX nodes Vaishnav Achath
@ 2025-02-18 18:54 ` Vaishnav Achath
  2025-02-18 18:54 ` [PATCH 4/5] arm64: dts: ti: k3-j722s-evm: Add overlay for quad IMX219 Vaishnav Achath
                   ` (3 subsequent siblings)
  6 siblings, 0 replies; 10+ messages in thread
From: Vaishnav Achath @ 2025-02-18 18:54 UTC (permalink / raw)
  To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, devicetree,
	linux-arm-kernel
  Cc: linux-kernel, jai.luthra, y-abhilashchandra, vaishnav.a

J722S EVM has four RPi camera connectors and dual MIPI Samtec CSI
connectors which bring out the 4 x CSI2RX instances and the I2C camera
control interfaces. Add the nodes for PCA9543 I2C switch and enable them.

J722S EVM schematics: https://www.ti.com/lit/pdf/sprujb5

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 28 +++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
index d184e9c1a0a5..5c0200c8811d 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
@@ -263,6 +263,13 @@ J722S_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (B22) I2C0_SDA */
 		bootph-all;
 	};
 
+	main_i2c2_pins_default: main-i2c2-default-pins {
+		pinctrl-single,pins = <
+			J722S_IOPAD(0x00b0, PIN_INPUT_PULLUP, 1) /* (P22) GPMC0_CSn2.I2C2_SCL */
+			J722S_IOPAD(0x00b4, PIN_INPUT_PULLUP, 1) /* (P23) GPMC0_CSn3.I2C2_SDA */
+		>;
+	};
+
 	main_uart0_pins_default: main-uart0-default-pins {
 		pinctrl-single,pins = <
 			J722S_IOPAD(0x01c8, PIN_INPUT, 0)	/* (A22) UART0_RXD */
@@ -631,6 +638,27 @@ tlv320aic3106: audio-codec@1b {
 	};
 };
 
+&main_i2c2 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&main_i2c2_pins_default>;
+	clock-frequency = <400000>;
+
+	pca9543_0: i2c-mux@70 {
+		compatible = "nxp,pca9543";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x70>;
+	};
+
+	pca9543_1: i2c-mux@71 {
+		compatible = "nxp,pca9543";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x71>;
+	};
+};
+
 &ospi0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&ospi0_pins_default>;
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 4/5] arm64: dts: ti: k3-j722s-evm: Add overlay for quad IMX219
  2025-02-18 18:54 [PATCH 0/5] Add J722S CSI support Vaishnav Achath
                   ` (2 preceding siblings ...)
  2025-02-18 18:54 ` [PATCH 3/5] arm64: dts: ti: k3-j722s-evm: Add camera peripherals Vaishnav Achath
@ 2025-02-18 18:54 ` Vaishnav Achath
  2025-02-18 18:54 ` [PATCH 5/5] arm64: dts: ti: k3-j722s-evm: Add overlay for TEVI OV5640 Vaishnav Achath
                   ` (2 subsequent siblings)
  6 siblings, 0 replies; 10+ messages in thread
From: Vaishnav Achath @ 2025-02-18 18:54 UTC (permalink / raw)
  To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, devicetree,
	linux-arm-kernel
  Cc: linux-kernel, jai.luthra, y-abhilashchandra, vaishnav.a

RPi v2 Camera (IMX219) is an 8MP camera that can be used with J722S EVM
through the 22-pin CSI-RX connector. Add a reference overlay for quad
IMX219 RPI camera v2 modules on J722S EVM

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
---
 arch/arm64/boot/dts/ti/Makefile               |   5 +
 ...k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtso | 304 ++++++++++++++++++
 2 files changed, 309 insertions(+)
 create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtso

diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index 8a4bdf87e2d4..9ae0917e5763 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -119,6 +119,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-pcie1-ep.dtbo
 # Boards with J722s SoC
 dtb-$(CONFIG_ARCH_K3) += k3-am67a-beagley-ai.dtb
 dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm.dtb
+dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo
 
 # Boards with J784s4 SoC
 dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb
@@ -209,6 +210,8 @@ k3-j721e-sk-csi2-dual-imx219-dtbs := k3-j721e-sk.dtb \
 	k3-j721e-sk-csi2-dual-imx219.dtbo
 k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \
 	k3-j721s2-evm-pcie1-ep.dtbo
+k3-j722s-evm-csi2-quad-rpi-cam-imx219-dtbs := k3-j722s-evm.dtb \
+	k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo
 k3-j784s4-evm-pcie0-pcie1-ep-dtbs := k3-j784s4-evm.dtb \
 	k3-j784s4-evm-pcie0-pcie1-ep.dtbo
 k3-j784s4-evm-quad-port-eth-exp1-dtbs := k3-j784s4-evm.dtb \
@@ -243,6 +246,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
 	k3-j721e-evm-pcie1-ep.dtb \
 	k3-j721e-sk-csi2-dual-imx219.dtb \
 	k3-j721s2-evm-pcie1-ep.dtb \
+	k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtb \
 	k3-j784s4-evm-pcie0-pcie1-ep.dtb \
 	k3-j784s4-evm-quad-port-eth-exp1.dtb \
 	k3-j784s4-evm-usxgmii-exp1-exp2.dtb
@@ -266,5 +270,6 @@ DTC_FLAGS_k3-j721e-common-proc-board += -@
 DTC_FLAGS_k3-j721e-evm-pcie0-ep += -@
 DTC_FLAGS_k3-j721e-sk += -@
 DTC_FLAGS_k3-j721s2-common-proc-board += -@
+DTC_FLAGS_k3-j722s-evm += -@
 DTC_FLAGS_k3-j784s4-evm += -@
 DTC_FLAGS_k3-j742s2-evm += -@
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtso b/arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtso
new file mode 100644
index 000000000000..4c5ec2c7826e
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtso
@@ -0,0 +1,304 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * DT Overlay for RPi Camera V2.1 on J722S-EVM board.
+ *
+ * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ * Schematics: https://datasheets.raspberrypi.com/camera/camera-v2-schematics.pdf
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include "k3-pinctrl.h"
+
+&main_pmx0 {
+	cam0_reset_pins_default: cam0-reset-pins-default {
+		pinctrl-single,pins = <
+			J722S_IOPAD(0x03c, PIN_OUTPUT, 7)
+		>;
+	};
+
+	cam1_reset_pins_default: cam1-reset-pins-default {
+		pinctrl-single,pins = <
+			J722S_IOPAD(0x044, PIN_OUTPUT, 7)
+		>;
+	};
+
+	cam2_reset_pins_default: cam2-reset-pins-default {
+		pinctrl-single,pins = <
+			J722S_IOPAD(0x04c, PIN_OUTPUT, 7)
+		>;
+	};
+
+	cam3_reset_pins_default: cam3-reset-pins-default {
+		pinctrl-single,pins = <
+			J722S_IOPAD(0x054, PIN_OUTPUT, 7)
+		>;
+	};
+};
+
+&{/} {
+	clk_imx219_fixed: imx219-xclk {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <24000000>;
+	};
+};
+
+&exp1 {
+	p06-hog{
+		/* P06 - CSI01_MUX_SEL_2 */
+		gpio-hog;
+		gpios = <6 GPIO_ACTIVE_HIGH>;
+		output-high;
+		line-name = "CSI01_MUX_SEL_2";
+	};
+
+	p07-hog{
+		/* P01 - CSI23_MUX_SEL_2 */
+		gpio-hog;
+		gpios = <7 GPIO_ACTIVE_HIGH>;
+		output-high;
+		line-name = "CSI23_MUX_SEL_2";
+	};
+};
+
+&pca9543_0 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	i2c-alias-pool = /bits/ 16 <0x10 0x11>;
+
+	/* CAM0 I2C */
+	i2c@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0>;
+
+		imx219_0: sensor@10 {
+			compatible = "sony,imx219";
+			reg = <0x10>;
+
+			clocks = <&clk_imx219_fixed>;
+			clock-names = "xclk";
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&cam0_reset_pins_default>;
+
+			reset-gpios = <&main_gpio0 15 GPIO_ACTIVE_HIGH>;
+
+			port {
+				csi2_cam0: endpoint {
+					remote-endpoint = <&csi2rx0_in_sensor>;
+					link-frequencies = /bits/ 64 <456000000>;
+					clock-lanes = <0>;
+					data-lanes = <1 2>;
+				};
+			};
+		};
+	};
+
+	/* CAM1 I2C */
+	i2c@1 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <1>;
+
+		imx219_1: sensor@10 {
+			compatible = "sony,imx219";
+			reg = <0x10>;
+
+			clocks = <&clk_imx219_fixed>;
+			clock-names = "xclk";
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&cam1_reset_pins_default>;
+
+			reset-gpios = <&main_gpio0 17 GPIO_ACTIVE_HIGH>;
+
+			port {
+				csi2_cam1: endpoint {
+					remote-endpoint = <&csi2rx1_in_sensor>;
+					link-frequencies = /bits/ 64 <456000000>;
+					clock-lanes = <0>;
+					data-lanes = <1 2>;
+				};
+			};
+		};
+	};
+};
+
+&pca9543_1 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	i2c-alias-pool = /bits/ 16 <0x10 0x11>;
+
+	/* CAM0 I2C */
+	i2c@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0>;
+
+		imx219_2: sensor@10 {
+			compatible = "sony,imx219";
+			reg = <0x10>;
+
+			clocks = <&clk_imx219_fixed>;
+			clock-names = "xclk";
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&cam2_reset_pins_default>;
+
+			reset-gpios = <&main_gpio0 19 GPIO_ACTIVE_HIGH>;
+
+			port {
+				csi2_cam2: endpoint {
+					remote-endpoint = <&csi2rx2_in_sensor>;
+					link-frequencies = /bits/ 64 <456000000>;
+					clock-lanes = <0>;
+					data-lanes = <1 2>;
+				};
+			};
+		};
+	};
+
+	/* CAM1 I2C */
+	i2c@1 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <1>;
+
+		imx219_3: sensor@10 {
+			compatible = "sony,imx219";
+			reg = <0x10>;
+
+			clocks = <&clk_imx219_fixed>;
+			clock-names = "xclk";
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&cam3_reset_pins_default>;
+
+			reset-gpios = <&main_gpio0 21 GPIO_ACTIVE_HIGH>;
+
+			port {
+				csi2_cam3: endpoint {
+					remote-endpoint = <&csi2rx3_in_sensor>;
+					link-frequencies = /bits/ 64 <456000000>;
+					clock-lanes = <0>;
+					data-lanes = <1 2>;
+				};
+			};
+		};
+	};
+};
+
+&cdns_csi2rx0 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		csi0_port0: port@0 {
+			reg = <0>;
+			status = "okay";
+
+			csi2rx0_in_sensor: endpoint {
+				remote-endpoint = <&csi2_cam0>;
+				bus-type = <4>; /* CSI2 DPHY */
+				clock-lanes = <0>;
+				data-lanes = <1 2>;
+			};
+		};
+	};
+};
+
+&cdns_csi2rx1 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		csi1_port0: port@0 {
+			reg = <0>;
+			status = "okay";
+
+			csi2rx1_in_sensor: endpoint {
+				remote-endpoint = <&csi2_cam1>;
+				bus-type = <4>; /* CSI2 DPHY */
+				clock-lanes = <0>;
+				data-lanes = <1 2>;
+			};
+		};
+	};
+};
+
+&cdns_csi2rx2 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		csi2_port0: port@0 {
+			reg = <0>;
+			status = "okay";
+
+			csi2rx2_in_sensor: endpoint {
+				remote-endpoint = <&csi2_cam2>;
+				bus-type = <4>; /* CSI2 DPHY */
+				clock-lanes = <0>;
+				data-lanes = <1 2>;
+			};
+		};
+	};
+};
+
+&cdns_csi2rx3 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		csi3_port0: port@0 {
+			reg = <0>;
+			status = "okay";
+
+			csi2rx3_in_sensor: endpoint {
+				remote-endpoint = <&csi2_cam3>;
+				bus-type = <4>; /* CSI2 DPHY */
+				clock-lanes = <0>;
+				data-lanes = <1 2>;
+			};
+		};
+	};
+};
+
+&ti_csi2rx0 {
+	status = "okay";
+};
+
+&dphy0 {
+	status = "okay";
+};
+
+&ti_csi2rx1 {
+	status = "okay";
+};
+
+&dphy1 {
+	status = "okay";
+};
+
+&ti_csi2rx2 {
+	status = "okay";
+};
+
+&dphy2 {
+	status = "okay";
+};
+
+&ti_csi2rx3 {
+	status = "okay";
+};
+
+&dphy3 {
+	status = "okay";
+};
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 5/5] arm64: dts: ti: k3-j722s-evm: Add overlay for TEVI OV5640
  2025-02-18 18:54 [PATCH 0/5] Add J722S CSI support Vaishnav Achath
                   ` (3 preceding siblings ...)
  2025-02-18 18:54 ` [PATCH 4/5] arm64: dts: ti: k3-j722s-evm: Add overlay for quad IMX219 Vaishnav Achath
@ 2025-02-18 18:54 ` Vaishnav Achath
  2025-03-07 12:15   ` Rob Herring
  2025-03-04  5:24 ` [PATCH 0/5] Add J722S CSI support Yemike Abhilash Chandra
  2025-03-07 10:36 ` Vignesh Raghavendra
  6 siblings, 1 reply; 10+ messages in thread
From: Vaishnav Achath @ 2025-02-18 18:54 UTC (permalink / raw)
  To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, devicetree,
	linux-arm-kernel
  Cc: linux-kernel, jai.luthra, y-abhilashchandra, vaishnav.a

TechNexion TEVI OV5640 camera is a 5MP camera that can be used with
J722S EVM through the 22-pin CSI-RX connector. Add a reference overlay
for quad TEVI OV5640 modules on J722S EVM.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
---
 arch/arm64/boot/dts/ti/Makefile               |   4 +
 .../k3-j722s-evm-csi2-quad-tevi-ov5640.dtso   | 319 ++++++++++++++++++
 2 files changed, 323 insertions(+)
 create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-tevi-ov5640.dtso

diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index 9ae0917e5763..0370392abda8 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -120,6 +120,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-pcie1-ep.dtbo
 dtb-$(CONFIG_ARCH_K3) += k3-am67a-beagley-ai.dtb
 dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm.dtb
 dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo
+dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo
 
 # Boards with J784s4 SoC
 dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb
@@ -212,6 +213,8 @@ k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \
 	k3-j721s2-evm-pcie1-ep.dtbo
 k3-j722s-evm-csi2-quad-rpi-cam-imx219-dtbs := k3-j722s-evm.dtb \
 	k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo
+k3-j722s-evm-csi2-quad-tevi-ov5640-dtbs := k3-j722s-evm.dtb \
+	k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo
 k3-j784s4-evm-pcie0-pcie1-ep-dtbs := k3-j784s4-evm.dtb \
 	k3-j784s4-evm-pcie0-pcie1-ep.dtbo
 k3-j784s4-evm-quad-port-eth-exp1-dtbs := k3-j784s4-evm.dtb \
@@ -247,6 +250,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
 	k3-j721e-sk-csi2-dual-imx219.dtb \
 	k3-j721s2-evm-pcie1-ep.dtb \
 	k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtb \
+	k3-j722s-evm-csi2-quad-tevi-ov5640.dtb \
 	k3-j784s4-evm-pcie0-pcie1-ep.dtb \
 	k3-j784s4-evm-quad-port-eth-exp1.dtb \
 	k3-j784s4-evm-usxgmii-exp1-exp2.dtb
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-tevi-ov5640.dtso b/arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-tevi-ov5640.dtso
new file mode 100644
index 000000000000..f33f50465a07
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-tevi-ov5640.dtso
@@ -0,0 +1,319 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * 4 x TEVI OV5640 MIPI Camera module on RPI camera connector.
+ *
+ * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include "k3-pinctrl.h"
+
+&{/} {
+	clk_ov5640_fixed: ov5640-xclk {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <24000000>;
+	};
+};
+
+
+&main_pmx0 {
+	cam0_reset_pins_default: cam0-reset-pins-default {
+		pinctrl-single,pins = <
+			J722S_IOPAD(0x03c, PIN_OUTPUT, 7)
+		>;
+	};
+
+	cam1_reset_pins_default: cam1-reset-pins-default {
+		pinctrl-single,pins = <
+			J722S_IOPAD(0x044, PIN_OUTPUT, 7)
+		>;
+	};
+
+	cam2_reset_pins_default: cam2-reset-pins-default {
+		pinctrl-single,pins = <
+			J722S_IOPAD(0x04c, PIN_OUTPUT, 7)
+		>;
+	};
+
+	cam3_reset_pins_default: cam3-reset-pins-default {
+		pinctrl-single,pins = <
+			J722S_IOPAD(0x054, PIN_OUTPUT, 7)
+		>;
+	};
+};
+
+&exp1 {
+	p06-hog{
+		/* P06 - CSI01_MUX_SEL_2 */
+		gpio-hog;
+		gpios = <6 GPIO_ACTIVE_HIGH>;
+		output-high;
+		line-name = "CSI01_MUX_SEL_2";
+	};
+
+	p07-hog{
+		/* P01 - CSI23_MUX_SEL_2 */
+		gpio-hog;
+		gpios = <7 GPIO_ACTIVE_HIGH>;
+		output-high;
+		line-name = "CSI23_MUX_SEL_2";
+	};
+};
+
+&main_gpio0 {
+	p15-hog {
+		/* P15 - CSI2_CAMERA_GPIO1 */
+		gpio-hog;
+		gpios = <15 GPIO_ACTIVE_HIGH>;
+		output-high;
+		line-name = "CSI2_CAMERA_GPIO1";
+	};
+
+	p17-hog {
+		/* P17 - CSI2_CAMERA_GPIO2 */
+		gpio-hog;
+		gpios = <17 GPIO_ACTIVE_HIGH>;
+		output-high;
+		line-name = "CSI2_CAMERA_GPIO2";
+	};
+
+	p19-hog {
+		/* P19 - CSI2_CAMERA_GPIO3 */
+		gpio-hog;
+		gpios = <19 GPIO_ACTIVE_HIGH>;
+		output-high;
+		line-name = "CSI2_CAMERA_GPIO3";
+	};
+
+	p21-hog {
+		/* P21 - CSI2_CAMERA_GPIO4 */
+		gpio-hog;
+		gpios = <21 GPIO_ACTIVE_HIGH>;
+		output-high;
+		line-name = "CSI2_CAMERA_GPIO4";
+	};
+};
+
+&pca9543_0 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	i2c-alias-pool = /bits/ 16 <0x3c 0x3d>;
+
+	i2c@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0>;
+
+		ov5640_0: camera@3c {
+			compatible = "ovti,ov5640";
+			reg = <0x3c>;
+			clocks = <&clk_ov5640_fixed>;
+			clock-names = "xclk";
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&cam0_reset_pins_default>;
+
+			port {
+				csi2_cam0: endpoint {
+					remote-endpoint = <&csi2rx0_in_sensor>;
+					clock-lanes = <0>;
+					data-lanes = <1 2>;
+				};
+			};
+		};
+	};
+
+	i2c@1 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <1>;
+
+		ov5640_1: camera@3c {
+			compatible = "ovti,ov5640";
+			reg = <0x3c>;
+			clocks = <&clk_ov5640_fixed>;
+			clock-names = "xclk";
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&cam1_reset_pins_default>;
+
+			port {
+				csi2_cam1: endpoint {
+					remote-endpoint = <&csi2rx1_in_sensor>;
+					clock-lanes = <0>;
+					data-lanes = <1 2>;
+				};
+			};
+		};
+	};
+};
+
+&pca9543_1 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	i2c-alias-pool = /bits/ 16 <0x3c 0x3d>;
+
+	i2c@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0>;
+
+		ov5640_2: camera@3c {
+			compatible = "ovti,ov5640";
+			reg = <0x3c>;
+			clocks = <&clk_ov5640_fixed>;
+			clock-names = "xclk";
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&cam2_reset_pins_default>;
+
+			port {
+				csi2_cam2: endpoint {
+					remote-endpoint = <&csi2rx2_in_sensor>;
+					clock-lanes = <0>;
+					data-lanes = <1 2>;
+				};
+			};
+		};
+	};
+
+	i2c@1 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <1>;
+
+		ov5640_3: camera@3c {
+			compatible = "ovti,ov5640";
+			reg = <0x3c>;
+			clocks = <&clk_ov5640_fixed>;
+			clock-names = "xclk";
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&cam3_reset_pins_default>;
+
+			port {
+				csi2_cam3: endpoint {
+					remote-endpoint = <&csi2rx3_in_sensor>;
+					clock-lanes = <0>;
+					data-lanes = <1 2>;
+				};
+			};
+		};
+	};
+};
+
+&cdns_csi2rx0 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		csi0_port0: port@0 {
+			reg = <0>;
+			status = "okay";
+
+			csi2rx0_in_sensor: endpoint {
+				remote-endpoint = <&csi2_cam0>;
+				bus-type = <4>; /* CSI2 DPHY */
+				clock-lanes = <0>;
+				data-lanes = <1 2>;
+			};
+		};
+	};
+};
+
+&cdns_csi2rx1 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		csi1_port0: port@0 {
+			reg = <0>;
+			status = "okay";
+
+			csi2rx1_in_sensor: endpoint {
+				remote-endpoint = <&csi2_cam1>;
+				bus-type = <4>; /* CSI2 DPHY */
+				clock-lanes = <0>;
+				data-lanes = <1 2>;
+			};
+		};
+	};
+};
+
+&cdns_csi2rx2 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		csi2_port0: port@0 {
+			reg = <0>;
+			status = "okay";
+
+			csi2rx2_in_sensor: endpoint {
+				remote-endpoint = <&csi2_cam2>;
+				bus-type = <4>; /* CSI2 DPHY */
+				clock-lanes = <0>;
+				data-lanes = <1 2>;
+			};
+		};
+	};
+};
+
+&cdns_csi2rx3 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		csi3_port0: port@0 {
+			reg = <0>;
+			status = "okay";
+
+			csi2rx3_in_sensor: endpoint {
+				remote-endpoint = <&csi2_cam3>;
+				bus-type = <4>; /* CSI2 DPHY */
+				clock-lanes = <0>;
+				data-lanes = <1 2>;
+			};
+		};
+	};
+};
+
+&ti_csi2rx0 {
+	status = "okay";
+};
+
+&dphy0 {
+	status = "okay";
+};
+
+&ti_csi2rx1 {
+	status = "okay";
+};
+
+&dphy1 {
+	status = "okay";
+};
+
+
+&ti_csi2rx2 {
+	status = "okay";
+};
+
+&dphy2 {
+	status = "okay";
+};
+
+
+&ti_csi2rx3 {
+	status = "okay";
+};
+
+&dphy3 {
+	status = "okay";
+};
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [PATCH 0/5] Add J722S CSI support
  2025-02-18 18:54 [PATCH 0/5] Add J722S CSI support Vaishnav Achath
                   ` (4 preceding siblings ...)
  2025-02-18 18:54 ` [PATCH 5/5] arm64: dts: ti: k3-j722s-evm: Add overlay for TEVI OV5640 Vaishnav Achath
@ 2025-03-04  5:24 ` Yemike Abhilash Chandra
  2025-03-07 10:36 ` Vignesh Raghavendra
  6 siblings, 0 replies; 10+ messages in thread
From: Yemike Abhilash Chandra @ 2025-03-04  5:24 UTC (permalink / raw)
  To: Vaishnav Achath, nm, vigneshr, kristo, robh, krzk+dt, conor+dt,
	devicetree, linux-arm-kernel
  Cc: linux-kernel, jai.luthra


On 19/02/25 00:24, Vaishnav Achath wrote:
> This series adds support for CSI2RX capture on J722S EVM
> and enables IMX219 and OV5640 overlays to enables
> 4 sensors on EVM, this provides a reference for a user to
> enable a different sensor on any of the ports.
> 
> Test logs:
> IMX219: https://gist.github.com/vaishnavachath/60cc2ef257601f27f28a315f8cf669c4
> OV5640: https://gist.github.com/vaishnavachath/648202286d4d34d4d25f7c8c9db8b8bd
> 
> Vaishnav Achath (5):
>    arm64: dts: ti: k3-j722s-main: Add BCDMA CSI overrides
>    arm64: dts: ti: k3-j722s-main: Add CSI2RX nodes
>    arm64: dts: ti: k3-j722s-evm: Add camera peripherals
>    arm64: dts: ti: k3-j722s-evm: Add overlay for quad IMX219
>    arm64: dts: ti: k3-j722s-evm: Add overlay for TEVI OV5640
> 

For the series:
Reviewed-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>

>   arch/arm64/boot/dts/ti/Makefile               |   9 +
>   ...k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtso | 304 +++++++++++++++++
>   .../k3-j722s-evm-csi2-quad-tevi-ov5640.dtso   | 319 ++++++++++++++++++
>   arch/arm64/boot/dts/ti/k3-j722s-evm.dts       |  28 ++
>   arch/arm64/boot/dts/ti/k3-j722s-main.dtsi     | 193 +++++++++++
>   5 files changed, 853 insertions(+)
>   create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtso
>   create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-tevi-ov5640.dtso
> 

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH 0/5] Add J722S CSI support
  2025-02-18 18:54 [PATCH 0/5] Add J722S CSI support Vaishnav Achath
                   ` (5 preceding siblings ...)
  2025-03-04  5:24 ` [PATCH 0/5] Add J722S CSI support Yemike Abhilash Chandra
@ 2025-03-07 10:36 ` Vignesh Raghavendra
  2025-03-11  7:27   ` Vignesh Raghavendra
  6 siblings, 1 reply; 10+ messages in thread
From: Vignesh Raghavendra @ 2025-03-07 10:36 UTC (permalink / raw)
  To: nm, kristo, robh, krzk+dt, conor+dt, devicetree, linux-arm-kernel,
	Vaishnav Achath
  Cc: Vignesh Raghavendra, linux-kernel, jai.luthra, y-abhilashchandra

Hi Vaishnav Achath,

On Wed, 19 Feb 2025 00:24:47 +0530, Vaishnav Achath wrote:
> This series adds support for CSI2RX capture on J722S EVM
> and enables IMX219 and OV5640 overlays to enables
> 4 sensors on EVM, this provides a reference for a user to
> enable a different sensor on any of the ports.
> 
> Test logs:
> IMX219: https://gist.github.com/vaishnavachath/60cc2ef257601f27f28a315f8cf669c4
> OV5640: https://gist.github.com/vaishnavachath/648202286d4d34d4d25f7c8c9db8b8bd
> 
> [...]

I have applied the following to branch ti-k3-dts-next on [1].
Thank you!

[1/5] arm64: dts: ti: k3-j722s-main: Add BCDMA CSI overrides
      commit: fb1b230bf9c45f5d6579dc329c2aafcd1263b70a
[2/5] arm64: dts: ti: k3-j722s-main: Add CSI2RX nodes
      commit: 8fea4519f625e6c1b05078f2ecea252b7b28b06e
[3/5] arm64: dts: ti: k3-j722s-evm: Add camera peripherals
      commit: ce553288ad2368f0d27e47b39a23121a825a2b33
[4/5] arm64: dts: ti: k3-j722s-evm: Add overlay for quad IMX219
      commit: c24ccb1cd77fb44087b2f7008d99626796b33ca4
[5/5] arm64: dts: ti: k3-j722s-evm: Add overlay for TEVI OV5640
      commit: 938806652b0a3c90d67e7137c91708d06940b03d

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
--
Vignesh


^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH 5/5] arm64: dts: ti: k3-j722s-evm: Add overlay for TEVI OV5640
  2025-02-18 18:54 ` [PATCH 5/5] arm64: dts: ti: k3-j722s-evm: Add overlay for TEVI OV5640 Vaishnav Achath
@ 2025-03-07 12:15   ` Rob Herring
  0 siblings, 0 replies; 10+ messages in thread
From: Rob Herring @ 2025-03-07 12:15 UTC (permalink / raw)
  To: Vaishnav Achath
  Cc: nm, vigneshr, kristo, krzk+dt, conor+dt, devicetree,
	linux-arm-kernel, linux-kernel, jai.luthra, y-abhilashchandra

On Tue, Feb 18, 2025 at 12:55 PM Vaishnav Achath <vaishnav.a@ti.com> wrote:
>
> TechNexion TEVI OV5640 camera is a 5MP camera that can be used with
> J722S EVM through the 22-pin CSI-RX connector. Add a reference overlay
> for quad TEVI OV5640 modules on J722S EVM.
>
> Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
> ---
>  arch/arm64/boot/dts/ti/Makefile               |   4 +
>  .../k3-j722s-evm-csi2-quad-tevi-ov5640.dtso   | 319 ++++++++++++++++++
>  2 files changed, 323 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-tevi-ov5640.dtso
>
> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
> index 9ae0917e5763..0370392abda8 100644
> --- a/arch/arm64/boot/dts/ti/Makefile
> +++ b/arch/arm64/boot/dts/ti/Makefile
> @@ -120,6 +120,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-pcie1-ep.dtbo
>  dtb-$(CONFIG_ARCH_K3) += k3-am67a-beagley-ai.dtb
>  dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm.dtb
>  dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo
> +dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo
>
>  # Boards with J784s4 SoC
>  dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb
> @@ -212,6 +213,8 @@ k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \
>         k3-j721s2-evm-pcie1-ep.dtbo
>  k3-j722s-evm-csi2-quad-rpi-cam-imx219-dtbs := k3-j722s-evm.dtb \
>         k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo
> +k3-j722s-evm-csi2-quad-tevi-ov5640-dtbs := k3-j722s-evm.dtb \
> +       k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo
>  k3-j784s4-evm-pcie0-pcie1-ep-dtbs := k3-j784s4-evm.dtb \
>         k3-j784s4-evm-pcie0-pcie1-ep.dtbo
>  k3-j784s4-evm-quad-port-eth-exp1-dtbs := k3-j784s4-evm.dtb \
> @@ -247,6 +250,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
>         k3-j721e-sk-csi2-dual-imx219.dtb \
>         k3-j721s2-evm-pcie1-ep.dtb \
>         k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtb \
> +       k3-j722s-evm-csi2-quad-tevi-ov5640.dtb \
>         k3-j784s4-evm-pcie0-pcie1-ep.dtb \
>         k3-j784s4-evm-quad-port-eth-exp1.dtb \
>         k3-j784s4-evm-usxgmii-exp1-exp2.dtb
> diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-tevi-ov5640.dtso b/arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-tevi-ov5640.dtso
> new file mode 100644
> index 000000000000..f33f50465a07
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm-csi2-quad-tevi-ov5640.dtso
> @@ -0,0 +1,319 @@
> +// SPDX-License-Identifier: GPL-2.0-only OR MIT
> +/*
> + * 4 x TEVI OV5640 MIPI Camera module on RPI camera connector.
> + *
> + * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
> + */
> +
> +/dts-v1/;
> +/plugin/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include "k3-pinctrl.h"
> +
> +&{/} {
> +       clk_ov5640_fixed: ov5640-xclk {

clock-24000000 for the node name.

> +               compatible = "fixed-clock";
> +               #clock-cells = <0>;
> +               clock-frequency = <24000000>;
> +       };
> +};
> +
> +
> +&main_pmx0 {
> +       cam0_reset_pins_default: cam0-reset-pins-default {

Doesn't match the schema. Please test your changes:

pinctrl@f4000: 'cam0-reset-pins-default', 'cam1-reset-pins-default',
'cam2-reset-pins-default', 'cam3-reset-pins-default' do not match any
of the regexes: '-pins(-[0-9]+)?$|-pin$', 'pinctrl-[0-9]+'

> +               pinctrl-single,pins = <
> +                       J722S_IOPAD(0x03c, PIN_OUTPUT, 7)
> +               >;
> +       };
> +
> +       cam1_reset_pins_default: cam1-reset-pins-default {
> +               pinctrl-single,pins = <
> +                       J722S_IOPAD(0x044, PIN_OUTPUT, 7)
> +               >;
> +       };
> +
> +       cam2_reset_pins_default: cam2-reset-pins-default {
> +               pinctrl-single,pins = <
> +                       J722S_IOPAD(0x04c, PIN_OUTPUT, 7)
> +               >;
> +       };
> +
> +       cam3_reset_pins_default: cam3-reset-pins-default {
> +               pinctrl-single,pins = <
> +                       J722S_IOPAD(0x054, PIN_OUTPUT, 7)
> +               >;
> +       };
> +};
> +
> +&exp1 {
> +       p06-hog{
> +               /* P06 - CSI01_MUX_SEL_2 */
> +               gpio-hog;
> +               gpios = <6 GPIO_ACTIVE_HIGH>;
> +               output-high;
> +               line-name = "CSI01_MUX_SEL_2";
> +       };
> +
> +       p07-hog{
> +               /* P01 - CSI23_MUX_SEL_2 */
> +               gpio-hog;
> +               gpios = <7 GPIO_ACTIVE_HIGH>;
> +               output-high;
> +               line-name = "CSI23_MUX_SEL_2";
> +       };
> +};
> +
> +&main_gpio0 {
> +       p15-hog {
> +               /* P15 - CSI2_CAMERA_GPIO1 */
> +               gpio-hog;
> +               gpios = <15 GPIO_ACTIVE_HIGH>;
> +               output-high;
> +               line-name = "CSI2_CAMERA_GPIO1";
> +       };
> +
> +       p17-hog {
> +               /* P17 - CSI2_CAMERA_GPIO2 */
> +               gpio-hog;
> +               gpios = <17 GPIO_ACTIVE_HIGH>;
> +               output-high;
> +               line-name = "CSI2_CAMERA_GPIO2";
> +       };
> +
> +       p19-hog {
> +               /* P19 - CSI2_CAMERA_GPIO3 */
> +               gpio-hog;
> +               gpios = <19 GPIO_ACTIVE_HIGH>;
> +               output-high;
> +               line-name = "CSI2_CAMERA_GPIO3";
> +       };
> +
> +       p21-hog {
> +               /* P21 - CSI2_CAMERA_GPIO4 */
> +               gpio-hog;
> +               gpios = <21 GPIO_ACTIVE_HIGH>;
> +               output-high;
> +               line-name = "CSI2_CAMERA_GPIO4";
> +       };
> +};
> +
> +&pca9543_0 {
> +       #address-cells = <1>;
> +       #size-cells = <0>;
> +
> +       i2c-alias-pool = /bits/ 16 <0x3c 0x3d>;
> +
> +       i2c@0 {
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +               reg = <0>;
> +
> +               ov5640_0: camera@3c {
> +                       compatible = "ovti,ov5640";
> +                       reg = <0x3c>;
> +                       clocks = <&clk_ov5640_fixed>;
> +                       clock-names = "xclk";
> +
> +                       pinctrl-names = "default";
> +                       pinctrl-0 = <&cam0_reset_pins_default>;
> +
> +                       port {
> +                               csi2_cam0: endpoint {
> +                                       remote-endpoint = <&csi2rx0_in_sensor>;
> +                                       clock-lanes = <0>;
> +                                       data-lanes = <1 2>;
> +                               };
> +                       };
> +               };
> +       };
> +
> +       i2c@1 {
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +               reg = <1>;
> +
> +               ov5640_1: camera@3c {
> +                       compatible = "ovti,ov5640";
> +                       reg = <0x3c>;
> +                       clocks = <&clk_ov5640_fixed>;
> +                       clock-names = "xclk";
> +
> +                       pinctrl-names = "default";
> +                       pinctrl-0 = <&cam1_reset_pins_default>;
> +
> +                       port {
> +                               csi2_cam1: endpoint {
> +                                       remote-endpoint = <&csi2rx1_in_sensor>;
> +                                       clock-lanes = <0>;
> +                                       data-lanes = <1 2>;
> +                               };
> +                       };
> +               };
> +       };
> +};
> +
> +&pca9543_1 {
> +       #address-cells = <1>;
> +       #size-cells = <0>;
> +
> +       i2c-alias-pool = /bits/ 16 <0x3c 0x3d>;
> +
> +       i2c@0 {
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +               reg = <0>;
> +
> +               ov5640_2: camera@3c {
> +                       compatible = "ovti,ov5640";
> +                       reg = <0x3c>;
> +                       clocks = <&clk_ov5640_fixed>;
> +                       clock-names = "xclk";
> +
> +                       pinctrl-names = "default";
> +                       pinctrl-0 = <&cam2_reset_pins_default>;
> +
> +                       port {
> +                               csi2_cam2: endpoint {
> +                                       remote-endpoint = <&csi2rx2_in_sensor>;
> +                                       clock-lanes = <0>;
> +                                       data-lanes = <1 2>;
> +                               };
> +                       };
> +               };
> +       };
> +
> +       i2c@1 {
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +               reg = <1>;
> +
> +               ov5640_3: camera@3c {
> +                       compatible = "ovti,ov5640";
> +                       reg = <0x3c>;
> +                       clocks = <&clk_ov5640_fixed>;
> +                       clock-names = "xclk";
> +
> +                       pinctrl-names = "default";
> +                       pinctrl-0 = <&cam3_reset_pins_default>;
> +
> +                       port {
> +                               csi2_cam3: endpoint {
> +                                       remote-endpoint = <&csi2rx3_in_sensor>;
> +                                       clock-lanes = <0>;
> +                                       data-lanes = <1 2>;
> +                               };
> +                       };
> +               };
> +       };
> +};
> +
> +&cdns_csi2rx0 {
> +       ports {
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
> +               csi0_port0: port@0 {
> +                       reg = <0>;
> +                       status = "okay";
> +
> +                       csi2rx0_in_sensor: endpoint {
> +                               remote-endpoint = <&csi2_cam0>;
> +                               bus-type = <4>; /* CSI2 DPHY */
> +                               clock-lanes = <0>;
> +                               data-lanes = <1 2>;
> +                       };
> +               };
> +       };
> +};
> +
> +&cdns_csi2rx1 {
> +       ports {
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
> +               csi1_port0: port@0 {
> +                       reg = <0>;
> +                       status = "okay";
> +
> +                       csi2rx1_in_sensor: endpoint {
> +                               remote-endpoint = <&csi2_cam1>;
> +                               bus-type = <4>; /* CSI2 DPHY */
> +                               clock-lanes = <0>;
> +                               data-lanes = <1 2>;
> +                       };
> +               };
> +       };
> +};
> +
> +&cdns_csi2rx2 {
> +       ports {
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
> +               csi2_port0: port@0 {
> +                       reg = <0>;
> +                       status = "okay";
> +
> +                       csi2rx2_in_sensor: endpoint {
> +                               remote-endpoint = <&csi2_cam2>;
> +                               bus-type = <4>; /* CSI2 DPHY */
> +                               clock-lanes = <0>;
> +                               data-lanes = <1 2>;
> +                       };
> +               };
> +       };
> +};
> +
> +&cdns_csi2rx3 {
> +       ports {
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
> +               csi3_port0: port@0 {
> +                       reg = <0>;
> +                       status = "okay";
> +
> +                       csi2rx3_in_sensor: endpoint {
> +                               remote-endpoint = <&csi2_cam3>;
> +                               bus-type = <4>; /* CSI2 DPHY */
> +                               clock-lanes = <0>;
> +                               data-lanes = <1 2>;
> +                       };
> +               };
> +       };
> +};
> +
> +&ti_csi2rx0 {
> +       status = "okay";
> +};
> +
> +&dphy0 {
> +       status = "okay";
> +};
> +
> +&ti_csi2rx1 {
> +       status = "okay";
> +};
> +
> +&dphy1 {
> +       status = "okay";
> +};
> +
> +
> +&ti_csi2rx2 {
> +       status = "okay";
> +};
> +
> +&dphy2 {
> +       status = "okay";
> +};
> +
> +
> +&ti_csi2rx3 {
> +       status = "okay";
> +};
> +
> +&dphy3 {
> +       status = "okay";
> +};
> --
> 2.34.1
>

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH 0/5] Add J722S CSI support
  2025-03-07 10:36 ` Vignesh Raghavendra
@ 2025-03-11  7:27   ` Vignesh Raghavendra
  0 siblings, 0 replies; 10+ messages in thread
From: Vignesh Raghavendra @ 2025-03-11  7:27 UTC (permalink / raw)
  To: nm, kristo, robh, krzk+dt, conor+dt, devicetree, linux-arm-kernel,
	Vaishnav Achath
  Cc: linux-kernel, jai.luthra, y-abhilashchandra



On 07/03/25 16:06, Vignesh Raghavendra wrote:
> Hi Vaishnav Achath,
> 
> On Wed, 19 Feb 2025 00:24:47 +0530, Vaishnav Achath wrote:
>> This series adds support for CSI2RX capture on J722S EVM
>> and enables IMX219 and OV5640 overlays to enables
>> 4 sensors on EVM, this provides a reference for a user to
>> enable a different sensor on any of the ports.
>>
>> Test logs:
>> IMX219: https://gist.github.com/vaishnavachath/60cc2ef257601f27f28a315f8cf669c4
>> OV5640: https://gist.github.com/vaishnavachath/648202286d4d34d4d25f7c8c9db8b8bd
>>
>> [...]
> I have applied the following to branch ti-k3-dts-next on [1].
> Thank you!
> 
> [1/5] arm64: dts: ti: k3-j722s-main: Add BCDMA CSI overrides
>       commit: fb1b230bf9c45f5d6579dc329c2aafcd1263b70a
> [2/5] arm64: dts: ti: k3-j722s-main: Add CSI2RX nodes
>       commit: 8fea4519f625e6c1b05078f2ecea252b7b28b06e
> [3/5] arm64: dts: ti: k3-j722s-evm: Add camera peripherals
>       commit: ce553288ad2368f0d27e47b39a23121a825a2b33

> [4/5] arm64: dts: ti: k3-j722s-evm: Add overlay for quad IMX219
>       commit: c24ccb1cd77fb44087b2f7008d99626796b33ca4
> [5/5] arm64: dts: ti: k3-j722s-evm: Add overlay for TEVI OV5640
>       commit: 938806652b0a3c90d67e7137c91708d06940b03d

I have dropped 4 and 5 due to issues Rob pointed out in the other thread.

-- 
Regards
Vignesh
https://ti.com/opensource


^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2025-03-11  7:28 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-02-18 18:54 [PATCH 0/5] Add J722S CSI support Vaishnav Achath
2025-02-18 18:54 ` [PATCH 1/5] arm64: dts: ti: k3-j722s-main: Add BCDMA CSI overrides Vaishnav Achath
2025-02-18 18:54 ` [PATCH 2/5] arm64: dts: ti: k3-j722s-main: Add CSI2RX nodes Vaishnav Achath
2025-02-18 18:54 ` [PATCH 3/5] arm64: dts: ti: k3-j722s-evm: Add camera peripherals Vaishnav Achath
2025-02-18 18:54 ` [PATCH 4/5] arm64: dts: ti: k3-j722s-evm: Add overlay for quad IMX219 Vaishnav Achath
2025-02-18 18:54 ` [PATCH 5/5] arm64: dts: ti: k3-j722s-evm: Add overlay for TEVI OV5640 Vaishnav Achath
2025-03-07 12:15   ` Rob Herring
2025-03-04  5:24 ` [PATCH 0/5] Add J722S CSI support Yemike Abhilash Chandra
2025-03-07 10:36 ` Vignesh Raghavendra
2025-03-11  7:27   ` Vignesh Raghavendra

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