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From: David Laight <david.laight.linux@gmail.com>
To: Vincent Mailhol <mailhol.vincent@wanadoo.fr>
Cc: Yury Norov <yury.norov@gmail.com>,
	Lucas De Marchi <lucas.demarchi@intel.com>,
	Rasmus Villemoes <linux@rasmusvillemoes.dk>,
	Jani Nikula <jani.nikula@linux.intel.com>,
	Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>,
	Tvrtko Ursulin <tursulin@ursulin.net>,
	David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
	Andrew Morton <akpm@linux-foundation.org>,
	linux-kernel@vger.kernel.org, intel-gfx@lists.freedesktop.org,
	dri-devel@lists.freedesktop.org,
	Andi Shyti <andi.shyti@linux.intel.com>,
	David Laight <David.Laight@ACULAB.COM>,
	Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Subject: Re: [PATCH v5 1/7] bits: split the definition of the asm and non-asm GENMASK()
Date: Sun, 9 Mar 2025 01:58:53 +0000	[thread overview]
Message-ID: <20250309015853.01412484@pumpkin> (raw)
In-Reply-To: <bdce7d99-7f02-4667-acda-9ffc62c92af2@wanadoo.fr>

On Fri, 7 Mar 2025 18:58:08 +0900
Vincent Mailhol <mailhol.vincent@wanadoo.fr> wrote:

> On 07/03/2025 at 04:23, David Laight wrote:
> > On Thu, 06 Mar 2025 20:29:52 +0900
> > Vincent Mailhol via B4 Relay <devnull+mailhol.vincent.wanadoo.fr@kernel.org> wrote:
> >   
> >> From: Vincent Mailhol <mailhol.vincent@wanadoo.fr>
> >>
> >> In an upcoming change, GENMASK() and its friends will indirectly
> >> depend on sizeof() which is not available in asm.
> >>
> >> Instead of adding further complexity to __GENMASK() to make it work
> >> for both asm and non asm, just split the definition of the two
> >> variants.  
> > ...  
> >> +#else /* defined(__ASSEMBLY__) */
> >> +
> >> +#define GENMASK(h, l)		__GENMASK(h, l)
> >> +#define GENMASK_ULL(h, l)	__GENMASK_ULL(h, l)  
> > 
> > What do those actually expand to now?
> > As I've said a few times both UL(0) and ULL(0) are just (0) for __ASSEMBLY__
> > so the expansions of __GENMASK() and __GENMASK_ULL() contained the
> > same numeric constants.  
> 
> Indeed, in asm, the UL(0) and ULL(0) expands to the same thing: 0.
> 
> But the two macros still expand to something different on 32 bits
> architectures:
> 
>   * __GENMASK:
> 
>       (((~(0)) << (l)) & (~(0) >> (32 - 1 - (h))))
> 
>   * __GENMASK_ULL:
> 
>       (((~(0)) << (l)) & (~(0) >> (64 - 1 - (h))))
> 
> On 64 bits architecture these are the same.

I've just fed those into godbolt (https://www.godbolt.org/z/Ter6WE9qE) as:
int fi(void)
{
    int v;
    asm("mov $(((~(0)) << (8)) & (~(0) >> (32 - 1 - (15)))),%0": "=r" (v));
    return v -(((~(0u)) << (8)) & (~(0u) >> (32 - 1 - (15))));
}

gas warns:
<source>:4: Warning: 0xffffffffff00 shortened to 0xffffff00

unsigned long long fll(void)
{
    unsigned long long v;
    asm("mov $(((~(0)) << (8)) & (~(0) >> (64 - 1 - (15)))),%0": "=r" (v));
    return v -(((~(0ull)) << (8)) & (~(0ull) >> (64 - 1 - (15))));
}

(for other architectures you'll need to change the opcode)

For x86 and x86-32 the assembler seems to be doing 64bit maths with unsigned
right shifts - so the second function (with the 64 in it) generates 0xff00.
I doubt a 32bit only assembler does 64bit maths, but the '>> 48' above
might get masked to a '>> 16' by the cpu and generate the correct result.

So __GENMASK() is likely to be broken for any assembler that supports 64bits
when generating 32bit code.
__GENMASK_ULL() works (assuming all have unsigned >>) on 64bit assemblers
(even when generating 32bit code). It may work on some 32bit assemblers.

Since most uses in the header files will be GENMASK() I doubt (hope) no
asm code actually uses the values!
The headers assemble - but that is about all that can be said.

Bags of worms :-)

	David


  parent reply	other threads:[~2025-03-09  1:59 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-06 11:29 [PATCH v5 0/7] bits: Fixed-type GENMASK()/BIT() Vincent Mailhol via B4 Relay
2025-03-06 11:29 ` [PATCH v5 1/7] bits: split the definition of the asm and non-asm GENMASK() Vincent Mailhol via B4 Relay
2025-03-06 13:05   ` Andy Shevchenko
2025-03-06 15:07     ` Vincent Mailhol
2025-03-06 17:51       ` Andy Shevchenko
2025-03-06 14:34   ` Lucas De Marchi
2025-03-06 17:10     ` Vincent Mailhol
2025-03-13  4:16       ` Lucas De Marchi
2025-03-13  6:06         ` Vincent Mailhol
2025-03-06 19:23   ` David Laight
2025-03-07  9:58     ` Vincent Mailhol
2025-03-07 13:27       ` David Laight
2025-03-07 15:50         ` Vincent Mailhol
2025-03-09  1:58       ` David Laight [this message]
2025-03-09 10:23         ` David Laight
2025-03-10 10:46           ` Vincent Mailhol
2025-03-06 11:29 ` [PATCH v5 2/7] bits: introduce fixed-type genmasks Vincent Mailhol via B4 Relay
2025-03-06 13:08   ` Andy Shevchenko
2025-03-06 16:08     ` Vincent Mailhol
2025-03-06 17:53       ` Andy Shevchenko
2025-03-06 11:29 ` [PATCH v5 3/7] bits: introduce fixed-type BIT_U*() Vincent Mailhol via B4 Relay
2025-03-06 11:29 ` [PATCH v5 4/7] drm/i915: Convert REG_GENMASK*() to fixed-width GENMASK_U*() Vincent Mailhol via B4 Relay
2025-03-06 11:29 ` [PATCH v5 5/7] test_bits: add tests for __GENMASK() and __GENMASK_ULL() Vincent Mailhol via B4 Relay
2025-03-13  4:13   ` Lucas De Marchi
2025-03-13  6:00     ` Vincent Mailhol
2025-03-13 13:15       ` Lucas De Marchi
2025-03-06 11:29 ` [PATCH v5 6/7] test_bits: add tests for GENMASK_U*() Vincent Mailhol via B4 Relay
2025-03-06 11:29 ` [PATCH v5 7/7] test_bits: add tests for BIT_U*() Vincent Mailhol via B4 Relay
2025-03-06 13:11   ` Andy Shevchenko
2025-03-06 16:08     ` Vincent Mailhol
2025-03-06 17:55       ` Andy Shevchenko
2025-03-07 10:11         ` Vincent Mailhol
2025-03-07 16:07           ` Andy Shevchenko
2025-03-07 16:47             ` Vincent Mailhol
2025-03-13  4:10   ` Lucas De Marchi
2025-03-06 13:02 ` [PATCH v5 0/7] bits: Fixed-type GENMASK()/BIT() Andy Shevchenko
2025-03-06 14:56   ` Vincent Mailhol
2025-03-06 13:12 ` Andy Shevchenko

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