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* [PATCH] arm64: dts: cavium: thunder-88xx: Add missing PL011 "uartclk"
@ 2025-12-16 18:01 Rob Herring (Arm)
  2025-12-22 10:05 ` Krzysztof Kozlowski
  0 siblings, 1 reply; 2+ messages in thread
From: Rob Herring (Arm) @ 2025-12-16 18:01 UTC (permalink / raw)
  To: soc, Krzysztof Kozlowski, Conor Dooley; +Cc: devicetree, linux-kernel

The PL011 IP has 2 clock inputs for UART core/baud and APB bus. The
Thunder2 SoC is missing the core "uartclk". In this case, the Linux
driver uses single clock for both clock inputs. Let's assume that's how
the h/w is wired and make the DT reflect that.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
---
SoC maintainers, Please take this directly.

 arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
index cc860a80af51..70430cb2b053 100644
--- a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
+++ b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
@@ -401,16 +401,16 @@ uaa0: serial@87e024000000 {
 			compatible = "arm,pl011", "arm,primecell";
 			reg = <0x87e0 0x24000000 0x0 0x1000>;
 			interrupts = <1 21 4>;
-			clocks = <&refclk50mhz>;
-			clock-names = "apb_pclk";
+			clocks = <&refclk50mhz>, <&refclk50mhz>;
+			clock-names = "uartclk", "apb_pclk";
 		};
 
 		uaa1: serial@87e025000000 {
 			compatible = "arm,pl011", "arm,primecell";
 			reg = <0x87e0 0x25000000 0x0 0x1000>;
 			interrupts = <1 22 4>;
-			clocks = <&refclk50mhz>;
-			clock-names = "apb_pclk";
+			clocks = <&refclk50mhz>, <&refclk50mhz>;
+			clock-names = "uartclk", "apb_pclk";
 		};
 	};
 };
-- 
2.51.0


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH] arm64: dts: cavium: thunder-88xx: Add missing PL011 "uartclk"
  2025-12-16 18:01 [PATCH] arm64: dts: cavium: thunder-88xx: Add missing PL011 "uartclk" Rob Herring (Arm)
@ 2025-12-22 10:05 ` Krzysztof Kozlowski
  0 siblings, 0 replies; 2+ messages in thread
From: Krzysztof Kozlowski @ 2025-12-22 10:05 UTC (permalink / raw)
  To: soc, Krzysztof Kozlowski, Conor Dooley, Rob Herring (Arm)
  Cc: devicetree, linux-kernel


On Tue, 16 Dec 2025 12:01:37 -0600, Rob Herring (Arm) wrote:
> The PL011 IP has 2 clock inputs for UART core/baud and APB bus. The
> Thunder2 SoC is missing the core "uartclk". In this case, the Linux
> driver uses single clock for both clock inputs. Let's assume that's how
> the h/w is wired and make the DT reflect that.
> 
> 

Applied, thanks!

[1/1] arm64: dts: cavium: thunder-88xx: Add missing PL011 "uartclk"
      https://git.kernel.org/krzk/linux-dt/c/15e3ce53673289624bab4e6a60207af4775f4a38

Best regards,
-- 
Krzysztof Kozlowski <krzk@kernel.org>


^ permalink raw reply	[flat|nested] 2+ messages in thread

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2025-12-16 18:01 [PATCH] arm64: dts: cavium: thunder-88xx: Add missing PL011 "uartclk" Rob Herring (Arm)
2025-12-22 10:05 ` Krzysztof Kozlowski

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