[PATCH v4 05/10] KVM: SEV: Define SVM_SEV_FEAT_* flags using BIT_ULL()

[Kim Phillips <kim.phillips@amd.com>]

The VMSA's SEV_FEATURES field is 64 bits wide: struct sev_es_save_area's
sev_features is u64, as are the VMCB allowed_sev_features/guest_sev_features
controls and KVM's vmsa_features / sev_supported_vmsa_features tracking.
Define the SVM_SEV_FEAT_* flags with BIT_ULL() instead of BIT() to match
that width.

No functional change on x86-64, where unsigned long is already 64 bits and
every flag defined today is below bit 32.  It makes the flag type match the
architectural field, keeps composite masks such as the upcoming
SVM_SEV_FEAT_SNP_ONLY_MASK 64-bit, and avoids a latent trap should a future
flag land above bit 31.  The adjacent VMCB_ALLOWED_SEV_FEATURES_VALID
already uses BIT_ULL(63).

Signed-off-by: Kim Phillips <kim.phillips@amd.com>
Assisted-by: ClaudeCode:claude-opus-4-7
---
 arch/x86/include/asm/svm.h | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h
index aa63431ba92c..52c900bf7e20 100644
--- a/arch/x86/include/asm/svm.h
+++ b/arch/x86/include/asm/svm.h
@@ -305,11 +305,11 @@ static_assert((AVIC_MAX_PHYSICAL_ID & AVIC_PHYSICAL_MAX_INDEX_MASK) == AVIC_MAX_
 static_assert((X2AVIC_MAX_PHYSICAL_ID & AVIC_PHYSICAL_MAX_INDEX_MASK) == X2AVIC_MAX_PHYSICAL_ID);
 static_assert((X2AVIC_4K_MAX_PHYSICAL_ID & AVIC_PHYSICAL_MAX_INDEX_MASK) == X2AVIC_4K_MAX_PHYSICAL_ID);
 
-#define SVM_SEV_FEAT_SNP_ACTIVE				BIT(0)
-#define SVM_SEV_FEAT_RESTRICTED_INJECTION		BIT(3)
-#define SVM_SEV_FEAT_ALTERNATE_INJECTION		BIT(4)
-#define SVM_SEV_FEAT_DEBUG_SWAP				BIT(5)
-#define SVM_SEV_FEAT_SECURE_TSC				BIT(9)
+#define SVM_SEV_FEAT_SNP_ACTIVE				BIT_ULL(0)
+#define SVM_SEV_FEAT_RESTRICTED_INJECTION		BIT_ULL(3)
+#define SVM_SEV_FEAT_ALTERNATE_INJECTION		BIT_ULL(4)
+#define SVM_SEV_FEAT_DEBUG_SWAP				BIT_ULL(5)
+#define SVM_SEV_FEAT_SECURE_TSC				BIT_ULL(9)
 
 #define VMCB_ALLOWED_SEV_FEATURES_VALID			BIT_ULL(63)
 
-- 
2.43.0