* [PATCH] pinctrl: airoha: fix wrong value for PCIe reset pin
@ 2026-08-05 8:41 Christian Marangi
2026-08-05 10:22 ` Benjamin Larsson
2026-08-05 12:13 ` Lorenzo Bianconi
0 siblings, 2 replies; 3+ messages in thread
From: Christian Marangi @ 2026-08-05 8:41 UTC (permalink / raw)
To: Lorenzo Bianconi, Linus Walleij, Benjamin Larsson,
AngeloGioacchino Del Regno, linux-mediatek, linux-gpio,
linux-kernel
Cc: Christian Marangi, stable
The PCIe reset pin actually require the bit to be set as 0 to work as PCIe
reset pin. When the bit is set as 1, then the PCIe reset pin act as a GPIO
for GPIO44, GPIO45 and GPIO46.
Cc: stable@vger.kernel.org
Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC")
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
drivers/pinctrl/airoha/pinctrl-airoha.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/pinctrl/airoha/pinctrl-airoha.c b/drivers/pinctrl/airoha/pinctrl-airoha.c
index 04b4424c688b..6409572c0a4b 100644
--- a/drivers/pinctrl/airoha/pinctrl-airoha.c
+++ b/drivers/pinctrl/airoha/pinctrl-airoha.c
@@ -1412,7 +1412,7 @@ static const struct airoha_pinctrl_func_group pcie_reset_func_group[] = {
AIROHA_FUNC_MUX,
REG_GPIO_PON_MODE,
GPIO_PCIE_RESET0_MASK,
- GPIO_PCIE_RESET0_MASK
+ 0
},
.regmap_size = 1,
}, {
@@ -1421,7 +1421,7 @@ static const struct airoha_pinctrl_func_group pcie_reset_func_group[] = {
AIROHA_FUNC_MUX,
REG_GPIO_PON_MODE,
GPIO_PCIE_RESET1_MASK,
- GPIO_PCIE_RESET1_MASK
+ 0
},
.regmap_size = 1,
}, {
@@ -1430,7 +1430,7 @@ static const struct airoha_pinctrl_func_group pcie_reset_func_group[] = {
AIROHA_FUNC_MUX,
REG_GPIO_PON_MODE,
GPIO_PCIE_RESET2_MASK,
- GPIO_PCIE_RESET2_MASK
+ 0
},
.regmap_size = 1,
},
--
2.53.0
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH] pinctrl: airoha: fix wrong value for PCIe reset pin
2026-08-05 8:41 [PATCH] pinctrl: airoha: fix wrong value for PCIe reset pin Christian Marangi
@ 2026-08-05 10:22 ` Benjamin Larsson
2026-08-05 12:13 ` Lorenzo Bianconi
1 sibling, 0 replies; 3+ messages in thread
From: Benjamin Larsson @ 2026-08-05 10:22 UTC (permalink / raw)
To: Christian Marangi, Lorenzo Bianconi, Linus Walleij,
AngeloGioacchino Del Regno, linux-mediatek, linux-gpio,
linux-kernel, Mikhail Kshevetskiy
Cc: stable
On 05/08/2026 10:41, Christian Marangi wrote:
> The PCIe reset pin actually require the bit to be set as 0 to work as PCIe
> reset pin. When the bit is set as 1, then the PCIe reset pin act as a GPIO
> for GPIO44, GPIO45 and GPIO46.
>
> Cc: stable@vger.kernel.org
> Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC")
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> ---
> drivers/pinctrl/airoha/pinctrl-airoha.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pinctrl/airoha/pinctrl-airoha.c b/drivers/pinctrl/airoha/pinctrl-airoha.c
> index 04b4424c688b..6409572c0a4b 100644
> --- a/drivers/pinctrl/airoha/pinctrl-airoha.c
> +++ b/drivers/pinctrl/airoha/pinctrl-airoha.c
> @@ -1412,7 +1412,7 @@ static const struct airoha_pinctrl_func_group pcie_reset_func_group[] = {
> AIROHA_FUNC_MUX,
> REG_GPIO_PON_MODE,
> GPIO_PCIE_RESET0_MASK,
> - GPIO_PCIE_RESET0_MASK
> + 0
> },
> .regmap_size = 1,
> }, {
> @@ -1421,7 +1421,7 @@ static const struct airoha_pinctrl_func_group pcie_reset_func_group[] = {
> AIROHA_FUNC_MUX,
> REG_GPIO_PON_MODE,
> GPIO_PCIE_RESET1_MASK,
> - GPIO_PCIE_RESET1_MASK
> + 0
> },
> .regmap_size = 1,
> }, {
> @@ -1430,7 +1430,7 @@ static const struct airoha_pinctrl_func_group pcie_reset_func_group[] = {
> AIROHA_FUNC_MUX,
> REG_GPIO_PON_MODE,
> GPIO_PCIE_RESET2_MASK,
> - GPIO_PCIE_RESET2_MASK
> + 0
> },
> .regmap_size = 1,
> },
Reviewed-by: Benjamin Larsson <benjamin.larsson@genexis.eu>
MvH
Benjamin Larsson
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH] pinctrl: airoha: fix wrong value for PCIe reset pin
2026-08-05 8:41 [PATCH] pinctrl: airoha: fix wrong value for PCIe reset pin Christian Marangi
2026-08-05 10:22 ` Benjamin Larsson
@ 2026-08-05 12:13 ` Lorenzo Bianconi
1 sibling, 0 replies; 3+ messages in thread
From: Lorenzo Bianconi @ 2026-08-05 12:13 UTC (permalink / raw)
To: Christian Marangi
Cc: Linus Walleij, Benjamin Larsson, AngeloGioacchino Del Regno,
linux-mediatek, linux-gpio, linux-kernel, stable
[-- Attachment #1: Type: text/plain, Size: 1563 bytes --]
> The PCIe reset pin actually require the bit to be set as 0 to work as PCIe
> reset pin. When the bit is set as 1, then the PCIe reset pin act as a GPIO
> for GPIO44, GPIO45 and GPIO46.
>
> Cc: stable@vger.kernel.org
> Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC")
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Acked-by: Lorenzo Bianconi <lorenzo@kernel.org>
> ---
> drivers/pinctrl/airoha/pinctrl-airoha.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pinctrl/airoha/pinctrl-airoha.c b/drivers/pinctrl/airoha/pinctrl-airoha.c
> index 04b4424c688b..6409572c0a4b 100644
> --- a/drivers/pinctrl/airoha/pinctrl-airoha.c
> +++ b/drivers/pinctrl/airoha/pinctrl-airoha.c
> @@ -1412,7 +1412,7 @@ static const struct airoha_pinctrl_func_group pcie_reset_func_group[] = {
> AIROHA_FUNC_MUX,
> REG_GPIO_PON_MODE,
> GPIO_PCIE_RESET0_MASK,
> - GPIO_PCIE_RESET0_MASK
> + 0
> },
> .regmap_size = 1,
> }, {
> @@ -1421,7 +1421,7 @@ static const struct airoha_pinctrl_func_group pcie_reset_func_group[] = {
> AIROHA_FUNC_MUX,
> REG_GPIO_PON_MODE,
> GPIO_PCIE_RESET1_MASK,
> - GPIO_PCIE_RESET1_MASK
> + 0
> },
> .regmap_size = 1,
> }, {
> @@ -1430,7 +1430,7 @@ static const struct airoha_pinctrl_func_group pcie_reset_func_group[] = {
> AIROHA_FUNC_MUX,
> REG_GPIO_PON_MODE,
> GPIO_PCIE_RESET2_MASK,
> - GPIO_PCIE_RESET2_MASK
> + 0
> },
> .regmap_size = 1,
> },
> --
> 2.53.0
>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2026-08-05 12:13 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-08-05 8:41 [PATCH] pinctrl: airoha: fix wrong value for PCIe reset pin Christian Marangi
2026-08-05 10:22 ` Benjamin Larsson
2026-08-05 12:13 ` Lorenzo Bianconi
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox