From: Ben Horgan <ben.horgan@arm.com>
To: "Chen, Yu C" <yu.c.chen@intel.com>,
Reinette Chatre <reinette.chatre@intel.com>
Cc: Borislav Petkov <bp@alien8.de>,
Thomas Gleixner <tglx@linutronix.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
Peter Newman <peternewman@google.com>,
"x86@kernel.org" <x86@kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Tony Luck <tony.luck@intel.com>,
Dave Martin <Dave.Martin@arm.com>,
James Morse <james.morse@arm.com>,
Drew Fustini <fustini@kernel.org>,
Babu Moger <babu.moger@amd.com>, Fenghua Yu <fenghuay@nvidia.com>,
chen.yu@linux.dev
Subject: Re: [RFC] mpam,x86,fs/resctrl: Generic schema description Proof of Concept
Date: Thu, 2 Jul 2026 15:27:22 +0100 [thread overview]
Message-ID: <208b36c8-985a-4ff2-8ecd-b9376bb4eba4@arm.com> (raw)
In-Reply-To: <6f7a02ec-03fc-4c9c-af86-239f98b9b903@intel.com>
Hi Chenyu,
On 6/26/26 16:46, Chen, Yu C wrote:
> Hi Reinette,
>
> On 6/11/2026 11:45 PM, Reinette Chatre wrote:
>> Hi Chenyu,
>>
>> On 6/10/26 8:26 PM, Chen, Yu C wrote:
>>> On 6/10/2026 11:59 PM, Reinette Chatre wrote:
>>> [ ... ]
>>>
>>>>
>>>> - This implies that all current and future ERDT capable systems
>>>> will keep
>>>> supporting MSR access with the legacy "percentage based
>>>> control". Is this
>>>> accurate? What will behavior be on an ERDT system that does not
>>>> support
>>>> MSR access with the percentage-based control?
>>>
>>> Would it make sense to encourage users to switch to MMIO-based access
>>> if the
>>> platform replaces MSR interfaces with MMIO-based ones? One issue with
>>> emulating
>>> MSR-based access is that there may not be a strict 1:1 mapping
>>> between the MSR
>>> range and the MMIO range. Additionally, I am unsure whether both are
>>> strictly
>>> linearly scalable, so it could be challenging to create a proper
>>> mapping for
>>> msr_value_emulated = map(mmio_value) IIUC.
>>
>> resctrl needs to continue to offer the MB percentage based control to
>> not break any
>> existing tools that may take a while to transition to the new control
>> interface.
>>
>> I believe all architectures will encourage their users to use the
>> finer grained
>> controls while I also expect users and their tools would gradually
>> switch by themselves
>> to benefit from the improved capabilities.
>>
>
> The following are current thoughts on how Control B can emulate Control A.
> May I know if this direction is acceptable?
>
> The main idea is that, Legacy MBA controller delegates to region-aware MBA
> controller via a pointer, with its hw_update function converting
> percentages
> to the target's value range.
>
> struct resctrl_hw_ctrl {
> struct resctrl_ctrl r_ctrl;
> unsigned int msr_base;
> void (*hw_update)(struct hw_param *m);
> /* points to the backing controller */
> struct resctrl_ctrl *r_ctrl_emul; <-- newly added
> };
What's the reason for this being in the architecture specific code? I
would expect that the resctrl core code would need to know about any
emulation even if the exact emulation is architecture specific?
Thanks,
Ben
>
> On boot, region-aware controllers shall be created first, followed by the
> legacy MBA controller. When ERDT is enabled for legacy MBA, hw_update is
> assigned to mba_emul_update() instead of mba_wrmsr_intel(). Meanwhile,
> r_ctrl_emul points to the MAX controller of region0.
>
> In mba_emul_update(), the legacy MSR value is scaled to the range of
> region0
> MAX controller by referencing r_ctrl_emul->membw.max_bw and r_ctr_emul-
>>membw.min_bw.
> This maps the original input range [1, 100] to a new range [1, L], where
> L <= 255.
>
> This emulation logic can also be extended to other controllers.
>
> thanks,
> Chenyu
>
>
>
next prev parent reply other threads:[~2026-07-02 14:27 UTC|newest]
Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-29 18:06 [RFC] mpam,x86,fs/resctrl: Generic schema description Proof of Concept Reinette Chatre
2026-06-02 20:23 ` Babu Moger
2026-06-02 22:56 ` Reinette Chatre
2026-06-03 1:14 ` Moger, Babu
2026-06-03 3:55 ` Reinette Chatre
2026-06-03 14:40 ` Babu Moger
2026-06-02 23:32 ` Chen, Yu C
2026-06-03 3:45 ` Reinette Chatre
2026-06-03 11:53 ` Chen, Yu C
2026-06-04 16:37 ` Reinette Chatre
2026-06-05 15:43 ` Chen, Yu C
2026-06-05 16:20 ` Reinette Chatre
2026-06-03 15:15 ` Ben Horgan
2026-06-03 19:34 ` Drew Fustini
2026-06-04 11:24 ` Ben Horgan
2026-06-04 17:38 ` Drew Fustini
2026-06-12 1:30 ` Shaopeng Tan (Fujitsu)
2026-06-17 15:29 ` Reinette Chatre
2026-06-19 1:42 ` Shaopeng Tan (Fujitsu)
2026-06-22 16:10 ` Reinette Chatre
2026-06-23 5:04 ` Shaopeng Tan (Fujitsu)
2026-06-04 21:05 ` Reinette Chatre
2026-06-05 19:35 ` Drew Fustini
2026-06-06 5:10 ` Drew Fustini
2026-06-06 5:23 ` Drew Fustini
2026-06-04 17:43 ` Reinette Chatre
2026-06-05 14:53 ` Ben Horgan
2026-06-05 15:39 ` Reinette Chatre
2026-06-05 16:37 ` Ben Horgan
2026-06-08 16:16 ` Reinette Chatre
2026-06-09 10:10 ` Ben Horgan
2026-06-09 15:28 ` Reinette Chatre
2026-06-09 16:37 ` Ben Horgan
2026-06-09 17:41 ` Reinette Chatre
2026-06-10 7:09 ` Chen, Yu C
2026-06-10 14:27 ` Chen, Yu C
2026-06-10 16:13 ` Reinette Chatre
2026-06-10 17:57 ` Chen, Yu C
2026-06-10 18:10 ` Reinette Chatre
2026-06-10 15:59 ` Reinette Chatre
2026-06-10 18:05 ` Chen, Yu C
2026-06-11 3:26 ` Chen, Yu C
2026-06-11 15:45 ` Reinette Chatre
2026-06-26 15:46 ` Chen, Yu C
2026-07-02 14:27 ` Ben Horgan [this message]
2026-07-03 9:01 ` Chen, Yu C
2026-06-10 4:31 ` Drew Fustini
2026-06-10 15:14 ` Reinette Chatre
2026-06-03 18:46 ` Luck, Tony
2026-06-04 10:02 ` Ben Horgan
2026-06-04 21:42 ` Reinette Chatre
2026-07-08 12:56 ` Chen, Yu C
2026-06-03 22:14 ` Drew Fustini
2026-06-04 21:47 ` Reinette Chatre
2026-06-05 19:48 ` Drew Fustini
2026-06-15 21:05 ` Moger, Babu
2026-06-17 17:18 ` Reinette Chatre
2026-06-17 20:29 ` Babu Moger
2026-06-24 19:08 ` Fenghua Yu
2026-06-24 22:22 ` Reinette Chatre
2026-06-25 1:26 ` Fenghua Yu
2026-06-25 15:43 ` Reinette Chatre
2026-07-10 20:59 ` Fenghua Yu
2026-07-02 13:37 ` Ben Horgan
2026-07-02 15:16 ` Fenghua Yu
2026-07-03 13:42 ` Ben Horgan
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