From: Drew Fustini <fustini@kernel.org>
To: Reinette Chatre <reinette.chatre@intel.com>
Cc: Ben Horgan <ben.horgan@arm.com>, Tony Luck <tony.luck@intel.com>,
James Morse <james.morse@arm.com>,
Dave Martin <Dave.Martin@arm.com>,
Babu Moger <babu.moger@amd.com>, Fenghua Yu <fenghuay@nvidia.com>,
Chen Yu <yu.c.chen@intel.com>, Borislav Petkov <bp@alien8.de>,
Thomas Gleixner <tglx@linutronix.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
Peter Newman <peternewman@google.com>,
"x86@kernel.org" <x86@kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [RFC] mpam,x86,fs/resctrl: Generic schema description Proof of Concept
Date: Tue, 9 Jun 2026 21:31:04 -0700 [thread overview]
Message-ID: <aijoiKwzPqBHltgY@thelio> (raw)
In-Reply-To: <a84af037-6439-4362-be07-d45143e06309@intel.com>
On Tue, Jun 09, 2026 at 08:28:09AM -0700, Reinette Chatre wrote:
> - I see that the default of zero for the MIN control can be appropriate. For the
> usage of resctrl_get_default_ctrlval() when creating a new control group this
> could be ok as a general setting since the user is expected to, after creating
> the resource group, adjust control values as required by the workloads it will
> contain. I need to make sure about this from all architectures and if 0 is not
> ok then we could use Drew's suggestion of architecture providing a specific reset
> value.
Unfortunately, 0 will not work for the default value for Reserved
bandwidth Blocks (Rbwb) in RISC-V CBQRI as it is required by the spec to
be at least 1.
Thanks,
Drew
next prev parent reply other threads:[~2026-06-10 4:31 UTC|newest]
Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-29 18:06 [RFC] mpam,x86,fs/resctrl: Generic schema description Proof of Concept Reinette Chatre
2026-06-02 20:23 ` Babu Moger
2026-06-02 22:56 ` Reinette Chatre
2026-06-03 1:14 ` Moger, Babu
2026-06-03 3:55 ` Reinette Chatre
2026-06-03 14:40 ` Babu Moger
2026-06-02 23:32 ` Chen, Yu C
2026-06-03 3:45 ` Reinette Chatre
2026-06-03 11:53 ` Chen, Yu C
2026-06-04 16:37 ` Reinette Chatre
2026-06-05 15:43 ` Chen, Yu C
2026-06-05 16:20 ` Reinette Chatre
2026-06-03 15:15 ` Ben Horgan
2026-06-03 19:34 ` Drew Fustini
2026-06-04 11:24 ` Ben Horgan
2026-06-04 17:38 ` Drew Fustini
2026-06-12 1:30 ` Shaopeng Tan (Fujitsu)
2026-06-17 15:29 ` Reinette Chatre
2026-06-19 1:42 ` Shaopeng Tan (Fujitsu)
2026-06-22 16:10 ` Reinette Chatre
2026-06-23 5:04 ` Shaopeng Tan (Fujitsu)
2026-06-04 21:05 ` Reinette Chatre
2026-06-05 19:35 ` Drew Fustini
2026-06-06 5:10 ` Drew Fustini
2026-06-06 5:23 ` Drew Fustini
2026-06-04 17:43 ` Reinette Chatre
2026-06-05 14:53 ` Ben Horgan
2026-06-05 15:39 ` Reinette Chatre
2026-06-05 16:37 ` Ben Horgan
2026-06-08 16:16 ` Reinette Chatre
2026-06-09 10:10 ` Ben Horgan
2026-06-09 15:28 ` Reinette Chatre
2026-06-09 16:37 ` Ben Horgan
2026-06-09 17:41 ` Reinette Chatre
2026-06-10 7:09 ` Chen, Yu C
2026-06-10 14:27 ` Chen, Yu C
2026-06-10 16:13 ` Reinette Chatre
2026-06-10 17:57 ` Chen, Yu C
2026-06-10 18:10 ` Reinette Chatre
2026-06-10 15:59 ` Reinette Chatre
2026-06-10 18:05 ` Chen, Yu C
2026-06-11 3:26 ` Chen, Yu C
2026-06-11 15:45 ` Reinette Chatre
2026-06-26 15:46 ` Chen, Yu C
2026-07-02 14:27 ` Ben Horgan
2026-07-03 9:01 ` Chen, Yu C
2026-06-10 4:31 ` Drew Fustini [this message]
2026-06-10 15:14 ` Reinette Chatre
2026-06-03 18:46 ` Luck, Tony
2026-06-04 10:02 ` Ben Horgan
2026-06-04 21:42 ` Reinette Chatre
2026-07-08 12:56 ` Chen, Yu C
2026-06-03 22:14 ` Drew Fustini
2026-06-04 21:47 ` Reinette Chatre
2026-06-05 19:48 ` Drew Fustini
2026-06-15 21:05 ` Moger, Babu
2026-06-17 17:18 ` Reinette Chatre
2026-06-17 20:29 ` Babu Moger
2026-06-24 19:08 ` Fenghua Yu
2026-06-24 22:22 ` Reinette Chatre
2026-06-25 1:26 ` Fenghua Yu
2026-06-25 15:43 ` Reinette Chatre
2026-07-10 20:59 ` Fenghua Yu
2026-07-02 13:37 ` Ben Horgan
2026-07-02 15:16 ` Fenghua Yu
2026-07-03 13:42 ` Ben Horgan
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