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From: Yidong Zhang <yidong.zhang@amd.com>
To: Xu Yilun <yilun.xu@linux.intel.com>
Cc: <linux-kernel@vger.kernel.org>, <linux-fpga@vger.kernel.org>,
	<mdf@kernel.org>, <hao.wu@intel.com>, <yilun.xu@intel.com>,
	<lizhi.hou@amd.com>, DMG Karthik <Karthik.DMG@amd.com>,
	Nishad Saraf <nishads@amd.com>,
	Hayden Laccabue <hayden.laccabue@amd.com>
Subject: Re: [PATCH V2 1/4] drivers/fpga/amd: Add new driver amd versal-pci
Date: Tue, 11 Feb 2025 03:31:06 -0800	[thread overview]
Message-ID: <84281771-52d8-4b1d-8478-1fedb6f31608@amd.com> (raw)
In-Reply-To: <Z6sT20uzjes7SGzr@yilunxu-OptiPlex-7050>



On 2/11/25 01:09, Xu Yilun wrote:
> Caution: This message originated from an External Source. Use proper caution when opening attachments, clicking links, or responding.
> 
> 
> On Mon, Feb 10, 2025 at 03:33:07AM -0800, Yidong Zhang wrote:
>>
>>
>> On 2/6/25 20:40, Xu Yilun wrote:
>>> Caution: This message originated from an External Source. Use proper caution when opening attachments, clicking links, or responding.
>>>
>>>
>>> On Thu, Feb 06, 2025 at 07:16:25PM -0800, Yidong Zhang wrote:
>>>>
>>>>
>>>> On 2/6/25 18:19, Xu Yilun wrote:
>>>>> Caution: This message originated from an External Source. Use proper caution when opening attachments, clicking links, or responding.
>>>>>
>>>>>
>>>>>>> No need to detach a specific driver, remove all devices in the
>>>>>>> fpga-region. I imagine this could also be a generic flow for all PCI/e
>>>>>>> based FPGA cards.
>>>>>>
>>>>>> I see your point. Is there an existing example in current fpga driver for
>>>>>> PCI/e based cards?
>>>>>
>>>>> No. The fpga-region re-enumeration arch is still WIP, so no existing
>>>>> implementation.
>>>>
>>>> Got you. I can also help to test or provide feedback.
>>>> Actually, I had sent Nava my protype of using configfs for the non-OF
>>>> driver. He should have the updated patch soon.
>>>>
>>>>>
>>>>>>
>>>>>> We will need to talk to our management team and re-design our driver.
>>>>>> I think we have 2 approaches:
>>>>>> 1) Align with linux fpga, having one driver for both userPF and mgmtPF; or
>>>>>
>>>>> Don't get you. Linux FPGA doesn't require one driver for both PFs.
>>>>
>>>> I assume when you said "generic flow for removing all devices in
>>>> fpga-region" means that there is a single driver which use the fpga-region
>>>> callbacks to remove all devices and then re-progream the FPGA.
>>>>
>>>> On AMD V70 hardware, the userPF has different deviceid than the mgmtPF.
>>>> Thus, our current design is having 2 separate pcie drivers for each
>>>> different deviceid.
>>>>
>>>> Thus, in our current design, the fpga-region should be in the userPF driver
>>>> which has callbacks to remove all devices. But in mgmtPF, it is more like a
>>>
>>> A question, if the FPGA logic is cleared, does the userPF still exist on
>>> PCIe bus?
>>
>> I am not sure I fully understand your question by "FPGA logic is cleared".
>> Based on our design, the userPF exists, but all services need to be
>> re-configured after hardware is changed.
> 
> I briefly read your XRT docs. IIUC we are talking about reprogramming
> the "Dynamic Region", not the "Shell".
> 
> The userPF's PCIe basic functionality is in Shell and is out of
> our reprograming discussion. So userPF PCI device always exists even if
> the "Dynamic Region" is being reprogrammed. In this case, we should
> create fpga-region for this "Dynamic Region" in userPF driver.
> 
> userPF uses some HW communication channel to require reprograming, so
> fpga-manager could also be implemented in userPF driver.
> 

Thanks for taking your time reading our documents. You are exactly 
correct. We will use fpga-manager and fpga-region in our userPF driver 
for upstreaming. If you think this is acceptable by linux fpga 
framework. I will talk to my team for next step.

> And I agree the mgmtPF driver is a utility driver that just monitor on
> the communication channel and serve requirements, nothing to do with
> FPGA framework. I have no objection to put it in misc or firmware
> directory.
> 
> What I'm not sure is whether a standalone utility driver in kernel tree
> is preferred (at least I don't). You may talk to other maintainers.
> 

My last question for this topic:
If we decide to upstream both userPF and mgmtPF driver together, could 
them be both within the drivers/fpga/amd as in-tree driver? This will 
help user find source code easily.

Thanks,
David

>>
>>
>>>
>>>> utility which only handles request from the userPF but it has the management
>>>> privilege. Usually, cloud vendors require the mgmtPF deployed in their
>>>> secured domain (can be a separate physical machine).
>>>
>>> I though mgmtPF & userPF are just 2 functions on one PCIe card, they are not?
>>> Then how the mgmtPF writes data to another physical machine and
>>> influence the userPF?
>>>
>>
>> They are functions but they also have different device id thus we can bind
>> different driver onto each of them.
>>
>> I think I should interrupt it accurately as Host and VM. See details here
>> please:
>> https://xilinx.github.io/XRT/2019.2/html/cloud_vendor_support.html
>>
>> But, my point is that we do have 2 separate drivers.
> 
> OK, having 2 separate drivers is definitely fine.
> 
> Thanks,
> Yilun

  reply	other threads:[~2025-02-11 11:31 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-12-10 18:37 [PATCH V2 0/4] Add versal-pci driver Yidong Zhang
2024-12-10 18:37 ` [PATCH V2 1/4] drivers/fpga/amd: Add new driver amd versal-pci Yidong Zhang
2025-01-26  9:24   ` Xu Yilun
2025-01-26 19:50     ` Yidong Zhang
2025-01-26 10:12   ` Christophe JAILLET
2025-01-26 19:56     ` Yidong Zhang
2025-01-26 10:16   ` Christophe JAILLET
2025-01-26 10:32   ` Xu Yilun
2025-01-26 19:46     ` Yidong Zhang
2025-02-06  4:15       ` Xu Yilun
2025-02-06  4:31         ` Yidong Zhang
2025-02-07  2:19           ` Xu Yilun
2025-02-07  3:16             ` Yidong Zhang
2025-02-07  4:40               ` Xu Yilun
2025-02-10 11:33                 ` Yidong Zhang
2025-02-11  9:09                   ` Xu Yilun
2025-02-11 11:31                     ` Yidong Zhang [this message]
2025-03-01  8:20                       ` Xu Yilun
2025-03-01 19:03                         ` Yidong Zhang
2025-03-03  7:57                           ` Xu Yilun
2025-03-03 17:00                             ` Yidong Zhang
2024-12-10 18:37 ` [PATCH V2 2/4] drivers/fpga/amd: Add communication channel Yidong Zhang
2025-01-26 10:19   ` Christophe JAILLET
2025-01-26 19:57     ` Yidong Zhang
2024-12-10 18:37 ` [PATCH V2 3/4] drivers/fpga/amd: Add remote queue Yidong Zhang
2025-01-26 10:24   ` Christophe JAILLET
2024-12-10 18:37 ` [PATCH V2 4/4] drivers/fpga/amd: Add load xclbin and load firmware Yidong Zhang
2025-01-26  9:27 ` [PATCH V2 0/4] Add versal-pci driver Xu Yilun

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