* [PATCH v5 1/5] x86/cpufeatures: Add {required,disabled} feature configs
2025-01-06 7:07 [PATCH v5 0/5] x86/cpufeatures: Automatically generate required and disabled feature masks Xin Li (Intel)
@ 2025-01-06 7:07 ` Xin Li (Intel)
2025-02-14 21:58 ` Borislav Petkov
2025-01-06 7:07 ` [PATCH v5 2/5] x86/cpufeatures: Generate a feature mask header based on build config Xin Li (Intel)
` (5 subsequent siblings)
6 siblings, 1 reply; 27+ messages in thread
From: Xin Li (Intel) @ 2025-01-06 7:07 UTC (permalink / raw)
To: linux-kernel, linux-perf-users
Cc: tglx, mingo, bp, dave.hansen, x86, hpa, will, peterz, yury.norov,
akpm, acme, namhyung, brgerst, andrew.cooper3, nik.borisov
From: "H. Peter Anvin (Intel)" <hpa@zytor.com>
Required and disabled feature masks completely rely on build configs,
i.e., once a build config is fixed, so are the feature masks. To prepare
for auto-generating a header with required and disabled feature masks
based on a build config, add feature Kconfig items:
- X86_REQUIRED_FEATURE_x
- X86_DISABLED_FEATURE_x
each of which may be set to "y" if and only if its preconditions from
current build config are met.
X86_CMPXCHG64 and X86_CMOV are required features, thus rename them to
X86_REQUIRED_FEATURE_CX8 and X86_REQUIRED_FEATURE_CMOV.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Signed-off-by: Xin Li (Intel) <xin@zytor.com>
---
Changes since v1:
* Keep the X86_{REQUIRED,DISABLED}_FEATURE_ prefixes solely in
arch/x86/Kconfig.cpufeatures (Borislav Petkov).
* Explain how config option names X86_{REQUIRED,DISABLED}_FEATURE_<name>
are formed (Borislav Petkov).
---
arch/x86/Kconfig | 4 +-
arch/x86/Kconfig.cpu | 12 +-
arch/x86/Kconfig.cpufeatures | 197 ++++++++++++++++++
arch/x86/include/asm/asm-prototypes.h | 2 +-
arch/x86/include/asm/atomic64_32.h | 2 +-
arch/x86/include/asm/bitops.h | 4 +-
arch/x86/include/asm/cmpxchg_32.h | 2 +-
arch/x86/include/asm/required-features.h | 4 +-
arch/x86/lib/Makefile | 2 +-
arch/x86/lib/cmpxchg8b_emu.S | 2 +-
lib/atomic64_test.c | 2 +-
.../arch/x86/include/asm/required-features.h | 4 +-
12 files changed, 213 insertions(+), 24 deletions(-)
create mode 100644 arch/x86/Kconfig.cpufeatures
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index e4e27d44dc2b..1c1f73202903 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -131,7 +131,7 @@ config X86
select ARCH_SUPPORTS_AUTOFDO_CLANG
select ARCH_SUPPORTS_PROPELLER_CLANG if X86_64
select ARCH_USE_BUILTIN_BSWAP
- select ARCH_USE_CMPXCHG_LOCKREF if X86_CMPXCHG64
+ select ARCH_USE_CMPXCHG_LOCKREF if X86_REQUIRED_FEATURE_CX8
select ARCH_USE_MEMTEST
select ARCH_USE_QUEUED_RWLOCKS
select ARCH_USE_QUEUED_SPINLOCKS
@@ -3191,4 +3191,6 @@ config HAVE_ATOMIC_IOMAP
source "arch/x86/kvm/Kconfig"
+source "arch/x86/Kconfig.cpufeatures"
+
source "arch/x86/Kconfig.assembler"
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
index 2a7279d80460..c439f9c61101 100644
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@ -366,21 +366,11 @@ config X86_HAVE_PAE
def_bool y
depends on MCRUSOE || MEFFICEON || MCYRIXIII || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC7 || MCORE2 || MATOM || X86_64
-config X86_CMPXCHG64
- def_bool y
- depends on X86_HAVE_PAE || M586TSC || M586MMX || MK6 || MK7
-
-# this should be set for all -march=.. options where the compiler
-# generates cmov.
-config X86_CMOV
- def_bool y
- depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX)
-
config X86_MINIMUM_CPU_FAMILY
int
default "64" if X86_64
default "6" if X86_32 && (MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MEFFICEON || MATOM || MCORE2 || MK7 || MK8)
- default "5" if X86_32 && X86_CMPXCHG64
+ default "5" if X86_32 && X86_REQUIRED_FEATURE_CX8
default "4"
config X86_DEBUGCTLMSR
diff --git a/arch/x86/Kconfig.cpufeatures b/arch/x86/Kconfig.cpufeatures
new file mode 100644
index 000000000000..5ed24e45df87
--- /dev/null
+++ b/arch/x86/Kconfig.cpufeatures
@@ -0,0 +1,197 @@
+# SPDX-License-Identifier: GPL-2.0
+#
+# x86 feature bits (see arch/x86/include/asm/cpufeatures.h) that are
+# either REQUIRED to be enabled, or DISABLED (always ignored) for this
+# particular compile-time configuration. The tests for these features
+# are turned into compile-time constants via the generated
+# <asm/featuremasks.h>.
+#
+# The naming of these variables *must* match asm/cpufeatures.h, e.g.,
+# X86_FEATURE_ALWAYS <==> X86_REQUIRED_FEATURE_ALWAYS
+# X86_FEATURE_FRED <==> X86_DISABLED_FEATURE_FRED
+#
+# And these REQUIRED and DISABLED config options are manipulated in an
+# AWK script as the following example:
+#
+# +----------------------+
+# | X86_FRED = y ? |
+# +----------------------+
+# / \
+# Y / \ N
+# +-------------------------------------+ +-------------------------------+
+# | X86_DISABLED_FEATURE_FRED undefined | | X86_DISABLED_FEATURE_FRED = y |
+# +-------------------------------------+ +-------------------------------+
+# |
+# |
+# +-------------------------------------------+ |
+# | X86_FEATURE_FRED: feature word 12, bit 17 | ---->|
+# +-------------------------------------------+ |
+# |
+# |
+# +-------------------------------+
+# | set bit 17 of DISABLED_MASK12 |
+# +-------------------------------+
+#
+
+config X86_REQUIRED_FEATURE_ALWAYS
+ def_bool y
+
+config X86_REQUIRED_FEATURE_NOPL
+ def_bool y
+ depends on X86_64 || X86_P6_NOP
+
+config X86_REQUIRED_FEATURE_CX8
+ def_bool y
+ depends on X86_HAVE_PAE || M586TSC || M586MMX || MK6 || MK7
+
+# this should be set for all -march=.. options where the compiler
+# generates cmov.
+config X86_REQUIRED_FEATURE_CMOV
+ def_bool y
+ depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX)
+
+# this should be set for all -march= options where the compiler
+# generates movbe.
+config X86_REQUIRED_FEATURE_MOVBE
+ def_bool y
+ depends on MATOM
+
+config X86_REQUIRED_FEATURE_CPUID
+ def_bool y
+ depends on X86_64
+
+config X86_REQUIRED_FEATURE_UP
+ def_bool y
+ depends on !SMP
+
+config X86_REQUIRED_FEATURE_FPU
+ def_bool y
+ depends on !MATH_EMULATION
+
+config X86_REQUIRED_FEATURE_PAE
+ def_bool y
+ depends on X86_64 || X86_PAE
+
+config X86_REQUIRED_FEATURE_PSE
+ def_bool y
+ depends on X86_64 && !PARAVIRT_XXL
+
+config X86_REQUIRED_FEATURE_PGE
+ def_bool y
+ depends on X86_64 && !PARAVIRT_XXL
+
+config X86_REQUIRED_FEATURE_MSR
+ def_bool y
+ depends on X86_64
+
+config X86_REQUIRED_FEATURE_FXSR
+ def_bool y
+ depends on X86_64
+
+config X86_REQUIRED_FEATURE_XMM
+ def_bool y
+ depends on X86_64
+
+config X86_REQUIRED_FEATURE_XMM2
+ def_bool y
+ depends on X86_64
+
+config X86_REQUIRED_FEATURE_LM
+ def_bool y
+ depends on X86_64
+
+config X86_DISABLED_FEATURE_UMIP
+ def_bool y
+ depends on !X86_UMIP
+
+config X86_DISABLED_FEATURE_VME
+ def_bool y
+ depends on X86_64
+
+config X86_DISABLED_FEATURE_K6_MTRR
+ def_bool y
+ depends on X86_64
+
+config X86_DISABLED_FEATURE_CYRIX_ARR
+ def_bool y
+ depends on X86_64
+
+config X86_DISABLED_FEATURE_CENTAUR_MCR
+ def_bool y
+ depends on X86_64
+
+config X86_DISABLED_FEATURE_PCID
+ def_bool y
+ depends on !X86_64
+
+config X86_DISABLED_FEATURE_PKU
+ def_bool y
+ depends on !X86_INTEL_MEMORY_PROTECTION_KEYS
+
+config X86_DISABLED_FEATURE_OSPKE
+ def_bool y
+ depends on !X86_INTEL_MEMORY_PROTECTION_KEYS
+
+config X86_DISABLED_FEATURE_LA57
+ def_bool y
+ depends on !X86_5LEVEL
+
+config X86_DISABLED_FEATURE_PTI
+ def_bool y
+ depends on !MITIGATION_PAGE_TABLE_ISOLATION
+
+config X86_DISABLED_FEATURE_RETPOLINE
+ def_bool y
+ depends on !MITIGATION_RETPOLINE
+
+config X86_DISABLED_FEATURE_RETPOLINE_LFENCE
+ def_bool y
+ depends on !MITIGATION_RETPOLINE
+
+config X86_DISABLED_FEATURE_RETHUNK
+ def_bool y
+ depends on !MITIGATION_RETHUNK
+
+config X86_DISABLED_FEATURE_UNRET
+ def_bool y
+ depends on !MITIGATION_UNRET_ENTRY
+
+config X86_DISABLED_FEATURE_CALL_DEPTH
+ def_bool y
+ depends on !MITIGATION_CALL_DEPTH_TRACKING
+
+config X86_DISABLED_FEATURE_LAM
+ def_bool y
+ depends on !ADDRESS_MASKING
+
+config X86_DISABLED_FEATURE_ENQCMD
+ def_bool y
+ depends on !INTEL_IOMMU_SVM
+
+config X86_DISABLED_FEATURE_SGX
+ def_bool y
+ depends on !X86_SGX
+
+config X86_DISABLED_FEATURE_XENPV
+ def_bool y
+ depends on !XEN_PV
+
+config X86_DISABLED_FEATURE_TDX_GUEST
+ def_bool y
+ depends on !INTEL_TDX_GUEST
+
+config X86_DISABLED_FEATURE_USER_SHSTK
+ def_bool y
+ depends on !X86_USER_SHADOW_STACK
+
+config X86_DISABLED_FEATURE_IBT
+ def_bool y
+ depends on !X86_KERNEL_IBT
+
+config X86_DISABLED_FEATURE_FRED
+ def_bool y
+ depends on !X86_FRED
+
+config X86_DISABLED_FEATURE_SEV_SNP
+ def_bool y
+ depends on !KVM_AMD_SEV
diff --git a/arch/x86/include/asm/asm-prototypes.h b/arch/x86/include/asm/asm-prototypes.h
index 3674006e3974..66fe5009830e 100644
--- a/arch/x86/include/asm/asm-prototypes.h
+++ b/arch/x86/include/asm/asm-prototypes.h
@@ -16,7 +16,7 @@
#include <asm/gsseg.h>
#include <asm/nospec-branch.h>
-#ifndef CONFIG_X86_CMPXCHG64
+#ifndef CONFIG_X86_REQUIRED_FEATURE_CX8
extern void cmpxchg8b_emu(void);
#endif
diff --git a/arch/x86/include/asm/atomic64_32.h b/arch/x86/include/asm/atomic64_32.h
index 6c6e9b9f98a4..3dca0f13b59f 100644
--- a/arch/x86/include/asm/atomic64_32.h
+++ b/arch/x86/include/asm/atomic64_32.h
@@ -48,7 +48,7 @@ static __always_inline s64 arch_atomic64_read_nonatomic(const atomic64_t *v)
ATOMIC64_EXPORT(atomic64_##sym)
#endif
-#ifdef CONFIG_X86_CMPXCHG64
+#ifdef CONFIG_X86_REQUIRED_FEATURE_CX8
#define __alternative_atomic64(f, g, out, in...) \
asm volatile("call %c[func]" \
: ALT_OUTPUT_SP(out) \
diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h
index b96d45944c59..ff6444311704 100644
--- a/arch/x86/include/asm/bitops.h
+++ b/arch/x86/include/asm/bitops.h
@@ -321,7 +321,7 @@ static __always_inline int variable_ffs(int x)
asm("bsfl %1,%0"
: "=r" (r)
: ASM_INPUT_RM (x), "0" (-1));
-#elif defined(CONFIG_X86_CMOV)
+#elif defined(CONFIG_X86_REQUIRED_FEATURE_CMOV)
asm("bsfl %1,%0\n\t"
"cmovzl %2,%0"
: "=&r" (r) : "rm" (x), "r" (-1));
@@ -378,7 +378,7 @@ static __always_inline int fls(unsigned int x)
asm("bsrl %1,%0"
: "=r" (r)
: ASM_INPUT_RM (x), "0" (-1));
-#elif defined(CONFIG_X86_CMOV)
+#elif defined(CONFIG_X86_REQUIRED_FEATURE_CMOV)
asm("bsrl %1,%0\n\t"
"cmovzl %2,%0"
: "=&r" (r) : "rm" (x), "rm" (-1));
diff --git a/arch/x86/include/asm/cmpxchg_32.h b/arch/x86/include/asm/cmpxchg_32.h
index fd1282a783dd..633ca915644a 100644
--- a/arch/x86/include/asm/cmpxchg_32.h
+++ b/arch/x86/include/asm/cmpxchg_32.h
@@ -69,7 +69,7 @@ static __always_inline bool __try_cmpxchg64_local(volatile u64 *ptr, u64 *oldp,
return __arch_try_cmpxchg64(ptr, oldp, new,);
}
-#ifdef CONFIG_X86_CMPXCHG64
+#ifdef CONFIG_X86_REQUIRED_FEATURE_CX8
#define arch_cmpxchg64 __cmpxchg64
diff --git a/arch/x86/include/asm/required-features.h b/arch/x86/include/asm/required-features.h
index e9187ddd3d1f..cef8104c103c 100644
--- a/arch/x86/include/asm/required-features.h
+++ b/arch/x86/include/asm/required-features.h
@@ -23,13 +23,13 @@
# define NEED_PAE 0
#endif
-#ifdef CONFIG_X86_CMPXCHG64
+#ifdef CONFIG_X86_REQUIRED_FEATURE_CX8
# define NEED_CX8 (1<<(X86_FEATURE_CX8 & 31))
#else
# define NEED_CX8 0
#endif
-#if defined(CONFIG_X86_CMOV) || defined(CONFIG_X86_64)
+#if defined(CONFIG_X86_REQUIRED_FEATURE_CMOV) || defined(CONFIG_X86_64)
# define NEED_CMOV (1<<(X86_FEATURE_CMOV & 31))
#else
# define NEED_CMOV 0
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
index 98583a9dbab3..9d4e96157e81 100644
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -49,7 +49,7 @@ ifeq ($(CONFIG_X86_32),y)
lib-y += string_32.o
lib-y += memmove_32.o
lib-y += cmpxchg8b_emu.o
-ifneq ($(CONFIG_X86_CMPXCHG64),y)
+ifneq ($(CONFIG_X86_REQUIRED_FEATURE_CX8),y)
lib-y += atomic64_386_32.o
endif
else
diff --git a/arch/x86/lib/cmpxchg8b_emu.S b/arch/x86/lib/cmpxchg8b_emu.S
index 1c96be769adc..4bc06bd1aee1 100644
--- a/arch/x86/lib/cmpxchg8b_emu.S
+++ b/arch/x86/lib/cmpxchg8b_emu.S
@@ -7,7 +7,7 @@
.text
-#ifndef CONFIG_X86_CMPXCHG64
+#ifndef CONFIG_X86_REQUIRED_FEATURE_CX8
/*
* Emulate 'cmpxchg8b (%esi)' on UP
diff --git a/lib/atomic64_test.c b/lib/atomic64_test.c
index 759ea1783cc5..c85e8ab3f67d 100644
--- a/lib/atomic64_test.c
+++ b/lib/atomic64_test.c
@@ -254,7 +254,7 @@ static __init int test_atomics_init(void)
pr_info("passed for %s platform %s CX8 and %s SSE\n",
#ifdef CONFIG_X86_64
"x86-64",
-#elif defined(CONFIG_X86_CMPXCHG64)
+#elif defined(CONFIG_X86_REQUIRED_FEATURE_CX8)
"i586+",
#else
"i386+",
diff --git a/tools/arch/x86/include/asm/required-features.h b/tools/arch/x86/include/asm/required-features.h
index e9187ddd3d1f..cef8104c103c 100644
--- a/tools/arch/x86/include/asm/required-features.h
+++ b/tools/arch/x86/include/asm/required-features.h
@@ -23,13 +23,13 @@
# define NEED_PAE 0
#endif
-#ifdef CONFIG_X86_CMPXCHG64
+#ifdef CONFIG_X86_REQUIRED_FEATURE_CX8
# define NEED_CX8 (1<<(X86_FEATURE_CX8 & 31))
#else
# define NEED_CX8 0
#endif
-#if defined(CONFIG_X86_CMOV) || defined(CONFIG_X86_64)
+#if defined(CONFIG_X86_REQUIRED_FEATURE_CMOV) || defined(CONFIG_X86_64)
# define NEED_CMOV (1<<(X86_FEATURE_CMOV & 31))
#else
# define NEED_CMOV 0
--
2.47.1
^ permalink raw reply related [flat|nested] 27+ messages in thread* Re: [PATCH v5 1/5] x86/cpufeatures: Add {required,disabled} feature configs
2025-01-06 7:07 ` [PATCH v5 1/5] x86/cpufeatures: Add {required,disabled} feature configs Xin Li (Intel)
@ 2025-02-14 21:58 ` Borislav Petkov
2025-02-15 10:12 ` H. Peter Anvin
0 siblings, 1 reply; 27+ messages in thread
From: Borislav Petkov @ 2025-02-14 21:58 UTC (permalink / raw)
To: Xin Li (Intel)
Cc: linux-kernel, linux-perf-users, tglx, mingo, dave.hansen, x86,
hpa, will, peterz, yury.norov, akpm, acme, namhyung, brgerst,
andrew.cooper3, nik.borisov
On Sun, Jan 05, 2025 at 11:07:23PM -0800, Xin Li (Intel) wrote:
> From: "H. Peter Anvin (Intel)" <hpa@zytor.com>
>
> Required and disabled feature masks completely rely on build configs,
> i.e., once a build config is fixed, so are the feature masks. To prepare
> for auto-generating a header with required and disabled feature masks
> based on a build config, add feature Kconfig items:
> - X86_REQUIRED_FEATURE_x
> - X86_DISABLED_FEATURE_x
> each of which may be set to "y" if and only if its preconditions from
> current build config are met.
>
> X86_CMPXCHG64 and X86_CMOV are required features, thus rename them to
> X86_REQUIRED_FEATURE_CX8 and X86_REQUIRED_FEATURE_CMOV.
>
> Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
> Signed-off-by: Xin Li (Intel) <xin@zytor.com>
> ---
>
> Changes since v1:
> * Keep the X86_{REQUIRED,DISABLED}_FEATURE_ prefixes solely in
> arch/x86/Kconfig.cpufeatures (Borislav Petkov).
But that isn't the case yet, right?
There are changes in the code like this now:
#include <asm/nospec-branch.h>
-#ifndef CONFIG_X86_CMPXCHG64
+#ifndef CONFIG_X86_REQUIRED_FEATURE_CX8
extern void cmpxchg8b_emu(void);
which means, I need to know whether I need to use a REQUIRED feature flag or
a normal feature flag, i.e., CONFIG_X86_CMPXCHG64.
Btw, why are you renaming CMPXCHG64 to CX8?
So what would be a lot nicer is if you did this in Kconfig.cpufeatures:
+ config X86_REQUIRED_FEATURE_CMPXCHG64
select X86_CMPXCHG64
+ def_bool y
+ depends on X86_HAVE_PAE || M586TSC || M586MMX || MK6 || MK7
and then use CONFIG_X86_CMPXCHG64 everywhere.
So that the rest of the code doesn't have to know whether those features are
REQUIRED or DISABLED but just features and only the internal machinery does
those additional defines.
Makes sense?
Thx.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
^ permalink raw reply [flat|nested] 27+ messages in thread* Re: [PATCH v5 1/5] x86/cpufeatures: Add {required,disabled} feature configs
2025-02-14 21:58 ` Borislav Petkov
@ 2025-02-15 10:12 ` H. Peter Anvin
2025-02-15 14:20 ` Borislav Petkov
0 siblings, 1 reply; 27+ messages in thread
From: H. Peter Anvin @ 2025-02-15 10:12 UTC (permalink / raw)
To: Borislav Petkov, Xin Li (Intel)
Cc: linux-kernel, linux-perf-users, tglx, mingo, dave.hansen, x86,
will, peterz, yury.norov, akpm, acme, namhyung, brgerst,
andrew.cooper3, nik.borisov
CX8 is the name of the CPUID flag, for better or worse.
It seems to me to be a bit silly to have dummy symbols that mean literally the same thing, but ...
^ permalink raw reply [flat|nested] 27+ messages in thread* Re: [PATCH v5 1/5] x86/cpufeatures: Add {required,disabled} feature configs
2025-02-15 10:12 ` H. Peter Anvin
@ 2025-02-15 14:20 ` Borislav Petkov
2025-02-15 14:27 ` H. Peter Anvin
0 siblings, 1 reply; 27+ messages in thread
From: Borislav Petkov @ 2025-02-15 14:20 UTC (permalink / raw)
To: H. Peter Anvin
Cc: Xin Li (Intel), linux-kernel, linux-perf-users, tglx, mingo,
dave.hansen, x86, will, peterz, yury.norov, akpm, acme, namhyung,
brgerst, andrew.cooper3, nik.borisov
On Sat, Feb 15, 2025 at 02:12:35AM -0800, H. Peter Anvin wrote:
> CX8 is the name of the CPUID flag, for better or worse.
Right, so a separate patch:
git grep X86_CMPXCHG64
arch/x86/Kconfig:135: select ARCH_USE_CMPXCHG_LOCKREF if X86_CMPXCHG64
arch/x86/Kconfig.cpu:369:config X86_CMPXCHG64
arch/x86/Kconfig.cpu:383: default "5" if X86_32 && X86_CMPXCHG64
arch/x86/include/asm/asm-prototypes.h:19:#ifndef CONFIG_X86_CMPXCHG64
arch/x86/include/asm/atomic64_32.h:51:#ifdef CONFIG_X86_CMPXCHG64
arch/x86/include/asm/cmpxchg_32.h:72:#ifdef CONFIG_X86_CMPXCHG64
arch/x86/include/asm/required-features.h:26:#ifdef CONFIG_X86_CMPXCHG64
arch/x86/lib/Makefile:59:ifneq ($(CONFIG_X86_CMPXCHG64),y)
arch/x86/lib/cmpxchg8b_emu.S:10:#ifndef CONFIG_X86_CMPXCHG64
lib/atomic64_test.c:257:#elif defined(CONFIG_X86_CMPXCHG64)
tools/arch/x86/include/asm/required-features.h:26:#ifdef CONFIG_X86_CMPXCHG64
should be easy.
> It seems to me to be a bit silly to have dummy symbols that mean literally
> the same thing, but ...
Why if they're confined and encapsulated in a single file:
arch/x86/Kconfig.cpufeatures ?
Rest of the kernel doesn't need to know whether a feature is required or not,
right?
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
^ permalink raw reply [flat|nested] 27+ messages in thread* Re: [PATCH v5 1/5] x86/cpufeatures: Add {required,disabled} feature configs
2025-02-15 14:20 ` Borislav Petkov
@ 2025-02-15 14:27 ` H. Peter Anvin
2025-02-15 14:30 ` Borislav Petkov
0 siblings, 1 reply; 27+ messages in thread
From: H. Peter Anvin @ 2025-02-15 14:27 UTC (permalink / raw)
To: Borislav Petkov
Cc: Xin Li (Intel), linux-kernel, linux-perf-users, tglx, mingo,
dave.hansen, x86, will, peterz, yury.norov, akpm, acme, namhyung,
brgerst, andrew.cooper3, nik.borisov
On February 15, 2025 6:20:17 AM PST, Borislav Petkov <bp@alien8.de> wrote:
>On Sat, Feb 15, 2025 at 02:12:35AM -0800, H. Peter Anvin wrote:
>> CX8 is the name of the CPUID flag, for better or worse.
>
>Right, so a separate patch:
>
>git grep X86_CMPXCHG64
>arch/x86/Kconfig:135: select ARCH_USE_CMPXCHG_LOCKREF if X86_CMPXCHG64
>arch/x86/Kconfig.cpu:369:config X86_CMPXCHG64
>arch/x86/Kconfig.cpu:383: default "5" if X86_32 && X86_CMPXCHG64
>arch/x86/include/asm/asm-prototypes.h:19:#ifndef CONFIG_X86_CMPXCHG64
>arch/x86/include/asm/atomic64_32.h:51:#ifdef CONFIG_X86_CMPXCHG64
>arch/x86/include/asm/cmpxchg_32.h:72:#ifdef CONFIG_X86_CMPXCHG64
>arch/x86/include/asm/required-features.h:26:#ifdef CONFIG_X86_CMPXCHG64
>arch/x86/lib/Makefile:59:ifneq ($(CONFIG_X86_CMPXCHG64),y)
>arch/x86/lib/cmpxchg8b_emu.S:10:#ifndef CONFIG_X86_CMPXCHG64
>lib/atomic64_test.c:257:#elif defined(CONFIG_X86_CMPXCHG64)
>tools/arch/x86/include/asm/required-features.h:26:#ifdef CONFIG_X86_CMPXCHG64
>
>should be easy.
>
>> It seems to me to be a bit silly to have dummy symbols that mean literally
>> the same thing, but ...
>
>Why if they're confined and encapsulated in a single file:
>arch/x86/Kconfig.cpufeatures ?
>
>Rest of the kernel doesn't need to know whether a feature is required or not,
>right?
>
The point was that that is the *only* use of this particular flag, I believe.
^ permalink raw reply [flat|nested] 27+ messages in thread* Re: [PATCH v5 1/5] x86/cpufeatures: Add {required,disabled} feature configs
2025-02-15 14:27 ` H. Peter Anvin
@ 2025-02-15 14:30 ` Borislav Petkov
2025-02-15 14:35 ` H. Peter Anvin
0 siblings, 1 reply; 27+ messages in thread
From: Borislav Petkov @ 2025-02-15 14:30 UTC (permalink / raw)
To: H. Peter Anvin
Cc: Xin Li (Intel), linux-kernel, linux-perf-users, tglx, mingo,
dave.hansen, x86, will, peterz, yury.norov, akpm, acme, namhyung,
brgerst, andrew.cooper3, nik.borisov
On Sat, Feb 15, 2025 at 06:27:04AM -0800, H. Peter Anvin wrote:
> The point was that that is the *only* use of this particular flag, I believe.
Now you've confused me :-\. Perhaps elaborate a bit more what do you mean...
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
^ permalink raw reply [flat|nested] 27+ messages in thread* Re: [PATCH v5 1/5] x86/cpufeatures: Add {required,disabled} feature configs
2025-02-15 14:30 ` Borislav Petkov
@ 2025-02-15 14:35 ` H. Peter Anvin
2025-02-15 14:44 ` Borislav Petkov
0 siblings, 1 reply; 27+ messages in thread
From: H. Peter Anvin @ 2025-02-15 14:35 UTC (permalink / raw)
To: Borislav Petkov
Cc: Xin Li (Intel), linux-kernel, linux-perf-users, tglx, mingo,
dave.hansen, x86, will, peterz, yury.norov, akpm, acme, namhyung,
brgerst, andrew.cooper3, nik.borisov
On February 15, 2025 6:30:32 AM PST, Borislav Petkov <bp@alien8.de> wrote:
>On Sat, Feb 15, 2025 at 06:27:04AM -0800, H. Peter Anvin wrote:
>> The point was that that is the *only* use of this particular flag, I believe.
>
>Now you've confused me :-\. Perhaps elaborate a bit more what do you mean...
>
A bunch of flags in Kconfig.cpu have exactly the meaning of "this CPU is guaranteed to have this feature."
^ permalink raw reply [flat|nested] 27+ messages in thread* Re: [PATCH v5 1/5] x86/cpufeatures: Add {required,disabled} feature configs
2025-02-15 14:35 ` H. Peter Anvin
@ 2025-02-15 14:44 ` Borislav Petkov
0 siblings, 0 replies; 27+ messages in thread
From: Borislav Petkov @ 2025-02-15 14:44 UTC (permalink / raw)
To: H. Peter Anvin
Cc: Xin Li (Intel), linux-kernel, linux-perf-users, tglx, mingo,
dave.hansen, x86, will, peterz, yury.norov, akpm, acme, namhyung,
brgerst, andrew.cooper3, nik.borisov
On Sat, Feb 15, 2025 at 06:35:52AM -0800, H. Peter Anvin wrote:
> A bunch of flags in Kconfig.cpu have exactly the meaning of "this CPU is
> guaranteed to have this feature."
... and we won't add new ones which are required any time soon so we might as
well make the required ones really be called "REQUIRED" and have those defines
basically self-document themselves...?
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH v5 2/5] x86/cpufeatures: Generate a feature mask header based on build config
2025-01-06 7:07 [PATCH v5 0/5] x86/cpufeatures: Automatically generate required and disabled feature masks Xin Li (Intel)
2025-01-06 7:07 ` [PATCH v5 1/5] x86/cpufeatures: Add {required,disabled} feature configs Xin Li (Intel)
@ 2025-01-06 7:07 ` Xin Li (Intel)
2025-01-06 7:07 ` [PATCH v5 3/5] x86/cpufeatures: Remove {disabled,required}-features.h Xin Li (Intel)
` (4 subsequent siblings)
6 siblings, 0 replies; 27+ messages in thread
From: Xin Li (Intel) @ 2025-01-06 7:07 UTC (permalink / raw)
To: linux-kernel, linux-perf-users
Cc: tglx, mingo, bp, dave.hansen, x86, hpa, will, peterz, yury.norov,
akpm, acme, namhyung, brgerst, andrew.cooper3, nik.borisov
From: "H. Peter Anvin (Intel)" <hpa@zytor.com>
Introduce an AWK script to auto-generate a header with required and
disabled feature masks based on <asm/cpufeatures.h> and current build
config. Thus for any CPU feature with a build config, e.g., X86_FRED,
simply add
config X86_DISABLED_FEATURE_FRED
def_bool y
depends on !X86_FRED
to arch/x86/Kconfig.cpufeatures, instead of adding a conditional CPU
feature disable flag, e.g., DISABLE_FRED.
Lastly the generated required and disabled feature masks will be added
to their corresponding feature masks for this particular compile-time
configuration.
[ Xin: build integration improvements ]
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Signed-off-by: Xin Li (Intel) <xin@zytor.com>
Reviewed-by: Nikolay Borisov <nik.borisov@suse.com>
---
Change since v4:
* More polishes (Nikolay Borisov).
Changes since v3:
* Add a few high-level comments to the AWK script (Nikolay Borisov).
* Enforce CPU feature mask values to be unsigned.
Changes since v2:
* Remove AWK code that generates extra debugging comments (Brian Gerst).
* Move SSE_MASK to verify_cpu.S, the only place it is used (Brian Gerst).
Change since v1:
* Remove code generating unused macros {REQUIRED,DISABLED}_FEATURE(x)
to tell if a CPU feature, e.g., X86_FEATURE_FRED, is a required or
disabled feature for this particular compile-time configuration.
---
arch/x86/Makefile | 17 ++++++-
arch/x86/boot/cpucheck.c | 3 +-
arch/x86/boot/cpuflags.c | 1 -
arch/x86/boot/mkcpustr.c | 3 +-
arch/x86/include/asm/Kbuild | 1 +
arch/x86/include/asm/cpufeature.h | 1 +
arch/x86/include/asm/cpufeatures.h | 8 ---
arch/x86/kernel/verify_cpu.S | 4 ++
arch/x86/tools/featuremasks.awk | 81 ++++++++++++++++++++++++++++++
9 files changed, 105 insertions(+), 14 deletions(-)
create mode 100755 arch/x86/tools/featuremasks.awk
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index 5b773b34768d..a7c58dabf086 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -271,9 +271,22 @@ archscripts: scripts_basic
$(Q)$(MAKE) $(build)=arch/x86/tools relocs
###
-# Syscall table generation
+# Feature masks header and syscall table generation
-archheaders:
+out := arch/x86/include/generated/asm
+featuremasks_hdr := featuremasks.h
+featuremasks_awk := $(srctree)/arch/x86/tools/featuremasks.awk
+cpufeatures_hdr := $(srctree)/arch/x86/include/asm/cpufeatures.h
+quiet_cmd_gen_featuremasks = GEN $@
+ cmd_gen_featuremasks = $(AWK) -f $(featuremasks_awk) $(cpufeatures_hdr) $(KCONFIG_CONFIG) > $@
+
+$(out)/$(featuremasks_hdr): $(featuremasks_awk) $(cpufeatures_hdr) $(KCONFIG_CONFIG) FORCE
+ $(shell mkdir -p $(out))
+ $(call if_changed,gen_featuremasks)
+
+targets += $(out)/$(featuremasks_hdr)
+
+archheaders: $(out)/$(featuremasks_hdr)
$(Q)$(MAKE) $(build)=arch/x86/entry/syscalls all
###
diff --git a/arch/x86/boot/cpucheck.c b/arch/x86/boot/cpucheck.c
index 0aae4d4ed615..8d03a741d1b2 100644
--- a/arch/x86/boot/cpucheck.c
+++ b/arch/x86/boot/cpucheck.c
@@ -22,10 +22,11 @@
# include "boot.h"
#endif
#include <linux/types.h>
+#include <asm/featuremasks.h>
#include <asm/intel-family.h>
#include <asm/processor-flags.h>
-#include <asm/required-features.h>
#include <asm/msr-index.h>
+
#include "string.h"
#include "msr.h"
diff --git a/arch/x86/boot/cpuflags.c b/arch/x86/boot/cpuflags.c
index d75237ba7ce9..0cabdacb2a2f 100644
--- a/arch/x86/boot/cpuflags.c
+++ b/arch/x86/boot/cpuflags.c
@@ -3,7 +3,6 @@
#include "bitops.h"
#include <asm/processor-flags.h>
-#include <asm/required-features.h>
#include <asm/msr-index.h>
#include "cpuflags.h"
diff --git a/arch/x86/boot/mkcpustr.c b/arch/x86/boot/mkcpustr.c
index da0ccc5de538..b90110109675 100644
--- a/arch/x86/boot/mkcpustr.c
+++ b/arch/x86/boot/mkcpustr.c
@@ -12,8 +12,6 @@
#include <stdio.h>
-#include "../include/asm/required-features.h"
-#include "../include/asm/disabled-features.h"
#include "../include/asm/cpufeatures.h"
#include "../include/asm/vmxfeatures.h"
#include "../kernel/cpu/capflags.c"
@@ -23,6 +21,7 @@ int main(void)
int i, j;
const char *str;
+ printf("#include <asm/featuremasks.h>\n\n");
printf("static const char x86_cap_strs[] =\n");
for (i = 0; i < NCAPINTS; i++) {
diff --git a/arch/x86/include/asm/Kbuild b/arch/x86/include/asm/Kbuild
index 6c23d1661b17..16944892d5ee 100644
--- a/arch/x86/include/asm/Kbuild
+++ b/arch/x86/include/asm/Kbuild
@@ -8,6 +8,7 @@ generated-y += syscalls_x32.h
generated-y += unistd_32_ia32.h
generated-y += unistd_64_x32.h
generated-y += xen-hypercalls.h
+generated-y += featuremasks.h
generic-y += early_ioremap.h
generic-y += mcs_spinlock.h
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index de1ad09fe8d7..077a5bbd1cc5 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -9,6 +9,7 @@
#include <asm/asm.h>
#include <linux/bitops.h>
#include <asm/alternative.h>
+#include <asm/featuremasks.h>
enum cpuid_leafs
{
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 508c0dad116b..d5985e8eef29 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -2,14 +2,6 @@
#ifndef _ASM_X86_CPUFEATURES_H
#define _ASM_X86_CPUFEATURES_H
-#ifndef _ASM_X86_REQUIRED_FEATURES_H
-#include <asm/required-features.h>
-#endif
-
-#ifndef _ASM_X86_DISABLED_FEATURES_H
-#include <asm/disabled-features.h>
-#endif
-
/*
* Defines x86 CPU feature bits
*/
diff --git a/arch/x86/kernel/verify_cpu.S b/arch/x86/kernel/verify_cpu.S
index 1258a5872d12..a23a65d5d177 100644
--- a/arch/x86/kernel/verify_cpu.S
+++ b/arch/x86/kernel/verify_cpu.S
@@ -29,8 +29,12 @@
*/
#include <asm/cpufeatures.h>
+#include <asm/featuremasks.h>
#include <asm/msr-index.h>
+#define SSE_MASK \
+ (REQUIRED_MASK0 & ((1<<(X86_FEATURE_XMM & 31)) | (1<<(X86_FEATURE_XMM2 & 31))))
+
SYM_FUNC_START_LOCAL(verify_cpu)
pushf # Save caller passed flags
push $0 # Kill any dangerous flags
diff --git a/arch/x86/tools/featuremasks.awk b/arch/x86/tools/featuremasks.awk
new file mode 100755
index 000000000000..dfac56a697fc
--- /dev/null
+++ b/arch/x86/tools/featuremasks.awk
@@ -0,0 +1,81 @@
+#!/usr/bin/awk
+#
+# Convert cpufeatures.h to a list of compile-time masks
+# Note: this blithly assumes that each word has at least one
+# feature defined in it; if not, something else is wrong!
+#
+
+BEGIN {
+ printf "#ifndef _ASM_X86_FEATUREMASKS_H\n";
+ printf "#define _ASM_X86_FEATUREMASKS_H\n\n";
+
+ file = 0
+}
+
+BEGINFILE {
+ switch (++file) {
+ case 1: # cpufeatures.h
+ FPAT = "#[ \t]*[a-z]+|[A-Za-z0-9_]+|[^ \t]";
+ break;
+ case 2: # .config
+ FPAT = "CONFIG_[A-Z0-9_]+|is not set|[yn]";
+ break;
+ }
+}
+
+# Create a dictionary of sorts, containing all defined feature bits
+file == 1 && $1 ~ /^#[ \t]*define$/ && $2 ~ /^X86_FEATURE_/ &&
+$3 == "(" && $5 == "*" && $7 == "+" && $9 == ")" {
+ nfeat = $4 * $6 + $8;
+ feat = $2;
+ sub(/^X86_FEATURE_/, "", feat);
+ feats[nfeat] = feat;
+}
+file == 1 && $1 ~ /^#[ \t]*define$/ && $2 == "NCAPINTS" {
+ ncapints = strtonum($3);
+}
+
+# Create a dictionary featstat[REQUIRED|DISABLED, FEATURE_NAME] = on | off
+file == 2 && $1 ~ /^CONFIG_X86_[A-Z]*_FEATURE_/ {
+ on = ($2 == "y");
+ if (split($1, fs, "CONFIG_X86_|_FEATURE_") == 3)
+ featstat[fs[2], fs[3]] = on;
+}
+
+END {
+ sets[1] = "REQUIRED";
+ sets[2] = "DISABLED";
+
+ for (ns in sets) {
+ s = sets[ns];
+
+ printf "/*\n";
+ printf " * %s features:\n", s;
+ printf " *\n";
+ fstr = "";
+ for (i = 0; i < ncapints; i++) {
+ mask = 0;
+ for (j = 0; j < 32; j++) {
+ feat = feats[i*32 + j];
+ if (featstat[s, feat]) {
+ nfstr = fstr " " feat;
+ if (length(nfstr) > 72) {
+ printf " * %s\n", fstr;
+ nfstr = " " feat;
+ }
+ fstr = nfstr;
+ mask += (2 ^ j);
+ }
+ }
+ masks[i] = mask;
+ }
+ printf " * %s\n */\n", fstr;
+
+ for (i = 0; i < ncapints; i++)
+ printf "#define %s_MASK%d\t0x%08xU\n", s, i, masks[i];
+
+ printf "#define %s_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != %d)\n\n", s, ncapints;
+ }
+
+ printf "#endif /* _ASM_X86_FEATUREMASKS_H */\n";
+}
--
2.47.1
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v5 3/5] x86/cpufeatures: Remove {disabled,required}-features.h
2025-01-06 7:07 [PATCH v5 0/5] x86/cpufeatures: Automatically generate required and disabled feature masks Xin Li (Intel)
2025-01-06 7:07 ` [PATCH v5 1/5] x86/cpufeatures: Add {required,disabled} feature configs Xin Li (Intel)
2025-01-06 7:07 ` [PATCH v5 2/5] x86/cpufeatures: Generate a feature mask header based on build config Xin Li (Intel)
@ 2025-01-06 7:07 ` Xin Li (Intel)
2025-01-06 7:07 ` [PATCH v5 4/5] x86/cpufeatures: Use AWK to generate {REQUIRED|DISABLED}_MASK_BIT_SET Xin Li (Intel)
` (3 subsequent siblings)
6 siblings, 0 replies; 27+ messages in thread
From: Xin Li (Intel) @ 2025-01-06 7:07 UTC (permalink / raw)
To: linux-kernel, linux-perf-users
Cc: tglx, mingo, bp, dave.hansen, x86, hpa, will, peterz, yury.norov,
akpm, acme, namhyung, brgerst, andrew.cooper3, nik.borisov
The functionalities of {disabled,required}-features.h are replaced
with the auto-generated header cpufeature_masks.h. Thus they are no
longer needed. So delete them.
None of the macros defined in {disabled,required}-features.h is used
in tools, delete them too.
Signed-off-by: Xin Li (Intel) <xin@zytor.com>
---
arch/x86/include/asm/disabled-features.h | 161 ------------------
arch/x86/include/asm/required-features.h | 105 ------------
tools/arch/x86/include/asm/cpufeatures.h | 8 -
.../arch/x86/include/asm/disabled-features.h | 161 ------------------
.../arch/x86/include/asm/required-features.h | 105 ------------
| 2 -
6 files changed, 542 deletions(-)
delete mode 100644 arch/x86/include/asm/disabled-features.h
delete mode 100644 arch/x86/include/asm/required-features.h
delete mode 100644 tools/arch/x86/include/asm/disabled-features.h
delete mode 100644 tools/arch/x86/include/asm/required-features.h
diff --git a/arch/x86/include/asm/disabled-features.h b/arch/x86/include/asm/disabled-features.h
deleted file mode 100644
index c492bdc97b05..000000000000
--- a/arch/x86/include/asm/disabled-features.h
+++ /dev/null
@@ -1,161 +0,0 @@
-#ifndef _ASM_X86_DISABLED_FEATURES_H
-#define _ASM_X86_DISABLED_FEATURES_H
-
-/* These features, although they might be available in a CPU
- * will not be used because the compile options to support
- * them are not present.
- *
- * This code allows them to be checked and disabled at
- * compile time without an explicit #ifdef. Use
- * cpu_feature_enabled().
- */
-
-#ifdef CONFIG_X86_UMIP
-# define DISABLE_UMIP 0
-#else
-# define DISABLE_UMIP (1<<(X86_FEATURE_UMIP & 31))
-#endif
-
-#ifdef CONFIG_X86_64
-# define DISABLE_VME (1<<(X86_FEATURE_VME & 31))
-# define DISABLE_K6_MTRR (1<<(X86_FEATURE_K6_MTRR & 31))
-# define DISABLE_CYRIX_ARR (1<<(X86_FEATURE_CYRIX_ARR & 31))
-# define DISABLE_CENTAUR_MCR (1<<(X86_FEATURE_CENTAUR_MCR & 31))
-# define DISABLE_PCID 0
-#else
-# define DISABLE_VME 0
-# define DISABLE_K6_MTRR 0
-# define DISABLE_CYRIX_ARR 0
-# define DISABLE_CENTAUR_MCR 0
-# define DISABLE_PCID (1<<(X86_FEATURE_PCID & 31))
-#endif /* CONFIG_X86_64 */
-
-#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
-# define DISABLE_PKU 0
-# define DISABLE_OSPKE 0
-#else
-# define DISABLE_PKU (1<<(X86_FEATURE_PKU & 31))
-# define DISABLE_OSPKE (1<<(X86_FEATURE_OSPKE & 31))
-#endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
-
-#ifdef CONFIG_X86_5LEVEL
-# define DISABLE_LA57 0
-#else
-# define DISABLE_LA57 (1<<(X86_FEATURE_LA57 & 31))
-#endif
-
-#ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION
-# define DISABLE_PTI 0
-#else
-# define DISABLE_PTI (1 << (X86_FEATURE_PTI & 31))
-#endif
-
-#ifdef CONFIG_MITIGATION_RETPOLINE
-# define DISABLE_RETPOLINE 0
-#else
-# define DISABLE_RETPOLINE ((1 << (X86_FEATURE_RETPOLINE & 31)) | \
- (1 << (X86_FEATURE_RETPOLINE_LFENCE & 31)))
-#endif
-
-#ifdef CONFIG_MITIGATION_RETHUNK
-# define DISABLE_RETHUNK 0
-#else
-# define DISABLE_RETHUNK (1 << (X86_FEATURE_RETHUNK & 31))
-#endif
-
-#ifdef CONFIG_MITIGATION_UNRET_ENTRY
-# define DISABLE_UNRET 0
-#else
-# define DISABLE_UNRET (1 << (X86_FEATURE_UNRET & 31))
-#endif
-
-#ifdef CONFIG_MITIGATION_CALL_DEPTH_TRACKING
-# define DISABLE_CALL_DEPTH_TRACKING 0
-#else
-# define DISABLE_CALL_DEPTH_TRACKING (1 << (X86_FEATURE_CALL_DEPTH & 31))
-#endif
-
-#ifdef CONFIG_ADDRESS_MASKING
-# define DISABLE_LAM 0
-#else
-# define DISABLE_LAM (1 << (X86_FEATURE_LAM & 31))
-#endif
-
-#ifdef CONFIG_INTEL_IOMMU_SVM
-# define DISABLE_ENQCMD 0
-#else
-# define DISABLE_ENQCMD (1 << (X86_FEATURE_ENQCMD & 31))
-#endif
-
-#ifdef CONFIG_X86_SGX
-# define DISABLE_SGX 0
-#else
-# define DISABLE_SGX (1 << (X86_FEATURE_SGX & 31))
-#endif
-
-#ifdef CONFIG_XEN_PV
-# define DISABLE_XENPV 0
-#else
-# define DISABLE_XENPV (1 << (X86_FEATURE_XENPV & 31))
-#endif
-
-#ifdef CONFIG_INTEL_TDX_GUEST
-# define DISABLE_TDX_GUEST 0
-#else
-# define DISABLE_TDX_GUEST (1 << (X86_FEATURE_TDX_GUEST & 31))
-#endif
-
-#ifdef CONFIG_X86_USER_SHADOW_STACK
-#define DISABLE_USER_SHSTK 0
-#else
-#define DISABLE_USER_SHSTK (1 << (X86_FEATURE_USER_SHSTK & 31))
-#endif
-
-#ifdef CONFIG_X86_KERNEL_IBT
-#define DISABLE_IBT 0
-#else
-#define DISABLE_IBT (1 << (X86_FEATURE_IBT & 31))
-#endif
-
-#ifdef CONFIG_X86_FRED
-# define DISABLE_FRED 0
-#else
-# define DISABLE_FRED (1 << (X86_FEATURE_FRED & 31))
-#endif
-
-#ifdef CONFIG_KVM_AMD_SEV
-#define DISABLE_SEV_SNP 0
-#else
-#define DISABLE_SEV_SNP (1 << (X86_FEATURE_SEV_SNP & 31))
-#endif
-
-/*
- * Make sure to add features to the correct mask
- */
-#define DISABLED_MASK0 (DISABLE_VME)
-#define DISABLED_MASK1 0
-#define DISABLED_MASK2 0
-#define DISABLED_MASK3 (DISABLE_CYRIX_ARR|DISABLE_CENTAUR_MCR|DISABLE_K6_MTRR)
-#define DISABLED_MASK4 (DISABLE_PCID)
-#define DISABLED_MASK5 0
-#define DISABLED_MASK6 0
-#define DISABLED_MASK7 (DISABLE_PTI)
-#define DISABLED_MASK8 (DISABLE_XENPV|DISABLE_TDX_GUEST)
-#define DISABLED_MASK9 (DISABLE_SGX)
-#define DISABLED_MASK10 0
-#define DISABLED_MASK11 (DISABLE_RETPOLINE|DISABLE_RETHUNK|DISABLE_UNRET| \
- DISABLE_CALL_DEPTH_TRACKING|DISABLE_USER_SHSTK)
-#define DISABLED_MASK12 (DISABLE_FRED|DISABLE_LAM)
-#define DISABLED_MASK13 0
-#define DISABLED_MASK14 0
-#define DISABLED_MASK15 0
-#define DISABLED_MASK16 (DISABLE_PKU|DISABLE_OSPKE|DISABLE_LA57|DISABLE_UMIP| \
- DISABLE_ENQCMD)
-#define DISABLED_MASK17 0
-#define DISABLED_MASK18 (DISABLE_IBT)
-#define DISABLED_MASK19 (DISABLE_SEV_SNP)
-#define DISABLED_MASK20 0
-#define DISABLED_MASK21 0
-#define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 22)
-
-#endif /* _ASM_X86_DISABLED_FEATURES_H */
diff --git a/arch/x86/include/asm/required-features.h b/arch/x86/include/asm/required-features.h
deleted file mode 100644
index cef8104c103c..000000000000
--- a/arch/x86/include/asm/required-features.h
+++ /dev/null
@@ -1,105 +0,0 @@
-#ifndef _ASM_X86_REQUIRED_FEATURES_H
-#define _ASM_X86_REQUIRED_FEATURES_H
-
-/* Define minimum CPUID feature set for kernel These bits are checked
- really early to actually display a visible error message before the
- kernel dies. Make sure to assign features to the proper mask!
-
- Some requirements that are not in CPUID yet are also in the
- CONFIG_X86_MINIMUM_CPU_FAMILY which is checked too.
-
- The real information is in arch/x86/Kconfig.cpu, this just converts
- the CONFIGs into a bitmask */
-
-#ifndef CONFIG_MATH_EMULATION
-# define NEED_FPU (1<<(X86_FEATURE_FPU & 31))
-#else
-# define NEED_FPU 0
-#endif
-
-#if defined(CONFIG_X86_PAE) || defined(CONFIG_X86_64)
-# define NEED_PAE (1<<(X86_FEATURE_PAE & 31))
-#else
-# define NEED_PAE 0
-#endif
-
-#ifdef CONFIG_X86_REQUIRED_FEATURE_CX8
-# define NEED_CX8 (1<<(X86_FEATURE_CX8 & 31))
-#else
-# define NEED_CX8 0
-#endif
-
-#if defined(CONFIG_X86_REQUIRED_FEATURE_CMOV) || defined(CONFIG_X86_64)
-# define NEED_CMOV (1<<(X86_FEATURE_CMOV & 31))
-#else
-# define NEED_CMOV 0
-#endif
-
-# define NEED_3DNOW 0
-
-#if defined(CONFIG_X86_P6_NOP) || defined(CONFIG_X86_64)
-# define NEED_NOPL (1<<(X86_FEATURE_NOPL & 31))
-#else
-# define NEED_NOPL 0
-#endif
-
-#ifdef CONFIG_MATOM
-# define NEED_MOVBE (1<<(X86_FEATURE_MOVBE & 31))
-#else
-# define NEED_MOVBE 0
-#endif
-
-#ifdef CONFIG_X86_64
-#ifdef CONFIG_PARAVIRT_XXL
-/* Paravirtualized systems may not have PSE or PGE available */
-#define NEED_PSE 0
-#define NEED_PGE 0
-#else
-#define NEED_PSE (1<<(X86_FEATURE_PSE) & 31)
-#define NEED_PGE (1<<(X86_FEATURE_PGE) & 31)
-#endif
-#define NEED_MSR (1<<(X86_FEATURE_MSR & 31))
-#define NEED_FXSR (1<<(X86_FEATURE_FXSR & 31))
-#define NEED_XMM (1<<(X86_FEATURE_XMM & 31))
-#define NEED_XMM2 (1<<(X86_FEATURE_XMM2 & 31))
-#define NEED_LM (1<<(X86_FEATURE_LM & 31))
-#else
-#define NEED_PSE 0
-#define NEED_MSR 0
-#define NEED_PGE 0
-#define NEED_FXSR 0
-#define NEED_XMM 0
-#define NEED_XMM2 0
-#define NEED_LM 0
-#endif
-
-#define REQUIRED_MASK0 (NEED_FPU|NEED_PSE|NEED_MSR|NEED_PAE|\
- NEED_CX8|NEED_PGE|NEED_FXSR|NEED_CMOV|\
- NEED_XMM|NEED_XMM2)
-#define SSE_MASK (NEED_XMM|NEED_XMM2)
-
-#define REQUIRED_MASK1 (NEED_LM|NEED_3DNOW)
-
-#define REQUIRED_MASK2 0
-#define REQUIRED_MASK3 (NEED_NOPL)
-#define REQUIRED_MASK4 (NEED_MOVBE)
-#define REQUIRED_MASK5 0
-#define REQUIRED_MASK6 0
-#define REQUIRED_MASK7 0
-#define REQUIRED_MASK8 0
-#define REQUIRED_MASK9 0
-#define REQUIRED_MASK10 0
-#define REQUIRED_MASK11 0
-#define REQUIRED_MASK12 0
-#define REQUIRED_MASK13 0
-#define REQUIRED_MASK14 0
-#define REQUIRED_MASK15 0
-#define REQUIRED_MASK16 0
-#define REQUIRED_MASK17 0
-#define REQUIRED_MASK18 0
-#define REQUIRED_MASK19 0
-#define REQUIRED_MASK20 0
-#define REQUIRED_MASK21 0
-#define REQUIRED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 22)
-
-#endif /* _ASM_X86_REQUIRED_FEATURES_H */
diff --git a/tools/arch/x86/include/asm/cpufeatures.h b/tools/arch/x86/include/asm/cpufeatures.h
index 17b6590748c0..c691481d59ce 100644
--- a/tools/arch/x86/include/asm/cpufeatures.h
+++ b/tools/arch/x86/include/asm/cpufeatures.h
@@ -2,14 +2,6 @@
#ifndef _ASM_X86_CPUFEATURES_H
#define _ASM_X86_CPUFEATURES_H
-#ifndef _ASM_X86_REQUIRED_FEATURES_H
-#include <asm/required-features.h>
-#endif
-
-#ifndef _ASM_X86_DISABLED_FEATURES_H
-#include <asm/disabled-features.h>
-#endif
-
/*
* Defines x86 CPU feature bits
*/
diff --git a/tools/arch/x86/include/asm/disabled-features.h b/tools/arch/x86/include/asm/disabled-features.h
deleted file mode 100644
index c492bdc97b05..000000000000
--- a/tools/arch/x86/include/asm/disabled-features.h
+++ /dev/null
@@ -1,161 +0,0 @@
-#ifndef _ASM_X86_DISABLED_FEATURES_H
-#define _ASM_X86_DISABLED_FEATURES_H
-
-/* These features, although they might be available in a CPU
- * will not be used because the compile options to support
- * them are not present.
- *
- * This code allows them to be checked and disabled at
- * compile time without an explicit #ifdef. Use
- * cpu_feature_enabled().
- */
-
-#ifdef CONFIG_X86_UMIP
-# define DISABLE_UMIP 0
-#else
-# define DISABLE_UMIP (1<<(X86_FEATURE_UMIP & 31))
-#endif
-
-#ifdef CONFIG_X86_64
-# define DISABLE_VME (1<<(X86_FEATURE_VME & 31))
-# define DISABLE_K6_MTRR (1<<(X86_FEATURE_K6_MTRR & 31))
-# define DISABLE_CYRIX_ARR (1<<(X86_FEATURE_CYRIX_ARR & 31))
-# define DISABLE_CENTAUR_MCR (1<<(X86_FEATURE_CENTAUR_MCR & 31))
-# define DISABLE_PCID 0
-#else
-# define DISABLE_VME 0
-# define DISABLE_K6_MTRR 0
-# define DISABLE_CYRIX_ARR 0
-# define DISABLE_CENTAUR_MCR 0
-# define DISABLE_PCID (1<<(X86_FEATURE_PCID & 31))
-#endif /* CONFIG_X86_64 */
-
-#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
-# define DISABLE_PKU 0
-# define DISABLE_OSPKE 0
-#else
-# define DISABLE_PKU (1<<(X86_FEATURE_PKU & 31))
-# define DISABLE_OSPKE (1<<(X86_FEATURE_OSPKE & 31))
-#endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
-
-#ifdef CONFIG_X86_5LEVEL
-# define DISABLE_LA57 0
-#else
-# define DISABLE_LA57 (1<<(X86_FEATURE_LA57 & 31))
-#endif
-
-#ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION
-# define DISABLE_PTI 0
-#else
-# define DISABLE_PTI (1 << (X86_FEATURE_PTI & 31))
-#endif
-
-#ifdef CONFIG_MITIGATION_RETPOLINE
-# define DISABLE_RETPOLINE 0
-#else
-# define DISABLE_RETPOLINE ((1 << (X86_FEATURE_RETPOLINE & 31)) | \
- (1 << (X86_FEATURE_RETPOLINE_LFENCE & 31)))
-#endif
-
-#ifdef CONFIG_MITIGATION_RETHUNK
-# define DISABLE_RETHUNK 0
-#else
-# define DISABLE_RETHUNK (1 << (X86_FEATURE_RETHUNK & 31))
-#endif
-
-#ifdef CONFIG_MITIGATION_UNRET_ENTRY
-# define DISABLE_UNRET 0
-#else
-# define DISABLE_UNRET (1 << (X86_FEATURE_UNRET & 31))
-#endif
-
-#ifdef CONFIG_MITIGATION_CALL_DEPTH_TRACKING
-# define DISABLE_CALL_DEPTH_TRACKING 0
-#else
-# define DISABLE_CALL_DEPTH_TRACKING (1 << (X86_FEATURE_CALL_DEPTH & 31))
-#endif
-
-#ifdef CONFIG_ADDRESS_MASKING
-# define DISABLE_LAM 0
-#else
-# define DISABLE_LAM (1 << (X86_FEATURE_LAM & 31))
-#endif
-
-#ifdef CONFIG_INTEL_IOMMU_SVM
-# define DISABLE_ENQCMD 0
-#else
-# define DISABLE_ENQCMD (1 << (X86_FEATURE_ENQCMD & 31))
-#endif
-
-#ifdef CONFIG_X86_SGX
-# define DISABLE_SGX 0
-#else
-# define DISABLE_SGX (1 << (X86_FEATURE_SGX & 31))
-#endif
-
-#ifdef CONFIG_XEN_PV
-# define DISABLE_XENPV 0
-#else
-# define DISABLE_XENPV (1 << (X86_FEATURE_XENPV & 31))
-#endif
-
-#ifdef CONFIG_INTEL_TDX_GUEST
-# define DISABLE_TDX_GUEST 0
-#else
-# define DISABLE_TDX_GUEST (1 << (X86_FEATURE_TDX_GUEST & 31))
-#endif
-
-#ifdef CONFIG_X86_USER_SHADOW_STACK
-#define DISABLE_USER_SHSTK 0
-#else
-#define DISABLE_USER_SHSTK (1 << (X86_FEATURE_USER_SHSTK & 31))
-#endif
-
-#ifdef CONFIG_X86_KERNEL_IBT
-#define DISABLE_IBT 0
-#else
-#define DISABLE_IBT (1 << (X86_FEATURE_IBT & 31))
-#endif
-
-#ifdef CONFIG_X86_FRED
-# define DISABLE_FRED 0
-#else
-# define DISABLE_FRED (1 << (X86_FEATURE_FRED & 31))
-#endif
-
-#ifdef CONFIG_KVM_AMD_SEV
-#define DISABLE_SEV_SNP 0
-#else
-#define DISABLE_SEV_SNP (1 << (X86_FEATURE_SEV_SNP & 31))
-#endif
-
-/*
- * Make sure to add features to the correct mask
- */
-#define DISABLED_MASK0 (DISABLE_VME)
-#define DISABLED_MASK1 0
-#define DISABLED_MASK2 0
-#define DISABLED_MASK3 (DISABLE_CYRIX_ARR|DISABLE_CENTAUR_MCR|DISABLE_K6_MTRR)
-#define DISABLED_MASK4 (DISABLE_PCID)
-#define DISABLED_MASK5 0
-#define DISABLED_MASK6 0
-#define DISABLED_MASK7 (DISABLE_PTI)
-#define DISABLED_MASK8 (DISABLE_XENPV|DISABLE_TDX_GUEST)
-#define DISABLED_MASK9 (DISABLE_SGX)
-#define DISABLED_MASK10 0
-#define DISABLED_MASK11 (DISABLE_RETPOLINE|DISABLE_RETHUNK|DISABLE_UNRET| \
- DISABLE_CALL_DEPTH_TRACKING|DISABLE_USER_SHSTK)
-#define DISABLED_MASK12 (DISABLE_FRED|DISABLE_LAM)
-#define DISABLED_MASK13 0
-#define DISABLED_MASK14 0
-#define DISABLED_MASK15 0
-#define DISABLED_MASK16 (DISABLE_PKU|DISABLE_OSPKE|DISABLE_LA57|DISABLE_UMIP| \
- DISABLE_ENQCMD)
-#define DISABLED_MASK17 0
-#define DISABLED_MASK18 (DISABLE_IBT)
-#define DISABLED_MASK19 (DISABLE_SEV_SNP)
-#define DISABLED_MASK20 0
-#define DISABLED_MASK21 0
-#define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 22)
-
-#endif /* _ASM_X86_DISABLED_FEATURES_H */
diff --git a/tools/arch/x86/include/asm/required-features.h b/tools/arch/x86/include/asm/required-features.h
deleted file mode 100644
index cef8104c103c..000000000000
--- a/tools/arch/x86/include/asm/required-features.h
+++ /dev/null
@@ -1,105 +0,0 @@
-#ifndef _ASM_X86_REQUIRED_FEATURES_H
-#define _ASM_X86_REQUIRED_FEATURES_H
-
-/* Define minimum CPUID feature set for kernel These bits are checked
- really early to actually display a visible error message before the
- kernel dies. Make sure to assign features to the proper mask!
-
- Some requirements that are not in CPUID yet are also in the
- CONFIG_X86_MINIMUM_CPU_FAMILY which is checked too.
-
- The real information is in arch/x86/Kconfig.cpu, this just converts
- the CONFIGs into a bitmask */
-
-#ifndef CONFIG_MATH_EMULATION
-# define NEED_FPU (1<<(X86_FEATURE_FPU & 31))
-#else
-# define NEED_FPU 0
-#endif
-
-#if defined(CONFIG_X86_PAE) || defined(CONFIG_X86_64)
-# define NEED_PAE (1<<(X86_FEATURE_PAE & 31))
-#else
-# define NEED_PAE 0
-#endif
-
-#ifdef CONFIG_X86_REQUIRED_FEATURE_CX8
-# define NEED_CX8 (1<<(X86_FEATURE_CX8 & 31))
-#else
-# define NEED_CX8 0
-#endif
-
-#if defined(CONFIG_X86_REQUIRED_FEATURE_CMOV) || defined(CONFIG_X86_64)
-# define NEED_CMOV (1<<(X86_FEATURE_CMOV & 31))
-#else
-# define NEED_CMOV 0
-#endif
-
-# define NEED_3DNOW 0
-
-#if defined(CONFIG_X86_P6_NOP) || defined(CONFIG_X86_64)
-# define NEED_NOPL (1<<(X86_FEATURE_NOPL & 31))
-#else
-# define NEED_NOPL 0
-#endif
-
-#ifdef CONFIG_MATOM
-# define NEED_MOVBE (1<<(X86_FEATURE_MOVBE & 31))
-#else
-# define NEED_MOVBE 0
-#endif
-
-#ifdef CONFIG_X86_64
-#ifdef CONFIG_PARAVIRT_XXL
-/* Paravirtualized systems may not have PSE or PGE available */
-#define NEED_PSE 0
-#define NEED_PGE 0
-#else
-#define NEED_PSE (1<<(X86_FEATURE_PSE) & 31)
-#define NEED_PGE (1<<(X86_FEATURE_PGE) & 31)
-#endif
-#define NEED_MSR (1<<(X86_FEATURE_MSR & 31))
-#define NEED_FXSR (1<<(X86_FEATURE_FXSR & 31))
-#define NEED_XMM (1<<(X86_FEATURE_XMM & 31))
-#define NEED_XMM2 (1<<(X86_FEATURE_XMM2 & 31))
-#define NEED_LM (1<<(X86_FEATURE_LM & 31))
-#else
-#define NEED_PSE 0
-#define NEED_MSR 0
-#define NEED_PGE 0
-#define NEED_FXSR 0
-#define NEED_XMM 0
-#define NEED_XMM2 0
-#define NEED_LM 0
-#endif
-
-#define REQUIRED_MASK0 (NEED_FPU|NEED_PSE|NEED_MSR|NEED_PAE|\
- NEED_CX8|NEED_PGE|NEED_FXSR|NEED_CMOV|\
- NEED_XMM|NEED_XMM2)
-#define SSE_MASK (NEED_XMM|NEED_XMM2)
-
-#define REQUIRED_MASK1 (NEED_LM|NEED_3DNOW)
-
-#define REQUIRED_MASK2 0
-#define REQUIRED_MASK3 (NEED_NOPL)
-#define REQUIRED_MASK4 (NEED_MOVBE)
-#define REQUIRED_MASK5 0
-#define REQUIRED_MASK6 0
-#define REQUIRED_MASK7 0
-#define REQUIRED_MASK8 0
-#define REQUIRED_MASK9 0
-#define REQUIRED_MASK10 0
-#define REQUIRED_MASK11 0
-#define REQUIRED_MASK12 0
-#define REQUIRED_MASK13 0
-#define REQUIRED_MASK14 0
-#define REQUIRED_MASK15 0
-#define REQUIRED_MASK16 0
-#define REQUIRED_MASK17 0
-#define REQUIRED_MASK18 0
-#define REQUIRED_MASK19 0
-#define REQUIRED_MASK20 0
-#define REQUIRED_MASK21 0
-#define REQUIRED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 22)
-
-#endif /* _ASM_X86_REQUIRED_FEATURES_H */
--git a/tools/perf/check-headers.sh b/tools/perf/check-headers.sh
index a05c1c105c51..67d4e9fc4d36 100755
--- a/tools/perf/check-headers.sh
+++ b/tools/perf/check-headers.sh
@@ -26,8 +26,6 @@ FILES=(
"include/linux/hash.h"
"include/linux/list-sort.h"
"include/uapi/linux/hw_breakpoint.h"
- "arch/x86/include/asm/disabled-features.h"
- "arch/x86/include/asm/required-features.h"
"arch/x86/include/asm/cpufeatures.h"
"arch/x86/include/asm/inat_types.h"
"arch/x86/include/asm/emulate_prefix.h"
--
2.47.1
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v5 4/5] x86/cpufeatures: Use AWK to generate {REQUIRED|DISABLED}_MASK_BIT_SET
2025-01-06 7:07 [PATCH v5 0/5] x86/cpufeatures: Automatically generate required and disabled feature masks Xin Li (Intel)
` (2 preceding siblings ...)
2025-01-06 7:07 ` [PATCH v5 3/5] x86/cpufeatures: Remove {disabled,required}-features.h Xin Li (Intel)
@ 2025-01-06 7:07 ` Xin Li (Intel)
2025-01-06 7:07 ` [PATCH v5 5/5] x86/cpufeatures: Add the CPU feature bit for MSR immediate form instructions Xin Li (Intel)
` (2 subsequent siblings)
6 siblings, 0 replies; 27+ messages in thread
From: Xin Li (Intel) @ 2025-01-06 7:07 UTC (permalink / raw)
To: linux-kernel, linux-perf-users
Cc: tglx, mingo, bp, dave.hansen, x86, hpa, will, peterz, yury.norov,
akpm, acme, namhyung, brgerst, andrew.cooper3, nik.borisov
Generate macros {REQUIRED|DISABLED}_MASK_BIT_SET in the newly added AWK
script that generates the required and disabled feature mask header.
Suggested-by: Brian Gerst <brgerst@gmail.com>
Signed-off-by: Xin Li (Intel) <xin@zytor.com>
Reviewed-by: Brian Gerst <brgerst@gmail.com>
---
Changes since v3:
* Use '1U' instead of '1' in feature mask shifting (Andrew Cooper).
* Checking NCAPINTS isn't necessary anymore. It was needed when these
macros had to be manually updated, but now if cpufeatures.h changes
this header will be regenerated (Brian Gerst).
---
arch/x86/include/asm/cpufeature.h | 69 -------------------------------
arch/x86/tools/featuremasks.awk | 9 +++-
2 files changed, 8 insertions(+), 70 deletions(-)
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 077a5bbd1cc5..b829a12eda8a 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -55,75 +55,6 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
#define test_cpu_cap(c, bit) \
arch_test_bit(bit, (unsigned long *)((c)->x86_capability))
-/*
- * There are 32 bits/features in each mask word. The high bits
- * (selected with (bit>>5) give us the word number and the low 5
- * bits give us the bit/feature number inside the word.
- * (1UL<<((bit)&31) gives us a mask for the feature_bit so we can
- * see if it is set in the mask word.
- */
-#define CHECK_BIT_IN_MASK_WORD(maskname, word, bit) \
- (((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
-
-/*
- * {REQUIRED,DISABLED}_MASK_CHECK below may seem duplicated with the
- * following BUILD_BUG_ON_ZERO() check but when NCAPINTS gets changed, all
- * header macros which use NCAPINTS need to be changed. The duplicated macro
- * use causes the compiler to issue errors for all headers so that all usage
- * sites can be corrected.
- */
-#define REQUIRED_MASK_BIT_SET(feature_bit) \
- ( CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 0, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 1, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 2, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 3, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 4, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 5, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 6, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 7, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 8, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 9, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 10, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 11, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 12, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 13, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 14, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 15, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 16, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 17, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 18, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 19, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 20, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 21, feature_bit) || \
- REQUIRED_MASK_CHECK || \
- BUILD_BUG_ON_ZERO(NCAPINTS != 22))
-
-#define DISABLED_MASK_BIT_SET(feature_bit) \
- ( CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 0, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 1, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 2, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 3, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 4, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 5, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 6, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 7, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 8, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 9, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 10, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 11, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 12, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 13, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 14, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 15, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 16, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 17, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 18, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 19, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 20, feature_bit) || \
- CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 21, feature_bit) || \
- DISABLED_MASK_CHECK || \
- BUILD_BUG_ON_ZERO(NCAPINTS != 22))
-
#define cpu_has(c, bit) \
(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
test_cpu_cap(c, bit))
diff --git a/arch/x86/tools/featuremasks.awk b/arch/x86/tools/featuremasks.awk
index dfac56a697fc..01e47b31e187 100755
--- a/arch/x86/tools/featuremasks.awk
+++ b/arch/x86/tools/featuremasks.awk
@@ -74,7 +74,14 @@ END {
for (i = 0; i < ncapints; i++)
printf "#define %s_MASK%d\t0x%08xU\n", s, i, masks[i];
- printf "#define %s_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != %d)\n\n", s, ncapints;
+ printf "\n#define %s_MASK_BIT_SET(x)\t\t\t\\\n", s;
+ printf "\t((\t\t\t\t\t";
+ for (i = 0; i < ncapints; i++) {
+ if (masks[i])
+ printf "\t\\\n\t\t((x) >> 5) == %2d ? %s_MASK%d :", i, s, i;
+ }
+ printf " 0\t\\\n";
+ printf "\t) & (1U << ((x) & 31)))\n\n";
}
printf "#endif /* _ASM_X86_FEATUREMASKS_H */\n";
--
2.47.1
^ permalink raw reply related [flat|nested] 27+ messages in thread* [PATCH v5 5/5] x86/cpufeatures: Add the CPU feature bit for MSR immediate form instructions
2025-01-06 7:07 [PATCH v5 0/5] x86/cpufeatures: Automatically generate required and disabled feature masks Xin Li (Intel)
` (3 preceding siblings ...)
2025-01-06 7:07 ` [PATCH v5 4/5] x86/cpufeatures: Use AWK to generate {REQUIRED|DISABLED}_MASK_BIT_SET Xin Li (Intel)
@ 2025-01-06 7:07 ` Xin Li (Intel)
2025-02-22 16:30 ` Borislav Petkov
2025-02-11 2:25 ` [PATCH v5 0/5] x86/cpufeatures: Automatically generate required and disabled feature masks Xin Li
2025-02-23 10:27 ` Borislav Petkov
6 siblings, 1 reply; 27+ messages in thread
From: Xin Li (Intel) @ 2025-01-06 7:07 UTC (permalink / raw)
To: linux-kernel, linux-perf-users
Cc: tglx, mingo, bp, dave.hansen, x86, hpa, will, peterz, yury.norov,
akpm, acme, namhyung, brgerst, andrew.cooper3, nik.borisov
The immediate form of MSR access instructions are primarily motivated by
performance, not code size: by having the MSR number in an immediate, it
is available *much* earlier in the pipeline, which allows the hardware
much more leeway about how a particular MSR is handled.
Add a new CPU feature word for CPUID.7.1.ECX and then the CPU feature bit
for MSR immediate form.
Signed-off-by: Xin Li (Intel) <xin@zytor.com>
---
arch/x86/include/asm/cpufeature.h | 1 +
arch/x86/include/asm/cpufeatures.h | 5 ++++-
arch/x86/kernel/cpu/common.c | 1 +
3 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index b829a12eda8a..9a2991e7b21b 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -35,6 +35,7 @@ enum cpuid_leafs
CPUID_8000_001F_EAX,
CPUID_8000_0021_EAX,
CPUID_LNX_5,
+ CPUID_7_1_ECX,
NR_CPUID_WORDS,
};
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index d5985e8eef29..59aa04915032 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -5,7 +5,7 @@
/*
* Defines x86 CPU feature bits
*/
-#define NCAPINTS 22 /* N 32-bit words worth of info */
+#define NCAPINTS 23 /* N 32-bit words worth of info */
#define NBUGINTS 2 /* N 32-bit bug flags */
/*
@@ -476,6 +476,9 @@
#define X86_FEATURE_AMD_HETEROGENEOUS_CORES (21*32 + 6) /* Heterogeneous Core Topology */
#define X86_FEATURE_AMD_WORKLOAD_CLASS (21*32 + 7) /* Workload Classification */
+/* Intel-defined CPU features, CPUID level 0x00000007:1 (ECX), word 22 */
+#define X86_FEATURE_MSR_IMM (22*32+ 5) /* "msr_imm" MSR immediate form instructions */
+
/*
* BUG word(s)
*/
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 7cce91b19fb2..13d270eabd09 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -997,6 +997,7 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
if (eax >= 1) {
cpuid_count(0x00000007, 1, &eax, &ebx, &ecx, &edx);
c->x86_capability[CPUID_7_1_EAX] = eax;
+ c->x86_capability[CPUID_7_1_ECX] = ecx;
}
}
--
2.47.1
^ permalink raw reply related [flat|nested] 27+ messages in thread* Re: [PATCH v5 5/5] x86/cpufeatures: Add the CPU feature bit for MSR immediate form instructions
2025-01-06 7:07 ` [PATCH v5 5/5] x86/cpufeatures: Add the CPU feature bit for MSR immediate form instructions Xin Li (Intel)
@ 2025-02-22 16:30 ` Borislav Petkov
2025-02-22 18:12 ` Borislav Petkov
2025-02-24 7:30 ` Xin Li
0 siblings, 2 replies; 27+ messages in thread
From: Borislav Petkov @ 2025-02-22 16:30 UTC (permalink / raw)
To: Xin Li (Intel)
Cc: linux-kernel, linux-perf-users, tglx, mingo, dave.hansen, x86,
hpa, will, peterz, yury.norov, akpm, acme, namhyung, brgerst,
andrew.cooper3, nik.borisov
On Sun, Jan 05, 2025 at 11:07:27PM -0800, Xin Li (Intel) wrote:
> The immediate form of MSR access instructions are primarily motivated by
> performance, not code size: by having the MSR number in an immediate, it
> is available *much* earlier in the pipeline, which allows the hardware
> much more leeway about how a particular MSR is handled.
>
> Add a new CPU feature word for CPUID.7.1.ECX and then the CPU feature bit
> for MSR immediate form.
Nope, scattered.c.
> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> index d5985e8eef29..59aa04915032 100644
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -5,7 +5,7 @@
> /*
> * Defines x86 CPU feature bits
> */
> -#define NCAPINTS 22 /* N 32-bit words worth of info */
> +#define NCAPINTS 23 /* N 32-bit words worth of info */
> #define NBUGINTS 2 /* N 32-bit bug flags */
>
> /*
> @@ -476,6 +476,9 @@
> #define X86_FEATURE_AMD_HETEROGENEOUS_CORES (21*32 + 6) /* Heterogeneous Core Topology */
> #define X86_FEATURE_AMD_WORKLOAD_CLASS (21*32 + 7) /* Workload Classification */
>
> +/* Intel-defined CPU features, CPUID level 0x00000007:1 (ECX), word 22 */
> +#define X86_FEATURE_MSR_IMM (22*32+ 5) /* "msr_imm" MSR immediate form instructions */
Also no "msr_imm": Documentation/arch/x86/cpuinfo.rst
In any case, this patch doesn't belong in this set.
Thx.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
^ permalink raw reply [flat|nested] 27+ messages in thread* Re: [PATCH v5 5/5] x86/cpufeatures: Add the CPU feature bit for MSR immediate form instructions
2025-02-22 16:30 ` Borislav Petkov
@ 2025-02-22 18:12 ` Borislav Petkov
2025-02-24 7:30 ` Xin Li
1 sibling, 0 replies; 27+ messages in thread
From: Borislav Petkov @ 2025-02-22 18:12 UTC (permalink / raw)
To: Xin Li (Intel)
Cc: linux-kernel, linux-perf-users, tglx, mingo, dave.hansen, x86,
hpa, will, peterz, yury.norov, akpm, acme, namhyung, brgerst,
andrew.cooper3, nik.borisov
On Sat, Feb 22, 2025 at 05:30:01PM +0100, Borislav Petkov wrote:
> > +/* Intel-defined CPU features, CPUID level 0x00000007:1 (ECX), word 22 */
> > +#define X86_FEATURE_MSR_IMM (22*32+ 5) /* "msr_imm" MSR immediate form instructions */
>
> Also no "msr_imm": Documentation/arch/x86/cpuinfo.rst
>
> In any case, this patch doesn't belong in this set.
Also, nothing's using that bit so you could simply leave out that patch
altogether.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
^ permalink raw reply [flat|nested] 27+ messages in thread* Re: [PATCH v5 5/5] x86/cpufeatures: Add the CPU feature bit for MSR immediate form instructions
2025-02-22 16:30 ` Borislav Petkov
2025-02-22 18:12 ` Borislav Petkov
@ 2025-02-24 7:30 ` Xin Li
2025-02-24 17:27 ` H. Peter Anvin
1 sibling, 1 reply; 27+ messages in thread
From: Xin Li @ 2025-02-24 7:30 UTC (permalink / raw)
To: Borislav Petkov
Cc: linux-kernel, linux-perf-users, tglx, mingo, dave.hansen, x86,
hpa, will, peterz, yury.norov, akpm, acme, namhyung, brgerst,
andrew.cooper3, nik.borisov
On 2/22/2025 8:30 AM, Borislav Petkov wrote:
> On Sun, Jan 05, 2025 at 11:07:27PM -0800, Xin Li (Intel) wrote:
>> The immediate form of MSR access instructions are primarily motivated by
>> performance, not code size: by having the MSR number in an immediate, it
>> is available *much* earlier in the pipeline, which allows the hardware
>> much more leeway about how a particular MSR is handled.
>>
>> Add a new CPU feature word for CPUID.7.1.ECX and then the CPU feature bit
>> for MSR immediate form.
>
> Nope, scattered.c.
Oh, neat.
>> @@ -476,6 +476,9 @@
>> #define X86_FEATURE_AMD_HETEROGENEOUS_CORES (21*32 + 6) /* Heterogeneous Core Topology */
>> #define X86_FEATURE_AMD_WORKLOAD_CLASS (21*32 + 7) /* Workload Classification */
>>
>> +/* Intel-defined CPU features, CPUID level 0x00000007:1 (ECX), word 22 */
>> +#define X86_FEATURE_MSR_IMM (22*32+ 5) /* "msr_imm" MSR immediate form instructions */
>
> Also no "msr_imm": Documentation/arch/x86/cpuinfo.rst
My bad.
>
> In any case, this patch doesn't belong in this set.
>
Right.
I tried to show that we don't need to make the following changes due to
NCAPINTS increased to 23 if this patch is based on this patch set.
But if this feature is added through scattered.c, NCAPINTS is not even
changed...
Thanks!
Xin
---
diff --git a/arch/x86/include/asm/cpufeature.h
b/arch/x86/include/asm/cpufeature.h
index de1ad09fe8d7..051d006cc0c6 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -95,7 +96,7 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 20, feature_bit) || \
CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 21, feature_bit) || \
REQUIRED_MASK_CHECK || \
- BUILD_BUG_ON_ZERO(NCAPINTS != 22))
+ BUILD_BUG_ON_ZERO(NCAPINTS != 23))
#define DISABLED_MASK_BIT_SET(feature_bit) \
( CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 0, feature_bit) || \
@@ -121,7 +122,7 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 20, feature_bit) || \
CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 21, feature_bit) || \
DISABLED_MASK_CHECK || \
- BUILD_BUG_ON_ZERO(NCAPINTS != 22))
+ BUILD_BUG_ON_ZERO(NCAPINTS != 23))
#define cpu_has(c, bit)
\
(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
diff --git a/arch/x86/include/asm/disabled-features.h
b/arch/x86/include/asm/disabled-features.h
index c492bdc97b05..c6a1f962185c 100644
--- a/arch/x86/include/asm/disabled-features.h
+++ b/arch/x86/include/asm/disabled-features.h
@@ -156,6 +156,6 @@
#define DISABLED_MASK19 (DISABLE_SEV_SNP)
#define DISABLED_MASK20 0
#define DISABLED_MASK21 0
-#define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 22)
+#define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 23)
#endif /* _ASM_X86_DISABLED_FEATURES_H */
diff --git a/arch/x86/include/asm/required-features.h
b/arch/x86/include/asm/required-features.h
index e9187ddd3d1f..a346db1d078c 100644
--- a/arch/x86/include/asm/required-features.h
+++ b/arch/x86/include/asm/required-features.h
@@ -100,6 +100,6 @@
#define REQUIRED_MASK19 0
#define REQUIRED_MASK20 0
#define REQUIRED_MASK21 0
-#define REQUIRED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 22)
+#define REQUIRED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 23)
#endif /* _ASM_X86_REQUIRED_FEATURES_H */
^ permalink raw reply related [flat|nested] 27+ messages in thread* Re: [PATCH v5 5/5] x86/cpufeatures: Add the CPU feature bit for MSR immediate form instructions
2025-02-24 7:30 ` Xin Li
@ 2025-02-24 17:27 ` H. Peter Anvin
0 siblings, 0 replies; 27+ messages in thread
From: H. Peter Anvin @ 2025-02-24 17:27 UTC (permalink / raw)
To: Xin Li, Borislav Petkov
Cc: linux-kernel, linux-perf-users, tglx, mingo, dave.hansen, x86,
will, peterz, yury.norov, akpm, acme, namhyung, brgerst,
andrew.cooper3, nik.borisov
On February 23, 2025 11:30:21 PM PST, Xin Li <xin@zytor.com> wrote:
>On 2/22/2025 8:30 AM, Borislav Petkov wrote:
>> On Sun, Jan 05, 2025 at 11:07:27PM -0800, Xin Li (Intel) wrote:
>>> The immediate form of MSR access instructions are primarily motivated by
>>> performance, not code size: by having the MSR number in an immediate, it
>>> is available *much* earlier in the pipeline, which allows the hardware
>>> much more leeway about how a particular MSR is handled.
>>>
>>> Add a new CPU feature word for CPUID.7.1.ECX and then the CPU feature bit
>>> for MSR immediate form.
>>
>> Nope, scattered.c.
>
>Oh, neat.
>
>>> @@ -476,6 +476,9 @@
>>> #define X86_FEATURE_AMD_HETEROGENEOUS_CORES (21*32 + 6) /* Heterogeneous Core Topology */
>>> #define X86_FEATURE_AMD_WORKLOAD_CLASS (21*32 + 7) /* Workload Classification */
>>> +/* Intel-defined CPU features, CPUID level 0x00000007:1 (ECX), word 22 */
>>> +#define X86_FEATURE_MSR_IMM (22*32+ 5) /* "msr_imm" MSR immediate form instructions */
>>
>> Also no "msr_imm": Documentation/arch/x86/cpuinfo.rst
>
>My bad.
>
>>
>> In any case, this patch doesn't belong in this set.
>>
>
>Right.
>
>I tried to show that we don't need to make the following changes due to
>NCAPINTS increased to 23 if this patch is based on this patch set.
>
>But if this feature is added through scattered.c, NCAPINTS is not even
>changed...
>
>Thanks!
> Xin
>
>---
>diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
>index de1ad09fe8d7..051d006cc0c6 100644
>--- a/arch/x86/include/asm/cpufeature.h
>+++ b/arch/x86/include/asm/cpufeature.h
>@@ -95,7 +96,7 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
> CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 20, feature_bit) || \
> CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 21, feature_bit) || \
> REQUIRED_MASK_CHECK || \
>- BUILD_BUG_ON_ZERO(NCAPINTS != 22))
>+ BUILD_BUG_ON_ZERO(NCAPINTS != 23))
>
> #define DISABLED_MASK_BIT_SET(feature_bit) \
> ( CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 0, feature_bit) || \
>@@ -121,7 +122,7 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
> CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 20, feature_bit) || \
> CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 21, feature_bit) || \
> DISABLED_MASK_CHECK || \
>- BUILD_BUG_ON_ZERO(NCAPINTS != 22))
>+ BUILD_BUG_ON_ZERO(NCAPINTS != 23))
>
> #define cpu_has(c, bit) \
> (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
>diff --git a/arch/x86/include/asm/disabled-features.h b/arch/x86/include/asm/disabled-features.h
>index c492bdc97b05..c6a1f962185c 100644
>--- a/arch/x86/include/asm/disabled-features.h
>+++ b/arch/x86/include/asm/disabled-features.h
>@@ -156,6 +156,6 @@
> #define DISABLED_MASK19 (DISABLE_SEV_SNP)
> #define DISABLED_MASK20 0
> #define DISABLED_MASK21 0
>-#define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 22)
>+#define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 23)
>
> #endif /* _ASM_X86_DISABLED_FEATURES_H */
>diff --git a/arch/x86/include/asm/required-features.h b/arch/x86/include/asm/required-features.h
>index e9187ddd3d1f..a346db1d078c 100644
>--- a/arch/x86/include/asm/required-features.h
>+++ b/arch/x86/include/asm/required-features.h
>@@ -100,6 +100,6 @@
> #define REQUIRED_MASK19 0
> #define REQUIRED_MASK20 0
> #define REQUIRED_MASK21 0
>-#define REQUIRED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 22)
>+#define REQUIRED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 23)
>
> #endif /* _ASM_X86_REQUIRED_FEATURES_H */
>
>
That being said, this is the next word that will end up being populated so...
(On the other hand, only four bits were ever assigned to the Transmeta CPUID word; the rest of the bits in that word could be reclaimed, if not the whole word.)
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v5 0/5] x86/cpufeatures: Automatically generate required and disabled feature masks
2025-01-06 7:07 [PATCH v5 0/5] x86/cpufeatures: Automatically generate required and disabled feature masks Xin Li (Intel)
` (4 preceding siblings ...)
2025-01-06 7:07 ` [PATCH v5 5/5] x86/cpufeatures: Add the CPU feature bit for MSR immediate form instructions Xin Li (Intel)
@ 2025-02-11 2:25 ` Xin Li
2025-02-23 10:27 ` Borislav Petkov
6 siblings, 0 replies; 27+ messages in thread
From: Xin Li @ 2025-02-11 2:25 UTC (permalink / raw)
To: linux-kernel, linux-perf-users
Cc: tglx, mingo, bp, dave.hansen, x86, hpa, will, peterz, yury.norov,
akpm, acme, namhyung, brgerst, andrew.cooper3, nik.borisov
On 1/5/2025 11:07 PM, Xin Li (Intel) wrote:
> The x86 build process first generates required and disabled feature
> masks based on current build config, and then uses these generated
> masks to compile the source code. When a CPU feature is not enabled
> in a build config, e.g., when CONFIG_X86_FRED=n, its feature disable
> flag, i.e., DISABLE_FRED, needs to be properly defined and added to
> a specific disabled CPU features mask in <asm/disabled-features.h>,
> as the following patch does:
> https://lore.kernel.org/all/20231205105030.8698-8-xin3.li@intel.com/.
> As a result, the FRED feature bit is surely cleared in the generated
> kernel binary when CONFIG_X86_FRED=n.
>
> Recently there is another case to repeat the same exercise for the
> AMD SEV-SNP CPU feature:
> https://lore.kernel.org/all/20240126041126.1927228-2-michael.roth@amd.com/.
> https://lore.kernel.org/all/20240126041126.1927228-23-michael.roth@amd.com/.
>
> It was one thing when there were four of CPU feature masks, but with
> over 20 it is going to cause mistakes, e.g.,
> https://lore.kernel.org/lkml/aaed79d5-d683-d1bc-7ba1-b33c8d6db618@suse.com/.
>
> We want to eliminate the stupidly repeated exercise to manually assign
> features to CPU feature words through introducing an AWK script to
> automatically generate a header with required and disabled CPU feature
> masks based on current build config, and this patch set does that.
>
> Recently when working on the immediate form of MSR access instructions,
> I needed to add a new CPU feature word for CPUID.7.1.ECX, and I had to
> replace the same check "(NCAPINTS != 22)" with (NCAPINTS != 23) in 3
> different files as
> https://github.com/xinli-intel/linux-fred-public/commit/aa80536927fcd293be8ae54e1d5e4d886cf83f21
> Obviously these replacements could be saved if the patch to add a new
> CPU feature word is reworked on top of this patch set.
>
> So this seems a good opportunity to demonstrate the convenience out of
> this patch set, and here comes v5 with just one more patch on top of v4
> that adds a new CPU feature word for CPUID.7.1.ECX and uses it for the
> immediate form of MSR access feature.
>
> Link to v4:
> https://lore.kernel.org/lkml/20240628174544.3118826-1-xin@zytor.com/
The patch proposed in the following review reminds me this infra
improvement patch set again, so a gentle ping :)
https://lore.kernel.org/lkml/CA+i-1C3LDJTf26WdBo7MvCdTs-dybqsUp3Ze7NowcOUHPWMXrg@mail.gmail.com/
Thanks!
Xin
^ permalink raw reply [flat|nested] 27+ messages in thread* Re: [PATCH v5 0/5] x86/cpufeatures: Automatically generate required and disabled feature masks
2025-01-06 7:07 [PATCH v5 0/5] x86/cpufeatures: Automatically generate required and disabled feature masks Xin Li (Intel)
` (5 preceding siblings ...)
2025-02-11 2:25 ` [PATCH v5 0/5] x86/cpufeatures: Automatically generate required and disabled feature masks Xin Li
@ 2025-02-23 10:27 ` Borislav Petkov
2025-02-25 17:10 ` Xin Li
6 siblings, 1 reply; 27+ messages in thread
From: Borislav Petkov @ 2025-02-23 10:27 UTC (permalink / raw)
To: Xin Li (Intel)
Cc: linux-kernel, linux-perf-users, tglx, mingo, dave.hansen, x86,
hpa, will, peterz, yury.norov, akpm, acme, namhyung, brgerst,
andrew.cooper3, nik.borisov
On Sun, Jan 05, 2025 at 11:07:22PM -0800, Xin Li (Intel) wrote:
> arch/x86/Kconfig | 4 +-
> arch/x86/Kconfig.cpu | 12 +-
> arch/x86/Kconfig.cpufeatures | 197 ++++++++++++++++++
> arch/x86/Makefile | 17 +-
> arch/x86/boot/cpucheck.c | 3 +-
> arch/x86/boot/cpuflags.c | 1 -
> arch/x86/boot/mkcpustr.c | 3 +-
> arch/x86/include/asm/Kbuild | 1 +
> arch/x86/include/asm/asm-prototypes.h | 2 +-
> arch/x86/include/asm/atomic64_32.h | 2 +-
> arch/x86/include/asm/bitops.h | 4 +-
> arch/x86/include/asm/cmpxchg_32.h | 2 +-
> arch/x86/include/asm/cpufeature.h | 71 +------
> arch/x86/include/asm/cpufeatures.h | 13 +-
> arch/x86/include/asm/disabled-features.h | 161 --------------
> arch/x86/include/asm/required-features.h | 105 ----------
> arch/x86/kernel/cpu/common.c | 1 +
> arch/x86/kernel/verify_cpu.S | 4 +
> arch/x86/lib/Makefile | 2 +-
> arch/x86/lib/cmpxchg8b_emu.S | 2 +-
> arch/x86/tools/featuremasks.awk | 88 ++++++++
> lib/atomic64_test.c | 2 +-
> tools/arch/x86/include/asm/cpufeatures.h | 8 -
> .../arch/x86/include/asm/disabled-features.h | 161 --------------
> .../arch/x86/include/asm/required-features.h | 105 ----------
> tools/perf/check-headers.sh | 2 -
> 26 files changed, 327 insertions(+), 646 deletions(-)
> create mode 100644 arch/x86/Kconfig.cpufeatures
> delete mode 100644 arch/x86/include/asm/disabled-features.h
> delete mode 100644 arch/x86/include/asm/required-features.h
> create mode 100755 arch/x86/tools/featuremasks.awk
> delete mode 100644 tools/arch/x86/include/asm/disabled-features.h
> delete mode 100644 tools/arch/x86/include/asm/required-features.h
make --no-print-directory -C /home/kernel/linux \
-f /home/kernel/linux/Makefile
# GEN arch/x86/include/generated/asm/orc_hash.h
mkdir -p arch/x86/include/generated/asm/; sh ./scripts/orc_hash.sh < arch/x86/include/asm/orc_types.h > arch/x86/include/generated/asm/orc_hash.h
make -f ./scripts/Makefile.build obj=scripts/basic
set -e; mkdir -p include/config/; trap "rm -f include/config/.tmp_kernel.release" EXIT; { ./scripts/setlocalversion .; } > include/config/.tmp_kernel.release; if [ ! -r include/config/kernel.release ] || ! cmp -s include/config/kernel.release include/config/.tmp_kernel.release; then : ' UPD include/config/kernel.release'; mv -f include/config/.tmp_kernel.release include/config/kernel.release; fi
# GEN arch/x86/include/generated/asm/featuremasks.h
awk -f ./arch/x86/tools/featuremasks.awk ./arch/x86/include/asm/cpufeatures.h .config > arch/x86/include/generated/asm/featuremasks.h
make -f ./scripts/Makefile.asm-headers obj=arch/x86/include/generated/uapi/asm \
generic=include/uapi/asm-generic
awk: ./arch/x86/tools/featuremasks.awk: line 16: syntax error at or near {
awk: ./arch/x86/tools/featuremasks.awk: line 20: syntax error at or near :
awk: ./arch/x86/tools/featuremasks.awk: line 24: syntax error at or near }
make[1]: *** [arch/x86/Makefile:285: arch/x86/include/generated/asm/featuremasks.h] Error 2
make[1]: *** Deleting file 'arch/x86/include/generated/asm/featuremasks.h'
make[1]: *** Waiting for unfinished jobs....
# WRAP arch/x86/include/generated/uapi/asm/bpf_perf_event.h
echo "#include <asm-generic/bpf_perf_event.h>" > arch/x86/include/generated/uapi/asm/bpf_perf_event.h
# WRAP arch/x86/include/generated/uapi/asm/fcntl.h
echo "#include <asm-generic/fcntl.h>" > arch/x86/include/generated/uapi/asm/fcntl.h
# WRAP arch/x86/include/generated/uapi/asm/errno.h
echo "#include <asm-generic/errno.h>" > arch/x86/include/generated/uapi/asm/errno.h
# WRAP arch/x86/include/generated/uapi/asm/ioctl.h
echo "#include <asm-generic/ioctl.h>" > arch/x86/include/generated/uapi/asm/ioctl.h
# WRAP arch/x86/include/generated/uapi/asm/ioctls.h
echo "#include <asm-generic/ioctls.h>" > arch/x86/include/generated/uapi/asm/ioctls.h
# WRAP arch/x86/include/generated/uapi/asm/ipcbuf.h
echo "#include <asm-generic/ipcbuf.h>" > arch/x86/include/generated/uapi/asm/ipcbuf.h
# WRAP arch/x86/include/generated/uapi/asm/param.h
echo "#include <asm-generic/param.h>" > arch/x86/include/generated/uapi/asm/param.h
# WRAP arch/x86/include/generated/uapi/asm/poll.h
echo "#include <asm-generic/poll.h>" > arch/x86/include/generated/uapi/asm/poll.h
# WRAP arch/x86/include/generated/uapi/asm/resource.h
echo "#include <asm-generic/resource.h>" > arch/x86/include/generated/uapi/asm/resource.h
# WRAP arch/x86/include/generated/uapi/asm/socket.h
echo "#include <asm-generic/socket.h>" > arch/x86/include/generated/uapi/asm/socket.h
# WRAP arch/x86/include/generated/uapi/asm/sockios.h
echo "#include <asm-generic/sockios.h>" > arch/x86/include/generated/uapi/asm/sockios.h
# WRAP arch/x86/include/generated/uapi/asm/termbits.h
echo "#include <asm-generic/termbits.h>" > arch/x86/include/generated/uapi/asm/termbits.h
# WRAP arch/x86/include/generated/uapi/asm/termios.h
echo "#include <asm-generic/termios.h>" > arch/x86/include/generated/uapi/asm/termios.h
# WRAP arch/x86/include/generated/uapi/asm/types.h
echo "#include <asm-generic/types.h>" > arch/x86/include/generated/uapi/asm/types.h
make: *** [Makefile:251: __sub-make] Error 2
Probably due to:
$ awk --version
mawk 1.3.4 20250131
Copyright 2008-2024,2025, Thomas E. Dickey
Copyright 1991-1996,2014, Michael D. Brennan
random-funcs: srandom/random
regex-funcs: internal
compiled limits:
sprintf buffer 8192
maximum-integer 9223372036854775808
while the other box has GNU awk where it obviously works.
HTH.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
^ permalink raw reply [flat|nested] 27+ messages in thread* Re: [PATCH v5 0/5] x86/cpufeatures: Automatically generate required and disabled feature masks
2025-02-23 10:27 ` Borislav Petkov
@ 2025-02-25 17:10 ` Xin Li
2025-02-25 17:49 ` Borislav Petkov
0 siblings, 1 reply; 27+ messages in thread
From: Xin Li @ 2025-02-25 17:10 UTC (permalink / raw)
To: Borislav Petkov
Cc: linux-kernel, linux-perf-users, tglx, mingo, dave.hansen, x86,
hpa, will, peterz, yury.norov, akpm, acme, namhyung, brgerst,
andrew.cooper3, nik.borisov
On 2/23/2025 2:27 AM, Borislav Petkov wrote:
> On Sun, Jan 05, 2025 at 11:07:22PM -0800, Xin Li (Intel) wrote:
>> arch/x86/Kconfig | 4 +-
>> arch/x86/Kconfig.cpu | 12 +-
>> arch/x86/Kconfig.cpufeatures | 197 ++++++++++++++++++
>> arch/x86/Makefile | 17 +-
>> arch/x86/boot/cpucheck.c | 3 +-
>> arch/x86/boot/cpuflags.c | 1 -
>> arch/x86/boot/mkcpustr.c | 3 +-
>> arch/x86/include/asm/Kbuild | 1 +
>> arch/x86/include/asm/asm-prototypes.h | 2 +-
>> arch/x86/include/asm/atomic64_32.h | 2 +-
>> arch/x86/include/asm/bitops.h | 4 +-
>> arch/x86/include/asm/cmpxchg_32.h | 2 +-
>> arch/x86/include/asm/cpufeature.h | 71 +------
>> arch/x86/include/asm/cpufeatures.h | 13 +-
>> arch/x86/include/asm/disabled-features.h | 161 --------------
>> arch/x86/include/asm/required-features.h | 105 ----------
>> arch/x86/kernel/cpu/common.c | 1 +
>> arch/x86/kernel/verify_cpu.S | 4 +
>> arch/x86/lib/Makefile | 2 +-
>> arch/x86/lib/cmpxchg8b_emu.S | 2 +-
>> arch/x86/tools/featuremasks.awk | 88 ++++++++
>> lib/atomic64_test.c | 2 +-
>> tools/arch/x86/include/asm/cpufeatures.h | 8 -
>> .../arch/x86/include/asm/disabled-features.h | 161 --------------
>> .../arch/x86/include/asm/required-features.h | 105 ----------
>> tools/perf/check-headers.sh | 2 -
>> 26 files changed, 327 insertions(+), 646 deletions(-)
>> create mode 100644 arch/x86/Kconfig.cpufeatures
>> delete mode 100644 arch/x86/include/asm/disabled-features.h
>> delete mode 100644 arch/x86/include/asm/required-features.h
>> create mode 100755 arch/x86/tools/featuremasks.awk
>> delete mode 100644 tools/arch/x86/include/asm/disabled-features.h
>> delete mode 100644 tools/arch/x86/include/asm/required-features.h
>
> make --no-print-directory -C /home/kernel/linux \
> -f /home/kernel/linux/Makefile
> # GEN arch/x86/include/generated/asm/orc_hash.h
> mkdir -p arch/x86/include/generated/asm/; sh ./scripts/orc_hash.sh < arch/x86/include/asm/orc_types.h > arch/x86/include/generated/asm/orc_hash.h
> make -f ./scripts/Makefile.build obj=scripts/basic
> set -e; mkdir -p include/config/; trap "rm -f include/config/.tmp_kernel.release" EXIT; { ./scripts/setlocalversion .; } > include/config/.tmp_kernel.release; if [ ! -r include/config/kernel.release ] || ! cmp -s include/config/kernel.release include/config/.tmp_kernel.release; then : ' UPD include/config/kernel.release'; mv -f include/config/.tmp_kernel.release include/config/kernel.release; fi
> # GEN arch/x86/include/generated/asm/featuremasks.h
> awk -f ./arch/x86/tools/featuremasks.awk ./arch/x86/include/asm/cpufeatures.h .config > arch/x86/include/generated/asm/featuremasks.h
> make -f ./scripts/Makefile.asm-headers obj=arch/x86/include/generated/uapi/asm \
> generic=include/uapi/asm-generic
> awk: ./arch/x86/tools/featuremasks.awk: line 16: syntax error at or near {
> awk: ./arch/x86/tools/featuremasks.awk: line 20: syntax error at or near :
> awk: ./arch/x86/tools/featuremasks.awk: line 24: syntax error at or near }
> make[1]: *** [arch/x86/Makefile:285: arch/x86/include/generated/asm/featuremasks.h] Error 2
> make[1]: *** Deleting file 'arch/x86/include/generated/asm/featuremasks.h'
> make[1]: *** Waiting for unfinished jobs....
> # WRAP arch/x86/include/generated/uapi/asm/bpf_perf_event.h
> echo "#include <asm-generic/bpf_perf_event.h>" > arch/x86/include/generated/uapi/asm/bpf_perf_event.h
> # WRAP arch/x86/include/generated/uapi/asm/fcntl.h
> echo "#include <asm-generic/fcntl.h>" > arch/x86/include/generated/uapi/asm/fcntl.h
> # WRAP arch/x86/include/generated/uapi/asm/errno.h
> echo "#include <asm-generic/errno.h>" > arch/x86/include/generated/uapi/asm/errno.h
> # WRAP arch/x86/include/generated/uapi/asm/ioctl.h
> echo "#include <asm-generic/ioctl.h>" > arch/x86/include/generated/uapi/asm/ioctl.h
> # WRAP arch/x86/include/generated/uapi/asm/ioctls.h
> echo "#include <asm-generic/ioctls.h>" > arch/x86/include/generated/uapi/asm/ioctls.h
> # WRAP arch/x86/include/generated/uapi/asm/ipcbuf.h
> echo "#include <asm-generic/ipcbuf.h>" > arch/x86/include/generated/uapi/asm/ipcbuf.h
> # WRAP arch/x86/include/generated/uapi/asm/param.h
> echo "#include <asm-generic/param.h>" > arch/x86/include/generated/uapi/asm/param.h
> # WRAP arch/x86/include/generated/uapi/asm/poll.h
> echo "#include <asm-generic/poll.h>" > arch/x86/include/generated/uapi/asm/poll.h
> # WRAP arch/x86/include/generated/uapi/asm/resource.h
> echo "#include <asm-generic/resource.h>" > arch/x86/include/generated/uapi/asm/resource.h
> # WRAP arch/x86/include/generated/uapi/asm/socket.h
> echo "#include <asm-generic/socket.h>" > arch/x86/include/generated/uapi/asm/socket.h
> # WRAP arch/x86/include/generated/uapi/asm/sockios.h
> echo "#include <asm-generic/sockios.h>" > arch/x86/include/generated/uapi/asm/sockios.h
> # WRAP arch/x86/include/generated/uapi/asm/termbits.h
> echo "#include <asm-generic/termbits.h>" > arch/x86/include/generated/uapi/asm/termbits.h
> # WRAP arch/x86/include/generated/uapi/asm/termios.h
> echo "#include <asm-generic/termios.h>" > arch/x86/include/generated/uapi/asm/termios.h
> # WRAP arch/x86/include/generated/uapi/asm/types.h
> echo "#include <asm-generic/types.h>" > arch/x86/include/generated/uapi/asm/types.h
> make: *** [Makefile:251: __sub-make] Error 2
>
> Probably due to:
>
> $ awk --version
> mawk 1.3.4 20250131
> Copyright 2008-2024,2025, Thomas E. Dickey
> Copyright 1991-1996,2014, Michael D. Brennan
>
> random-funcs: srandom/random
> regex-funcs: internal
>
> compiled limits:
> sprintf buffer 8192
> maximum-integer 9223372036854775808
>
> while the other box has GNU awk where it obviously works.
After looking into the build issue, we think it's better to change to
perl; GNU awk has quite a few extended features that standard awk
doesn't support, e.g., BEGINFILE/FPAT/...
Thanks!
Xin
>
> HTH.
>
^ permalink raw reply [flat|nested] 27+ messages in thread* Re: [PATCH v5 0/5] x86/cpufeatures: Automatically generate required and disabled feature masks
2025-02-25 17:10 ` Xin Li
@ 2025-02-25 17:49 ` Borislav Petkov
2025-02-25 17:54 ` Nikolay Borisov
0 siblings, 1 reply; 27+ messages in thread
From: Borislav Petkov @ 2025-02-25 17:49 UTC (permalink / raw)
To: Xin Li
Cc: linux-kernel, linux-perf-users, tglx, mingo, dave.hansen, x86,
hpa, will, peterz, yury.norov, akpm, acme, namhyung, brgerst,
andrew.cooper3, nik.borisov
On Tue, Feb 25, 2025 at 09:10:01AM -0800, Xin Li wrote:
> After looking into the build issue, we think it's better to change to perl;
> GNU awk has quite a few extended features that standard awk doesn't support,
> e.g., BEGINFILE/FPAT/...
... which will make the kernel build depend on yet another tool. I know,
I know, perl is everywhere but someone would crawl out of the woodwork
complaining that building the kernel pulls in even more stuff.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
^ permalink raw reply [flat|nested] 27+ messages in thread* Re: [PATCH v5 0/5] x86/cpufeatures: Automatically generate required and disabled feature masks
2025-02-25 17:49 ` Borislav Petkov
@ 2025-02-25 17:54 ` Nikolay Borisov
2025-02-25 18:00 ` Borislav Petkov
0 siblings, 1 reply; 27+ messages in thread
From: Nikolay Borisov @ 2025-02-25 17:54 UTC (permalink / raw)
To: Borislav Petkov, Xin Li
Cc: linux-kernel, linux-perf-users, tglx, mingo, dave.hansen, x86,
hpa, will, peterz, yury.norov, akpm, acme, namhyung, brgerst,
andrew.cooper3
On 25.02.25 г. 19:49 ч., Borislav Petkov wrote:
> On Tue, Feb 25, 2025 at 09:10:01AM -0800, Xin Li wrote:
>> After looking into the build issue, we think it's better to change to perl;
>> GNU awk has quite a few extended features that standard awk doesn't support,
>> e.g., BEGINFILE/FPAT/...
>
> ... which will make the kernel build depend on yet another tool. I know,
> I know, perl is everywhere but someone would crawl out of the woodwork
> complaining that building the kernel pulls in even more stuff.
>
But don't we use perl even now:
$ find . -iname *.pl | wc -l
55
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v5 0/5] x86/cpufeatures: Automatically generate required and disabled feature masks
2025-02-25 17:54 ` Nikolay Borisov
@ 2025-02-25 18:00 ` Borislav Petkov
2025-02-25 18:10 ` H. Peter Anvin
0 siblings, 1 reply; 27+ messages in thread
From: Borislav Petkov @ 2025-02-25 18:00 UTC (permalink / raw)
To: Nikolay Borisov
Cc: Xin Li, linux-kernel, linux-perf-users, tglx, mingo, dave.hansen,
x86, hpa, will, peterz, yury.norov, akpm, acme, namhyung, brgerst,
andrew.cooper3
On Tue, Feb 25, 2025 at 07:54:50PM +0200, Nikolay Borisov wrote:
> But don't we use perl even now:
>
> $ find . -iname *.pl | wc -l
> 55
You're searching wrong:
$ git grep -w perl arch/x86/
arch/x86/crypto/poly1305-x86_64-cryptogams.pl:1:#!/usr/bin/env perl
$
That's some crypto-special thing.
This'll force it on *everything*.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
^ permalink raw reply [flat|nested] 27+ messages in thread* Re: [PATCH v5 0/5] x86/cpufeatures: Automatically generate required and disabled feature masks
2025-02-25 18:00 ` Borislav Petkov
@ 2025-02-25 18:10 ` H. Peter Anvin
2025-02-25 18:15 ` Borislav Petkov
0 siblings, 1 reply; 27+ messages in thread
From: H. Peter Anvin @ 2025-02-25 18:10 UTC (permalink / raw)
To: Borislav Petkov, Nikolay Borisov
Cc: Xin Li, linux-kernel, linux-perf-users, tglx, mingo, dave.hansen,
x86, will, peterz, yury.norov, akpm, acme, namhyung, brgerst,
andrew.cooper3
On February 25, 2025 10:00:51 AM PST, Borislav Petkov <bp@alien8.de> wrote:
>On Tue, Feb 25, 2025 at 07:54:50PM +0200, Nikolay Borisov wrote:
>> But don't we use perl even now:
>>
>> $ find . -iname *.pl | wc -l
>> 55
>
>You're searching wrong:
>
>$ git grep -w perl arch/x86/
>arch/x86/crypto/poly1305-x86_64-cryptogams.pl:1:#!/usr/bin/env perl
>$
>
>That's some crypto-special thing.
>
>This'll force it on *everything*.
>
Yeah we had that debate back and forth. Although I personally feel that any sensible build host would have or be able to have Perl, the consensus opinion seems to be that if it can be done with POSIX standard tools or host-side C it should be unless there is a very strong justification to the contrary.
I guess at some point that will add host-side Rust, which will be fun since that adds the whole Rust user space runtime.
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v5 0/5] x86/cpufeatures: Automatically generate required and disabled feature masks
2025-02-25 18:10 ` H. Peter Anvin
@ 2025-02-25 18:15 ` Borislav Petkov
2025-02-25 18:37 ` Xin Li
2025-02-25 20:30 ` H. Peter Anvin
0 siblings, 2 replies; 27+ messages in thread
From: Borislav Petkov @ 2025-02-25 18:15 UTC (permalink / raw)
To: H. Peter Anvin
Cc: Nikolay Borisov, Xin Li, linux-kernel, linux-perf-users, tglx,
mingo, dave.hansen, x86, will, peterz, yury.norov, akpm, acme,
namhyung, brgerst, andrew.cooper3
On Tue, Feb 25, 2025 at 10:10:03AM -0800, H. Peter Anvin wrote:
> Yeah we had that debate back and forth. Although I personally feel that any
> sensible build host would have or be able to have Perl, the consensus
> opinion seems to be that if it can be done with POSIX standard tools or
> host-side C it should be unless there is a very strong justification to the
> contrary.
Right, Xin, please make sure you put this rationale in the commit message so
that people can read it.
> I guess at some point that will add host-side Rust, which will be fun since
> that adds the whole Rust user space runtime.
There's that too. And that'll be even more fun. I can't wait for the
compiler-specific workarounds. We're having a lot of fun with two C compilers
already but who says we can't have more?!
/facepalm.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
^ permalink raw reply [flat|nested] 27+ messages in thread* Re: [PATCH v5 0/5] x86/cpufeatures: Automatically generate required and disabled feature masks
2025-02-25 18:15 ` Borislav Petkov
@ 2025-02-25 18:37 ` Xin Li
2025-02-25 20:30 ` H. Peter Anvin
1 sibling, 0 replies; 27+ messages in thread
From: Xin Li @ 2025-02-25 18:37 UTC (permalink / raw)
To: Borislav Petkov, H. Peter Anvin
Cc: Nikolay Borisov, linux-kernel, linux-perf-users, tglx, mingo,
dave.hansen, x86, will, peterz, yury.norov, akpm, acme, namhyung,
brgerst, andrew.cooper3
On 2/25/2025 10:15 AM, Borislav Petkov wrote:
> On Tue, Feb 25, 2025 at 10:10:03AM -0800, H. Peter Anvin wrote:
>> Yeah we had that debate back and forth. Although I personally feel that any
>> sensible build host would have or be able to have Perl, the consensus
>> opinion seems to be that if it can be done with POSIX standard tools or
>> host-side C it should be unless there is a very strong justification to the
>> contrary.
>
> Right, Xin, please make sure you put this rationale in the commit message so
> that people can read it.
Oh, I'm thinking to stick to awk with rewriting the part that a standard
POSIX awk doesn't support...
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH v5 0/5] x86/cpufeatures: Automatically generate required and disabled feature masks
2025-02-25 18:15 ` Borislav Petkov
2025-02-25 18:37 ` Xin Li
@ 2025-02-25 20:30 ` H. Peter Anvin
1 sibling, 0 replies; 27+ messages in thread
From: H. Peter Anvin @ 2025-02-25 20:30 UTC (permalink / raw)
To: Borislav Petkov
Cc: Nikolay Borisov, Xin Li, linux-kernel, linux-perf-users, tglx,
mingo, dave.hansen, x86, will, peterz, yury.norov, akpm, acme,
namhyung, brgerst, andrew.cooper3
On February 25, 2025 10:15:51 AM PST, Borislav Petkov <bp@alien8.de> wrote:
>On Tue, Feb 25, 2025 at 10:10:03AM -0800, H. Peter Anvin wrote:
>> Yeah we had that debate back and forth. Although I personally feel that any
>> sensible build host would have or be able to have Perl, the consensus
>> opinion seems to be that if it can be done with POSIX standard tools or
>> host-side C it should be unless there is a very strong justification to the
>> contrary.
>
>Right, Xin, please make sure you put this rationale in the commit message so
>that people can read it.
>
>> I guess at some point that will add host-side Rust, which will be fun since
>> that adds the whole Rust user space runtime.
>
>There's that too. And that'll be even more fun. I can't wait for the
>compiler-specific workarounds. We're having a lot of fun with two C compilers
>already but who says we can't have more?!
>
>/facepalm.
>
Yeah. See the thread on this topic, where it seems that the Rust language people haven't even figured out basic things like their aliasing model yet...
^ permalink raw reply [flat|nested] 27+ messages in thread