From: "Danilo Krummrich" <dakr@kernel.org>
To: "Joel Fernandes" <joelagnelf@nvidia.com>
Cc: "Yury Norov" <yury.norov@gmail.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"rust-for-linux@vger.kernel.org" <rust-for-linux@vger.kernel.org>,
"dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>,
"Alexandre Courbot" <acourbot@nvidia.com>,
"Alistair Popple" <apopple@nvidia.com>,
"Miguel Ojeda" <ojeda@kernel.org>,
"Alex Gaynor" <alex.gaynor@gmail.com>,
"Boqun Feng" <boqun.feng@gmail.com>,
"Gary Guo" <gary@garyguo.net>,
"bjorn3_gh@protonmail.com" <bjorn3_gh@protonmail.com>,
"Benno Lossin" <lossin@kernel.org>,
"Andreas Hindborg" <a.hindborg@kernel.org>,
"Alice Ryhl" <aliceryhl@google.com>,
"Trevor Gross" <tmgross@umich.edu>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"John Hubbard" <jhubbard@nvidia.com>,
"Timur Tabi" <ttabi@nvidia.com>,
"joel@joelfernandes.org" <joel@joelfernandes.org>,
"Elle Rhumsaa" <elle@weathered-steel.dev>,
"Daniel Almeida" <daniel.almeida@collabora.com>,
"nouveau@lists.freedesktop.org" <nouveau@lists.freedesktop.org>,
"Edwin Peer" <epeer@nvidia.com>
Subject: Re: [PATCH v7.1 2/4] gpu: nova-core: bitfield: Move bitfield-specific code from register! into new macro
Date: Thu, 16 Oct 2025 21:34:20 +0200 [thread overview]
Message-ID: <DDJZY40SO5EF.2066SEKKQ4U8I@kernel.org> (raw)
In-Reply-To: <2CF462DB-D2C8-473F-9D70-522E6AFEDCE4@nvidia.com>
On Thu Oct 16, 2025 at 9:28 PM CEST, Joel Fernandes wrote:
>> On Oct 16, 2025, at 1:48 PM, Yury Norov <yury.norov@gmail.com> wrote:
>> On Thu, Oct 16, 2025 at 11:13:21AM -0400, Joel Fernandes wrote:
>>> +///
>>> +/// bitfield! {
>>> +/// struct ControlReg {
>>> +/// 3:0 mode as u8 ?=> Mode;
>>> +/// 7:7 state as bool => State;
>>> +/// }
>>> +/// }
>>
>> This notation is really unwelcome this days. It may be OK for a random
>> macro in some local driver, but doesn't really work for a global basic
>> data type:
>>
>> https://lore.kernel.org/all/CAHk-=whoOUsqPKb7OQwhQf9H_3=5sXGPJrDbfQfwLB3Bi13tcQ@mail.gmail.com/
>>
>> I've already shared this link with you, and shared my concern.
>>
>> I realize that rust/bitfield derives the GENMASK(hi, lo) notation here,
>> and GENMASK() derives verilog or hardware specs popular notations. But
>> software people prefer lo:hi. I'm probably OK if you choose C-style
>> start:nbits, if you prefer. But let's stop this hi:lo early, please.
>>
>> Let me quote Linus from the link above:
>>
>> It does "high, low", which is often very unintuitive, and in fact the
>> very commit that introduced this thing from hell had to convert the
>> sane "low,high" cases to the other way around.
>
> I agree with Linus but I disagree with comparing it with these macros.
> I agree with Linus it is oddly unreadable when used as function parameters.
> But that is a different syntax. Over here we are using colons with sufficient whitespace around hi:lo.
I agree with Joel here.
While I'm not super opinionated for general bitfields, for the register!()
infrastructure I very much prefer the hi:lo notation, as this is the common
notation in datasheets and TRMs.
However, if we use hi:lo, we should use it decending, i.e.:
bitfield! {
struct ControlReg {
7:5 state as u8 => State;
3:0 mode as u8 ?=> Mode;
}
}
- Danilo
next prev parent reply other threads:[~2025-10-16 19:34 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-16 15:13 [PATCH v7.1 0/4] bitfield initial refactor within nova-core (RESEND) Joel Fernandes
2025-10-16 15:13 ` [PATCH v7.1 1/4] gpu: nova-core: register: use field type for Into implementation Joel Fernandes
2025-10-16 15:13 ` [PATCH v7.1 2/4] gpu: nova-core: bitfield: Move bitfield-specific code from register! into new macro Joel Fernandes
2025-10-16 17:48 ` Yury Norov
2025-10-16 19:28 ` Joel Fernandes
2025-10-16 19:34 ` Danilo Krummrich [this message]
2025-10-16 19:39 ` John Hubbard
2025-10-17 2:43 ` Alexandre Courbot
2025-10-20 22:50 ` John Hubbard
2025-10-20 23:07 ` Danilo Krummrich
2025-10-20 23:16 ` John Hubbard
2025-10-20 23:22 ` Danilo Krummrich
2025-10-21 0:04 ` John Hubbard
2025-10-16 19:49 ` Joel Fernandes
2025-10-16 19:42 ` John Hubbard
2025-10-16 19:47 ` Joel Fernandes
2025-10-16 15:13 ` [PATCH v7.1 3/4] gpu: nova-core: bitfield: Add support for different storage widths Joel Fernandes
2025-10-16 15:13 ` [PATCH v7.1 4/4] gpu: nova-core: bitfield: Add support for custom visiblity Joel Fernandes
2025-10-18 13:41 ` [PATCH v7.1 0/4] bitfield initial refactor within nova-core (RESEND) Alexandre Courbot
2025-10-20 23:44 ` Danilo Krummrich
2025-10-21 13:46 ` Alexandre Courbot
2025-10-21 13:51 ` Danilo Krummrich
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