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From: "Alexandre Courbot" <acourbot@nvidia.com>
To: "Joel Fernandes" <joelagnelf@nvidia.com>,
	<linux-kernel@vger.kernel.org>, <rust-for-linux@vger.kernel.org>,
	<dri-devel@lists.freedesktop.org>, <dakr@kernel.org>,
	<acourbot@nvidia.com>
Cc: "Alistair Popple" <apopple@nvidia.com>,
	"Miguel Ojeda" <ojeda@kernel.org>,
	"Alex Gaynor" <alex.gaynor@gmail.com>,
	"Boqun Feng" <boqun.feng@gmail.com>,
	"Gary Guo" <gary@garyguo.net>, <bjorn3_gh@protonmail.com>,
	"Benno Lossin" <lossin@kernel.org>,
	"Andreas Hindborg" <a.hindborg@kernel.org>,
	"Alice Ryhl" <aliceryhl@google.com>,
	"Trevor Gross" <tmgross@umich.edu>,
	"David Airlie" <airlied@gmail.com>,
	"Simona Vetter" <simona@ffwll.ch>,
	"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
	"Maxime Ripard" <mripard@kernel.org>,
	"Thomas Zimmermann" <tzimmermann@suse.de>,
	"John Hubbard" <jhubbard@nvidia.com>,
	"Timur Tabi" <ttabi@nvidia.com>, <joel@joelfernandes.org>,
	"Elle Rhumsaa" <elle@weathered-steel.dev>,
	"Yury Norov" <yury.norov@gmail.com>,
	"Daniel Almeida" <daniel.almeida@collabora.com>,
	<nouveau@lists.freedesktop.org>
Subject: Re: [PATCH v7.1 0/4] bitfield initial refactor within nova-core (RESEND)
Date: Sat, 18 Oct 2025 22:41:29 +0900	[thread overview]
Message-ID: <DDLHP1ABV9BA.3V0NXW3RWHGL6@nvidia.com> (raw)
In-Reply-To: <20251016151323.1201196-1-joelagnelf@nvidia.com>

On Fri Oct 17, 2025 at 12:13 AM JST, Joel Fernandes wrote:
> (Resending due to some commit message mistakes (missing SOB etc). Thanks!).
>
> These patches implement the initial refactoring and few improvements to the
> register and bitfield macros. Rebased on drm-rust-next.
>
> Main difference from the previous series [1] is dropped the moving out of
> nova-core pending BoundedInt changes:
> https://lore.kernel.org/all/20251003154748.1687160-1-joelagnelf@nvidia.com/
> Other than that, added tags, resolved conflict with kernel::fmt changes and
> rebased on drm-rust-next.

Thanks, this version is looking pretty good, and works as intended.

I plan on pushing these 4 patches soonish after fixing the line length
issues and the other few problems reported by checkpatch.

Danilo, please let me know if you think this is premature, but imho it
is good to set this part in stone to avoid merge conflicts with future
patches that will want to modify the register macro.

  parent reply	other threads:[~2025-10-18 13:41 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-16 15:13 [PATCH v7.1 0/4] bitfield initial refactor within nova-core (RESEND) Joel Fernandes
2025-10-16 15:13 ` [PATCH v7.1 1/4] gpu: nova-core: register: use field type for Into implementation Joel Fernandes
2025-10-16 15:13 ` [PATCH v7.1 2/4] gpu: nova-core: bitfield: Move bitfield-specific code from register! into new macro Joel Fernandes
2025-10-16 17:48   ` Yury Norov
2025-10-16 19:28     ` Joel Fernandes
2025-10-16 19:34       ` Danilo Krummrich
2025-10-16 19:39         ` John Hubbard
2025-10-17  2:43           ` Alexandre Courbot
2025-10-20 22:50           ` John Hubbard
2025-10-20 23:07             ` Danilo Krummrich
2025-10-20 23:16               ` John Hubbard
2025-10-20 23:22                 ` Danilo Krummrich
2025-10-21  0:04                   ` John Hubbard
2025-10-16 19:49         ` Joel Fernandes
2025-10-16 19:42       ` John Hubbard
2025-10-16 19:47         ` Joel Fernandes
2025-10-16 15:13 ` [PATCH v7.1 3/4] gpu: nova-core: bitfield: Add support for different storage widths Joel Fernandes
2025-10-16 15:13 ` [PATCH v7.1 4/4] gpu: nova-core: bitfield: Add support for custom visiblity Joel Fernandes
2025-10-18 13:41 ` Alexandre Courbot [this message]
2025-10-20 23:44   ` [PATCH v7.1 0/4] bitfield initial refactor within nova-core (RESEND) Danilo Krummrich
2025-10-21 13:46     ` Alexandre Courbot
2025-10-21 13:51       ` Danilo Krummrich

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