From: "Alexandre Courbot" <acourbot@nvidia.com>
To: "John Hubbard" <jhubbard@nvidia.com>,
"Danilo Krummrich" <dakr@kernel.org>,
"Joel Fernandes" <joelagnelf@nvidia.com>
Cc: "Yury Norov" <yury.norov@gmail.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"rust-for-linux@vger.kernel.org" <rust-for-linux@vger.kernel.org>,
"dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>,
"Alexandre Courbot" <acourbot@nvidia.com>,
"Alistair Popple" <apopple@nvidia.com>,
"Miguel Ojeda" <ojeda@kernel.org>,
"Alex Gaynor" <alex.gaynor@gmail.com>,
"Boqun Feng" <boqun.feng@gmail.com>,
"Gary Guo" <gary@garyguo.net>,
"bjorn3_gh@protonmail.com" <bjorn3_gh@protonmail.com>,
"Benno Lossin" <lossin@kernel.org>,
"Andreas Hindborg" <a.hindborg@kernel.org>,
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"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"Timur Tabi" <ttabi@nvidia.com>,
"joel@joelfernandes.org" <joel@joelfernandes.org>,
"Elle Rhumsaa" <elle@weathered-steel.dev>,
"Daniel Almeida" <daniel.almeida@collabora.com>,
"nouveau@lists.freedesktop.org" <nouveau@lists.freedesktop.org>,
"Edwin Peer" <epeer@nvidia.com>
Subject: Re: [PATCH v7.1 2/4] gpu: nova-core: bitfield: Move bitfield-specific code from register! into new macro
Date: Fri, 17 Oct 2025 11:43:42 +0900 [thread overview]
Message-ID: <DDK92UVGWKGE.2LEEVWDBRGVMC@nvidia.com> (raw)
In-Reply-To: <e4f5ca12-bf67-4b48-97a1-7ab2c771056e@nvidia.com>
On Fri Oct 17, 2025 at 4:39 AM JST, John Hubbard wrote:
> On 10/16/25 12:34 PM, Danilo Krummrich wrote:
>> On Thu Oct 16, 2025 at 9:28 PM CEST, Joel Fernandes wrote:
>>>> On Oct 16, 2025, at 1:48 PM, Yury Norov <yury.norov@gmail.com> wrote:
>>>> On Thu, Oct 16, 2025 at 11:13:21AM -0400, Joel Fernandes wrote:
> ...
>> While I'm not super opinionated for general bitfields, for the register!()
>> infrastructure I very much prefer the hi:lo notation, as this is the common
>> notation in datasheets and TRMs.
>>
>> However, if we use hi:lo, we should use it decending, i.e.:
>>
>
> Sure, descending works.
>
>> bitfield! {
>> struct ControlReg {
>> 7:5 state as u8 => State;
>> 3:0 mode as u8 ?=> Mode;
>
> And hi:lo matches our HW reference manuals. And if you're dealing
> with bitfields, you are often also dealing with HW, so this is
> a reasonable place in the SW to use hi:lo.
Definitely agree here. The use of `:` is what makes the difference with
the GENMASK macro, which separates its argument with a regular comma.
There is no room for mistaking these with anything else.
next prev parent reply other threads:[~2025-10-17 2:43 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-16 15:13 [PATCH v7.1 0/4] bitfield initial refactor within nova-core (RESEND) Joel Fernandes
2025-10-16 15:13 ` [PATCH v7.1 1/4] gpu: nova-core: register: use field type for Into implementation Joel Fernandes
2025-10-16 15:13 ` [PATCH v7.1 2/4] gpu: nova-core: bitfield: Move bitfield-specific code from register! into new macro Joel Fernandes
2025-10-16 17:48 ` Yury Norov
2025-10-16 19:28 ` Joel Fernandes
2025-10-16 19:34 ` Danilo Krummrich
2025-10-16 19:39 ` John Hubbard
2025-10-17 2:43 ` Alexandre Courbot [this message]
2025-10-20 22:50 ` John Hubbard
2025-10-20 23:07 ` Danilo Krummrich
2025-10-20 23:16 ` John Hubbard
2025-10-20 23:22 ` Danilo Krummrich
2025-10-21 0:04 ` John Hubbard
2025-10-16 19:49 ` Joel Fernandes
2025-10-16 19:42 ` John Hubbard
2025-10-16 19:47 ` Joel Fernandes
2025-10-16 15:13 ` [PATCH v7.1 3/4] gpu: nova-core: bitfield: Add support for different storage widths Joel Fernandes
2025-10-16 15:13 ` [PATCH v7.1 4/4] gpu: nova-core: bitfield: Add support for custom visiblity Joel Fernandes
2025-10-18 13:41 ` [PATCH v7.1 0/4] bitfield initial refactor within nova-core (RESEND) Alexandre Courbot
2025-10-20 23:44 ` Danilo Krummrich
2025-10-21 13:46 ` Alexandre Courbot
2025-10-21 13:51 ` Danilo Krummrich
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