From: Dave Hansen <dave.hansen@intel.com>
To: Rik van Riel <riel@surriel.com>, linux-kernel@vger.kernel.org
Cc: kernel-team@meta.com, dave.hansen@linux.intel.com,
luto@kernel.org, peterz@infradead.org, bp@alien8.de,
x86@kernel.org, yu-cheng.yu@intel.com
Subject: Re: [PATCH 3/3] x86/mm: Change cpa_flush() to call flush_kernel_range() directly
Date: Mon, 2 Jun 2025 10:22:59 -0700 [thread overview]
Message-ID: <a799a880-debc-4805-abc8-7756d21e5262@intel.com> (raw)
In-Reply-To: <20250602133402.3385163-4-riel@surriel.com>
On 6/2/25 06:30, Rik van Riel wrote:
> From: Yu-cheng Yu <yu-cheng.yu@intel.com>
>
> The function cpa_flush() calls __flush_tlb_one_kernel() and
> flush_tlb_all().
>
> Replacing that with a call to flush_tlb_kernel_range() allows
> cpa_flush() to make use of INVLPGB or RAR without any additional
> changes.
>
> Initialize invlpgb_count_max to 1, since flush_tlb_kernel_range()
> can now be called before invlpgb_count_max has been initialized
> to the value read from CPUID.
Looks good, thanks for picking this out of the RAR series:
Acked-by: Dave Hansen <dave.hansen@linux.intel.com>
prev parent reply other threads:[~2025-06-02 17:23 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-02 13:30 [PATCH 0/3] TLB flush fixes Rik van Riel
2025-06-02 13:30 ` [PATCH 1/3] x86/mm: Fix potential overflow in user_pcid_flush_mask Rik van Riel
2025-06-02 16:55 ` Dave Hansen
2025-06-03 21:20 ` Rik van Riel
2025-06-03 21:33 ` Dave Hansen
2025-06-02 13:30 ` [PATCH 2/3] x86/mm: Fix early boot use of INVPLGB Rik van Riel
2025-06-02 17:21 ` Dave Hansen
2025-06-02 13:30 ` [PATCH 3/3] x86/mm: Change cpa_flush() to call flush_kernel_range() directly Rik van Riel
2025-06-02 17:22 ` Dave Hansen [this message]
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