From: Jason-JH Lin <jason-jh.lin@mediatek.com>
To: CK Hu <ck.hu@mediatek.com>,
Chun-Kuang Hu <chunkuang.hu@kernel.org>,
"Rob Herring" <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>
Cc: Rex-BC Chen <rex-bc.chen@mediatek.com>,
Singo Chang <singo.chang@mediatek.com>,
<dri-devel@lists.freedesktop.org>,
<linux-mediatek@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: Re: [PATCH RESEND v3 6/9] drm/mediatek: Add gamma support different bank_size for other SoC
Date: Wed, 14 Sep 2022 09:28:16 +0800 [thread overview]
Message-ID: <ae2f9ec269c143032ab482ab58dc7539dd4e02b9.camel@mediatek.com> (raw)
In-Reply-To: <3c67e742bdb06e55ba170a0a6dc79e6f6833c0e7.camel@mediatek.com>
Hi CK,
Thanks for the reviews.
On Mon, 2022-09-12 at 13:12 +0800, CK Hu wrote:
> Hi, Jason:
>
> On Mon, 2022-09-12 at 09:30 +0800, Jason-JH.Lin wrote:
> > Add multiple bank support for mt8195.
> > If bank size is 0 which means no bank support.
> >
> > Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
> > ---
> > drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 45 +++++++++++++------
> > ----
> > 1 file changed, 26 insertions(+), 19 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> > b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> > index be82d15a5204..45da2b6206c8 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> > @@ -21,6 +21,7 @@
> > #define GAMMA_LUT_EN BIT(1)
> > #define GAMMA_DITHERING BIT(2)
> > #define DISP_GAMMA_SIZE 0x0030
> > +#define DISP_GAMMA_BANK 0x0100
> > #define DISP_GAMMA_LUT 0x0700
> >
> > #define LUT_10BIT_MASK 0x03ff
> > @@ -33,6 +34,7 @@ struct mtk_disp_gamma_data {
> > bool lut_diff;
> > u16 lut_size;
> > u8 lut_bits;
> > + u16 bank_size;
> > };
> >
> > /*
> > @@ -75,9 +77,10 @@ void mtk_gamma_set_common(struct device *dev,
> > void
> > __iomem *regs, struct drm_crt
> > struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
> > bool lut_diff = false;
> > u16 lut_size = LUT_SIZE_DEFAULT;
> > + u16 bank_size = lut_size;
> > u8 lut_bits = LUT_BITS_DEFAULT;
> > u8 shift_bits;
> > - unsigned int i, reg;
> > + unsigned int i, j, reg, bank_num;
> > struct drm_color_lut *lut;
> > void __iomem *lut_base;
> > u32 word, mask;
> > @@ -87,8 +90,10 @@ void mtk_gamma_set_common(struct device *dev,
> > void
> > __iomem *regs, struct drm_crt
> > lut_diff = gamma->data->lut_diff;
> > lut_size = gamma->data->lut_size;
> > lut_bits = gamma->data->lut_bits;
> > + bank_size = gamma->data->bank_size;
> > }
> >
> > + bank_num = lut_size / bank_size;
> > shift_bits = LUT_INPUT_BITS - lut_bits;
> > mask = GENMASK(lut_bits - 1, 0);
> >
> > @@ -98,25 +103,27 @@ void mtk_gamma_set_common(struct device *dev,
> > void __iomem *regs, struct drm_crt
> > writel(reg, regs + DISP_GAMMA_CFG);
> > lut_base = regs + DISP_GAMMA_LUT;
> > lut = (struct drm_color_lut *)state->gamma_lut->data;
> > - for (i = 0; i < lut_size; i++) {
> > -
> > - if (!lut_diff || (i % 2 == 0)) {
> > - word = (((lut[i].red >> shift_bits) &
> > mask) << 20) +
> > - (((lut[i].green >> shift_bits)
> > & mask) << 10) +
> > - ((lut[i].blue >> shift_bits) &
> > mask);
> > - } else {
> > - diff[0] = (lut[i].red >> shift_bits) -
> > - (lut[i - 1].red >>
> > shift_bits);
> > - diff[1] = (lut[i].green >> shift_bits)
> > -
> > - (lut[i - 1].green >>
> > shift_bits);
> > - diff[2] = (lut[i].blue >> shift_bits) -
> > - (lut[i - 1].blue >>
> > shift_bits);
> > -
> > - word = ((diff[0] & mask) << 20) +
> > - ((diff[1] & mask) << 10) +
> > - (diff[2] & mask);
> > + for (j = 0; j < bank_num; j++) {
> > + writel(j, regs + DISP_GAMMA_BANK);
>
> Does mt8173 and mt8183 has this register? If not, do not set this
> register in mt8173 and mt8183.
>
> Regards,
> CK
mt8173 and mt8183 don't have this register, so I'll fix it.
Regards,
Jason-JH.Lin
next prev parent reply other threads:[~2022-09-14 1:28 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20220912013006.27541-1-jason-jh.lin@mediatek.com>
[not found] ` <20220912013006.27541-4-jason-jh.lin@mediatek.com>
[not found] ` <44d19c4ea29bdbf3a07890ed25fd637f8805b6c6.camel@mediatek.com>
2022-09-14 1:10 ` [PATCH RESEND v3 3/9] drm/mediatek: Adjust mtk_drm_gamma_set_common parameters Jason-JH Lin
[not found] ` <20220912013006.27541-5-jason-jh.lin@mediatek.com>
[not found] ` <e1945785da7c56bbb7fe94926c39fc6c3593cdb0.camel@mediatek.com>
2022-09-14 1:14 ` [PATCH RESEND v3 4/9] drm/mediatek: Add gamma support different lut_size for other SoC Jason-JH Lin
[not found] ` <20220912013006.27541-6-jason-jh.lin@mediatek.com>
[not found] ` <b740f81d62ce73e08a2a43637b4f951298b1c28a.camel@mediatek.com>
2022-09-14 1:17 ` [PATCH RESEND v3 5/9] drm/mediatek: Add gamma support different lut_bits " Jason-JH Lin
[not found] ` <20220912013006.27541-9-jason-jh.lin@mediatek.com>
[not found] ` <ecdb209437e78b3273374ef963fd2c5c64ba88fd.camel@mediatek.com>
2022-09-14 1:26 ` [PATCH RESEND v3 8/9] drm/mediatek: Add clear RELAY_MODE bit to set gamma Jason-JH Lin
[not found] ` <20220912013006.27541-2-jason-jh.lin@mediatek.com>
2022-09-18 9:59 ` [PATCH RESEND v3 1/9] dt-bindings: mediatek: modify item formatting for gamma Krzysztof Kozlowski
[not found] ` <20220912013006.27541-3-jason-jh.lin@mediatek.com>
2022-09-18 9:59 ` [PATCH RESEND v3 2/9] dt-bindings: mediatek: Add gamma compatible for mt8195 Krzysztof Kozlowski
2023-04-26 11:43 ` [PATCH RESEND v3 0/9] Add gamma lut support " AngeloGioacchino Del Regno
2023-04-27 15:15 ` AngeloGioacchino Del Regno
2023-04-28 6:45 ` Jason-JH Lin (林睿祥)
[not found] ` <20220912013006.27541-7-jason-jh.lin@mediatek.com>
[not found] ` <3c67e742bdb06e55ba170a0a6dc79e6f6833c0e7.camel@mediatek.com>
2022-09-14 1:28 ` Jason-JH Lin [this message]
2023-04-26 12:06 ` [PATCH RESEND v3 6/9] drm/mediatek: Add gamma support different bank_size for other SoC AngeloGioacchino Del Regno
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