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From: Andrea Righi <arighi@nvidia.com>
To: Christian Loehle <christian.loehle@arm.com>
Cc: K Prateek Nayak <kprateek.nayak@amd.com>,
	Ingo Molnar <mingo@redhat.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Juri Lelli <juri.lelli@redhat.com>,
	Vincent Guittot <vincent.guittot@linaro.org>,
	Dietmar Eggemann <dietmar.eggemann@arm.com>,
	Steven Rostedt <rostedt@goodmis.org>,
	Ben Segall <bsegall@google.com>, Mel Gorman <mgorman@suse.de>,
	Valentin Schneider <vschneid@redhat.com>,
	Ricardo Neri <ricardo.neri-calderon@linux.intel.com>,
	Shrikanth Hegde <sshegde@linux.ibm.com>,
	Felix Abecassis <fabecassis@nvidia.com>,
	Joel Fernandes <joelagnelf@nvidia.com>,
	Phil Auld <pauld@redhat.com>,
	linux-kernel@vger.kernel.org,
	Julia Lawall <julia.lawall@inria.fr>
Subject: Re: [PATCH] sched/fair: Stabilize idle SMT core selection with asym-capacity
Date: Fri, 3 Jul 2026 16:52:17 +0200	[thread overview]
Message-ID: <akfMoVRrATQnO8j_@gpd4> (raw)
In-Reply-To: <2ed258a2-ac9f-413b-aa39-59a59cdee1fe@arm.com>

Hi Christian,

On Fri, Jul 03, 2026 at 11:00:23AM +0100, Christian Loehle wrote:
...
> > I think the key here is that temporary runqueue stacking is preferable to
> > consuming both SMT siblings when fully-idle SMT cores are available, more than
> > having benfits from the stacking itself.
> > 
> I'm curious now, as a not at all SMT expert, this is super counterintuitive to me,
> am I missing something? How does this happen?
> The SMT-switch should be way less overhead than the task context-switch, no?

As mentioned in my other email, I found a surprising asymmetry on this machine:
pinning one worker per core to the first SMT siblings gives substantially better
performance than pinning them to the second siblings, despite firmware
advertising identical capacity and frequency for both.

Since this change uses cpumask_first_and() as the stable representative, it also
strongly biases placement toward the faster first siblings. That may explain
much of the observed improvement independently of whether temporary stacking
helps the load balancer.

I haven't yet established that stacking two tasks on sibling 0 is better than
running one task on each sibling simultaneously. Also, the latter is not really
an SMT “switch”: both threads run concurrently and compete for shared execution
and memory resources, whereas stacking involves normal scheduler time-sharing
and context switches.

Once I figure out exactly why this machine has SMT asymmetry, I'll share the
details. :)

Thanks,
-Andrea

  reply	other threads:[~2026-07-03 14:52 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-30 15:27 [PATCH] sched/fair: Stabilize idle SMT core selection with asym-capacity Andrea Righi
2026-07-03  5:51 ` K Prateek Nayak
2026-07-03  9:40   ` Andrea Righi
2026-07-03 10:00     ` Christian Loehle
2026-07-03 14:52       ` Andrea Righi [this message]
2026-07-03 16:54         ` Peter Zijlstra
2026-07-03 17:07           ` Andrea Righi
2026-07-03 11:20     ` Julia Lawall
2026-07-03 14:38       ` Andrea Righi
2026-07-03 12:33     ` Andrea Righi
2026-07-03 12:51       ` Julia Lawall

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