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From: Sean Christopherson <seanjc@google.com>
To: Yosry Ahmed <yosry@kernel.org>
Cc: Jim Mattson <jmattson@google.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	 Maxim Levitsky <mlevitsk@redhat.com>,
	Vitaly Kuznetsov <vkuznets@redhat.com>,
	 Tom Lendacky <thomas.lendacky@amd.com>,
	kvm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH v2 02/25] KVM: SVM: Passthrough the number of supported ASIDs
Date: Tue, 14 Jul 2026 16:41:41 -0700	[thread overview]
Message-ID: <albJNb-akQJ97Yor@google.com> (raw)
In-Reply-To: <CAO9r8zNso+8iKgiHc_VnCnTLKor-mGsFEV1U1N=RVLdn=FPNUQ@mail.gmail.com>

On Tue, Jul 14, 2026, Yosry Ahmed wrote:
> On Tue, Jul 14, 2026 at 2:28 PM Jim Mattson <jmattson@google.com> wrote:
> > > > Note: QEMU currently hardcodes the number of ASIDs to 16, so this change
> > > > doesn't help QEMU VMs (without making a similar change in QEMU).
> > >
> > > I had a discussion with Jim internally about what our VMM should
> > > advertise as the number of ASIDs, and based on that I think passing
> > > through the hardware value may not be the best idea, at least not
> > > without some disclaimers.
> > >
> > > Jim pointed out that AMD CPUs will ignore unsupported ASID bits, or at
> > > least earlier ones did, even though it's not mentioned in the APM
> > > (last time I checked). This means that technically KVM can ignore the
> > > higher bits of the ASID set by L1 beyond supported ones (e.g. if it
> > > uses a hashtable to multiplex L1 ASIDs onto several physical ASIDs).
> > > KVM doesn't currently do so with or without this series, but it could.

Deliberately ignoring ASID bits would certainly be a choice.  I can see why
hardware might make that compromise, but I don't see any reason why KVM should
do the same.

> > > The problem happens if a migration pool contains multiple AMD CPUs
> > > with a different number of ASIDs in hardware. If the VMM advertises
> > > the greater value of the two, it would technically be advertising an
> > > unsupported number of ASIDs on one of the CPUs. If KVM ignores the
> > > upper bits based on what it supports, not what userspace advertises in
> > > CPUID, then userspace would be shooting itself in the foot.
> > >
> > > I think technically speaking userspace would be in the wrong for using
> > > a number of ASIDs above what KVM_GET_SUPPORTED_CPUID provides, and it
> > > should use a number of ASIDs that is supported by all CPUs in a
> > > migration pool. However, this makes the VMM's life difficult, say if
> > > AMD decides to reduce the number of ASIDs in a newer CPU just for
> > > kicks.
> > >
> > > All of this is hypothetical in nature, but it's a very valid concern imo.

Eh, I disagree.  It's hypothetical, and not a concern for KVM.

> > > I think there are several ways we can handle this so that VMMs can
> > > reasonably start advertising more ASIDs to guests without these
> > > complications:

What complications?  Advertise the lowest common feature set for the pool, just
like userspace has to do for literally every other feature.

> > > 1. We can just advertise a larger ASID value instead of 8 (say 16K or
> > > 32K), rather than passthrough what's in hardware. I assume this would
> > > mean that KVM is more-or-less committing to supporting that number of
> > > ASIDs regardless of underlying hardware (i.e. KVM wouldn't reduce it
> > > in the future). In this case, a VMM can just advertise the same value.
> > >
> > > 2. We can advertise the maximum number of ASIDs (2^32 - 1?), which is
> > > the same as option (1), except that we're biting the bullet and
> > > preventing the possibility of KVM ignoring upper bits completely.
> > > Might be too aggressive.

And potentially suboptimal for performance.  There might be a legitimate reason
why a CPU generation advertises X instead of Y.

> > > 3. Document (somewhere) that KVM should use the userspace advertised
> > > value as the source of truth for ignorable bits, even if KVM
> > > technically supports a lower value. As I am writing this I am
> > > realizing it doesn't make much sense as it means that the value
> > > supported by KVM is meaningless.

As above, I don't think KVM should have "ignorable bits" in the first place.

> > > Maybe that comes naturally with the "don't break userspace" rule, but it
> > > could also fall under the category of userspace shooting itself in the
> > > foot and KVM letting it.
> > >
> > > 4. Do nothing, let this be userspace's problem, and hope that AMD
> > > doesn't reduce the number of ASIDs in a future CPU.

By "Do nothing", I assume you mean "advertise what's reported in CPUID"?

If so there's a fifth option.

 5. Be super paranoid and zero the entry, like KVM does for the topology leaves.
    See commit 45e966fcca03 ("KVM: x86: Do not return host topology information
    from KVM_GET_SUPPORTED_CPUID").
    
IMO, the only sane options are #4 and #5, and #5 feels unnecessarily paranoid.
I genuinely don't see how this is any different than any other feature where
userspace needs to not over-advertise features across its migration pool.

"Simple" use cases that don't do migration and just reflect KVM's CPUID into
the guest Just Work, and more sophisticated use cases get an explicit hint from
KVM as to the optimal number of ASIDs to advertise.  I don't see why we need to
make it more complex than that.

  reply	other threads:[~2026-07-14 23:41 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-16  0:41 [RFC PATCH v2 00/25] Optimize nSVM TLB flushes Yosry Ahmed
2026-06-16  0:41 ` [RFC PATCH v2 01/25] KVM: nSVM: Flush the TLB after forcefully leaving nested Yosry Ahmed
2026-06-16  0:41 ` [RFC PATCH v2 02/25] KVM: SVM: Passthrough the number of supported ASIDs Yosry Ahmed
2026-07-14 13:20   ` Yosry Ahmed
2026-07-14 21:28     ` Jim Mattson
2026-07-14 21:43       ` Yosry Ahmed
2026-07-14 23:41         ` Sean Christopherson [this message]
2026-07-15  6:32           ` Jim Mattson
2026-06-16  0:41 ` [RFC PATCH v2 03/25] KVM: VMX: Generalize VPID allocation to be vendor-neutral Yosry Ahmed
2026-06-16  0:41 ` [RFC PATCH v2 04/25] KVM: x86/mmu: Support specifying a minimum TLB tag Yosry Ahmed
2026-06-16  0:41 ` [RFC PATCH v2 05/25] KVM: SVM: Add helpers to set/clear ASID flush in VMCB Yosry Ahmed
2026-06-16  0:41 ` [RFC PATCH v2 06/25] KVM: SVM: Fallback to flush everything if FLUSHBYASID is not available Yosry Ahmed
2026-06-16  0:41 ` [RFC PATCH v2 07/25] KVM: SVM: Duplicate pre-run ASID check for SEV and non-SEV guests Yosry Ahmed
2026-06-16  0:41 ` [RFC PATCH v2 08/25] KVM: SEV: Stop using per-vCPU ASID for SEV VMs Yosry Ahmed
2026-06-16  0:41 ` [RFC PATCH v2 09/25] KVM: SVM: Use a static ASID per vCPU Yosry Ahmed
2026-06-16  0:41 ` [RFC PATCH v2 10/25] KVM: nSVM: Add a placeholder ASID for L2 Yosry Ahmed
2026-06-16  0:41 ` [RFC PATCH v2 11/25] KVM: x86: hyper-v: Rename kvm_hv_vcpu_purge_flush_tlb() Yosry Ahmed
2026-06-16  0:41 ` [RFC PATCH v2 12/25] KVM: x86: hyper-v: Allow puring all TLB flush FIFOs Yosry Ahmed
2026-06-16  0:41 ` [RFC PATCH v2 13/25] KVM: nSVM: Flush both L1 and L2 ASIDs on KVM_REQ_TLB_FLUSH Yosry Ahmed
2026-06-16  0:41 ` [RFC PATCH v2 14/25] KVM: nSVM: Move svm_switch_vmcb() to nested.c Yosry Ahmed
2026-06-16  0:41 ` [RFC PATCH v2 15/25] KVM: nSVM: Call nested_svm_transition_tlb_flush() on every VMCB switch Yosry Ahmed
2026-06-16  0:41 ` [RFC PATCH v2 16/25] KVM: nSVM: Split nested_svm_transition_tlb_flush() into entry/exit fns Yosry Ahmed
2026-06-16  0:41 ` [RFC PATCH v2 17/25] KVM: nSVM: Service local TLB flushes before nested transitions Yosry Ahmed
2026-06-16  0:41 ` [RFC PATCH v2 18/25] KVM: nSVM: Handle nested TLB flush requests through TLB_CONTROL Yosry Ahmed
2026-06-16  0:41 ` [RFC PATCH v2 19/25] KVM: nSVM: Flush the TLB if L1 changes L2's ASID in vmcb12 Yosry Ahmed
2026-06-16  0:41 ` [RFC PATCH v2 20/25] KVM: nSVM: Do not reset TLB_CONTROL in vmcb02 on nested VM-Enter Yosry Ahmed
2026-06-16  0:41 ` [RFC PATCH v2 21/25] KVM: x86/mmu: rename __kvm_mmu_invalidate_addr() Yosry Ahmed
2026-06-16  0:41 ` [RFC PATCH v2 22/25] KVM: x86/mmu: Refactor kvm_mmu_invlpg() to allow skipping the gva flush Yosry Ahmed
2026-06-16  0:41 ` [RFC PATCH v2 23/25] KVM: nSVM: Flush L2's ASID when emulating INVLPGA Yosry Ahmed
2026-06-16  0:41 ` [RFC PATCH v2 24/25] KVM: nSVM: Use different ASIDs for L1 and L2 Yosry Ahmed
2026-06-16  0:41 ` [RFC PATCH v2 25/25] DO NOT MERGE: Add nested_tlb_force_flush Yosry Ahmed

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