[RFT PATCH] clk: qcom: dispcc-x1e80100: Fix (possibly) dumping regmap

[RFT PATCH] clk: qcom: dispcc-x1e80100: Fix (possibly) dumping regmap

[Krzysztof Kozlowski]

Reading few registers at the end of the block (e.g. 0x10000, 0x10004)
might result in synchronous external abort, so limit the regmap to the
last readable register which allows dumping the regs for debugging.

Reported-by: Daniel J Blueman <daniel@quora.org>
Closes: https://lore.kernel.org/r/CAMVG2su+V5fcZ9LOC0Qm3bpfnhpbmQdJackc7-RvfztDL_dajw@mail.gmail.com/
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
---

Not really tested, just idea based on sm8750 and datasheet/manual.

 drivers/clk/qcom/dispcc-x1e80100.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/qcom/dispcc-x1e80100.c b/drivers/clk/qcom/dispcc-x1e80100.c
index aa7fd43969f9..575ba90d2070 100644
--- a/drivers/clk/qcom/dispcc-x1e80100.c
+++ b/drivers/clk/qcom/dispcc-x1e80100.c
@@ -1634,7 +1634,7 @@ static const struct regmap_config disp_cc_x1e80100_regmap_config = {
 	.reg_bits = 32,
 	.reg_stride = 4,
 	.val_bits = 32,
-	.max_register = 0x11008,
+	.max_register = 0xf004, /* 0x10000, 0x10004 and maybe others are for TZ */
 	.fast_io = true,
 };
 
-- 
2.51.0

Re: [RFT PATCH] clk: qcom: dispcc-x1e80100: Fix (possibly) dumping regmap

[Daniel J Blueman]

On Tue, 5 May 2026 at 23:29, Krzysztof Kozlowski
<krzysztof.kozlowski@oss.qualcomm.com> wrote:
>
> Reading few registers at the end of the block (e.g. 0x10000, 0x10004)
> might result in synchronous external abort, so limit the regmap to the
> last readable register which allows dumping the regs for debugging.
>
> Reported-by: Daniel J Blueman <daniel@quora.org>
> Closes: https://lore.kernel.org/r/CAMVG2su+V5fcZ9LOC0Qm3bpfnhpbmQdJackc7-RvfztDL_dajw@mail.gmail.com/
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
> ---
>
> Not really tested, just idea based on sm8750 and datasheet/manual.
>
>  drivers/clk/qcom/dispcc-x1e80100.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/qcom/dispcc-x1e80100.c b/drivers/clk/qcom/dispcc-x1e80100.c
> index aa7fd43969f9..575ba90d2070 100644
> --- a/drivers/clk/qcom/dispcc-x1e80100.c
> +++ b/drivers/clk/qcom/dispcc-x1e80100.c
> @@ -1634,7 +1634,7 @@ static const struct regmap_config disp_cc_x1e80100_regmap_config = {
>         .reg_bits = 32,
>         .reg_stride = 4,
>         .val_bits = 32,
> -       .max_register = 0x11008,
> +       .max_register = 0xf004, /* 0x10000, 0x10004 and maybe others are for TZ */
>         .fast_io = true,
>  };

Great work! With this change, no system hangs are observed reading
/sys/kernel/debug/regmap/af00000.clock-controller/registers on my X1
setup. This and the same fix for the other clock controllers are a top
candidate for -stable.

Tested-by: Daniel J Blueman <daniel@quora.org>

Thanks,
  Dan

--
Daniel J Blueman

Re: [RFT PATCH] clk: qcom: dispcc-x1e80100: Fix (possibly) dumping regmap

[Konrad Dybcio]

On 5/5/26 5:29 PM, Krzysztof Kozlowski wrote:
> Reading few registers at the end of the block (e.g. 0x10000, 0x10004)
> might result in synchronous external abort, so limit the regmap to the
> last readable register which allows dumping the regs for debugging.
> 
> Reported-by: Daniel J Blueman <daniel@quora.org>
> Closes: https://lore.kernel.org/r/CAMVG2su+V5fcZ9LOC0Qm3bpfnhpbmQdJackc7-RvfztDL_dajw@mail.gmail.com/
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
> ---
> 
> Not really tested, just idea based on sm8750 and datasheet/manual.

Not a great explanation for a completely different SoC :P 

> 
>  drivers/clk/qcom/dispcc-x1e80100.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/qcom/dispcc-x1e80100.c b/drivers/clk/qcom/dispcc-x1e80100.c
> index aa7fd43969f9..575ba90d2070 100644
> --- a/drivers/clk/qcom/dispcc-x1e80100.c
> +++ b/drivers/clk/qcom/dispcc-x1e80100.c
> @@ -1634,7 +1634,7 @@ static const struct regmap_config disp_cc_x1e80100_regmap_config = {
>  	.reg_bits = 32,
>  	.reg_stride = 4,
>  	.val_bits = 32,
> -	.max_register = 0x11008,
> +	.max_register = 0xf004, /* 0x10000, 0x10004 and maybe others are for TZ */

There's some trailing registers for debugcc but we normally access those
via devmem anyway

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Konrad