[PATCH] drm/amd/display: Don't program BLNDGAM_MEM_PWR_FORCE when CM low-power is disabled on DCN30

[PATCH] drm/amd/display: Don't program BLNDGAM_MEM_PWR_FORCE when CM low-power is disabled on DCN30

[Matthew Schwartz]

Before commit 33056a97ae5e ("drm/amd/display: Remove double checks for
`debug.enable_mem_low_power.bits.cm`"), dpp3_program_blnd_lut(NULL)
checked the low-power debug flag before calling
dpp3_power_on_blnd_lut(false).

After commit 33056a97ae5e ("drm/amd/display: Remove double checks for
`debug.enable_mem_low_power.bits.cm`"), dpp3_program_blnd_lut(NULL)
unconditionally calls dpp3_power_on_blnd_lut(false). The BLNDGAM power
helper writes BLNDGAM_MEM_PWR_FORCE when CM low-power is disabled, causing
immediate SRAM power toggles instead of deferring at vupdate. This can
disrupt atomic color/LUT sequencing during transitions between
direct scanout and composition within gamescope's DRM backend on
Steam Deck OLED.

To fix this, leave the BLNDGAM power state unchanged when low-power is
disabled, matching dpp3_power_on_hdr3dlut and dpp3_power_on_shaper.

Fixes: 33056a97ae5e ("drm/amd/display: Remove double checks for `debug.enable_mem_low_power.bits.cm`")
Signed-off-by: Matthew Schwartz <matthew.schwartz@linux.dev>
---
 drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
index 09be2a90cc79d..4f569cd8a5d61 100644
--- a/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
+++ b/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
@@ -578,9 +578,6 @@ static void dpp3_power_on_blnd_lut(
 			dpp_base->ctx->dc->optimized_required = true;
 			dpp_base->deferred_reg_writes.bits.disable_blnd_lut = true;
 		}
-	} else {
-		REG_SET(CM_MEM_PWR_CTRL, 0,
-				BLNDGAM_MEM_PWR_FORCE, power_on == true ? 0 : 1);
 	}
 }
 
-- 
2.51.1.dirty

Re: [PATCH] drm/amd/display: Don't program BLNDGAM_MEM_PWR_FORCE when CM low-power is disabled on DCN30

[Mario Limonciello]

On 10/20/2025 6:09 PM, Matthew Schwartz wrote:
> Before commit 33056a97ae5e ("drm/amd/display: Remove double checks for
> `debug.enable_mem_low_power.bits.cm`"), dpp3_program_blnd_lut(NULL)
> checked the low-power debug flag before calling
> dpp3_power_on_blnd_lut(false).
> 
> After commit 33056a97ae5e ("drm/amd/display: Remove double checks for
> `debug.enable_mem_low_power.bits.cm`"), dpp3_program_blnd_lut(NULL)
> unconditionally calls dpp3_power_on_blnd_lut(false). The BLNDGAM power
> helper writes BLNDGAM_MEM_PWR_FORCE when CM low-power is disabled, causing
> immediate SRAM power toggles instead of deferring at vupdate. This can
> disrupt atomic color/LUT sequencing during transitions between
> direct scanout and composition within gamescope's DRM backend on
> Steam Deck OLED.
> 
> To fix this, leave the BLNDGAM power state unchanged when low-power is
> disabled, matching dpp3_power_on_hdr3dlut and dpp3_power_on_shaper.
> 
> Fixes: 33056a97ae5e ("drm/amd/display: Remove double checks for `debug.enable_mem_low_power.bits.cm`")
> Signed-off-by: Matthew Schwartz <matthew.schwartz@linux.dev>

Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>

> ---
>   drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c | 3 ---
>   1 file changed, 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
> index 09be2a90cc79d..4f569cd8a5d61 100644
> --- a/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
> +++ b/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
> @@ -578,9 +578,6 @@ static void dpp3_power_on_blnd_lut(
>   			dpp_base->ctx->dc->optimized_required = true;
>   			dpp_base->deferred_reg_writes.bits.disable_blnd_lut = true;
>   		}
> -	} else {
> -		REG_SET(CM_MEM_PWR_CTRL, 0,
> -				BLNDGAM_MEM_PWR_FORCE, power_on == true ? 0 : 1);
>   	}
>   }
>   

Re: [PATCH] drm/amd/display: Don't program BLNDGAM_MEM_PWR_FORCE when CM low-power is disabled on DCN30

[Harry Wentland]

On 2025-10-20 19:09, Matthew Schwartz wrote:
> Before commit 33056a97ae5e ("drm/amd/display: Remove double checks for
> `debug.enable_mem_low_power.bits.cm`"), dpp3_program_blnd_lut(NULL)
> checked the low-power debug flag before calling
> dpp3_power_on_blnd_lut(false).
> 
> After commit 33056a97ae5e ("drm/amd/display: Remove double checks for
> `debug.enable_mem_low_power.bits.cm`"), dpp3_program_blnd_lut(NULL)
> unconditionally calls dpp3_power_on_blnd_lut(false). The BLNDGAM power
> helper writes BLNDGAM_MEM_PWR_FORCE when CM low-power is disabled, causing
> immediate SRAM power toggles instead of deferring at vupdate. This can
> disrupt atomic color/LUT sequencing during transitions between
> direct scanout and composition within gamescope's DRM backend on
> Steam Deck OLED.
> 
> To fix this, leave the BLNDGAM power state unchanged when low-power is
> disabled, matching dpp3_power_on_hdr3dlut and dpp3_power_on_shaper.
> 
> Fixes: 33056a97ae5e ("drm/amd/display: Remove double checks for `debug.enable_mem_low_power.bits.cm`")
> Signed-off-by: Matthew Schwartz <matthew.schwartz@linux.dev>

Reviewed-by: Harry Wentland <harry.wentland@amd.com>

Harry

> ---
>  drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c | 3 ---
>  1 file changed, 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
> index 09be2a90cc79d..4f569cd8a5d61 100644
> --- a/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
> +++ b/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
> @@ -578,9 +578,6 @@ static void dpp3_power_on_blnd_lut(
>  			dpp_base->ctx->dc->optimized_required = true;
>  			dpp_base->deferred_reg_writes.bits.disable_blnd_lut = true;
>  		}
> -	} else {
> -		REG_SET(CM_MEM_PWR_CTRL, 0,
> -				BLNDGAM_MEM_PWR_FORCE, power_on == true ? 0 : 1);
>  	}
>  }
>