From: Anshuman Khandual <anshuman.khandual@arm.com>
To: Leo Yan <leo.yan@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>,
Mike Leach <mike.leach@linaro.org>,
James Clark <james.clark@linaro.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com
Subject: Re: [PATCH v2 6/9] coresight: Avoid enable programming clock duplicately
Date: Wed, 7 May 2025 11:25:42 +0530 [thread overview]
Message-ID: <eee538cf-d1ce-4444-97f4-450e4604f1ff@arm.com> (raw)
In-Reply-To: <20250506091841.GA177796@e132581.arm.com>
On 5/6/25 14:48, Leo Yan wrote:
> Hi Anshuman,
>
> On Fri, May 02, 2025 at 12:08:55PM +0530, Anshuman Khandual wrote:
>> On 4/23/25 20:47, Leo Yan wrote:
>>> The programming clock is enabled by AMBA bus driver before a dynamic
>>> probe. As a result, a CoreSight driver may redundantly enable the same
>>> clock.
>>
>> Are you sure AMBA bus driver always enables such clocks in all scenarios ?
>
> Yes. I confirmed that AMBA bus driver enables the programming clock
> prior to calling CoreSight device's probes (see amba_probe()).
>
> I checked other AMBA device drivers (e.g., drivers/dma/amba-pl08x.c)
> never touch APB programming clock and the clock by default is covered
> by AMAB bus driver.
Alright.
>
>> Even if that is true - why cannot coresight_get_enable_apb_pclk() ensured
>> to be called only for the platform drivers cases via code re-organization,
>> rather than changing the coresight_get_enable_apb_pclk() helper itself.
>
> The purpose is to unify the clock enabling for both static probe and
> dynamic (AMBA) probe.
>
> Let us take funnel driver as an example. With the change in this patch,
> the clock operations will be consolidated in a central place
> (e.g., funnel_probe()). Therefore, we can avoid to spread the drvdata
> allocation and clock operations into dynamic probe and static (platform)
> probe separately.
>
> funnel_probe()
> {
> drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
>
> drvdata->pclk = coresight_get_enable_apb_pclk();
> }
>
> dynamic_funnel_probe()
> {
> funnel_probe();
> }
>
> funnel_platform_probe()
> {
> funnel_probe();
> }
Makes sense.
>
> Thanks,
> Leo
>
>>> To avoid this, add a check for device type and skip enabling the
>>> programming clock for AMBA devices. The returned NULL pointer will be
>>> tolerated by the drivers.
>>>
>>> Fixes: 73d779a03a76 ("coresight: etm4x: Change etm4_platform_driver driver for MMIO devices")
>>> Signed-off-by: Leo Yan <leo.yan@arm.com>
>>> ---
>>> include/linux/coresight.h | 11 +++++++----
>>> 1 file changed, 7 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/include/linux/coresight.h b/include/linux/coresight.h
>>> index b888f6ed59b2..26eb4a61b992 100644
>>> --- a/include/linux/coresight.h
>>> +++ b/include/linux/coresight.h
>>> @@ -476,15 +476,18 @@ static inline bool is_coresight_device(void __iomem *base)
>>> * Returns:
>>> *
>>> * clk - Clock is found and enabled
>>> + * NULL - Clock is not needed as it is managed by the AMBA bus driver
>>> * ERROR - Clock is found but failed to enable
>>> */
>>> static inline struct clk *coresight_get_enable_apb_pclk(struct device *dev)
>>> {
>>> - struct clk *pclk;
>>> + struct clk *pclk = NULL;
>>>
>>> - pclk = devm_clk_get_enabled(dev, "apb_pclk");
>>> - if (IS_ERR(pclk))
>>> - pclk = devm_clk_get_enabled(dev, "apb");
>>> + if (!dev_is_amba(dev)) {
>>> + pclk = devm_clk_get_enabled(dev, "apb_pclk");
>>> + if (IS_ERR(pclk))
>>> + pclk = devm_clk_get_enabled(dev, "apb");
>>> + }
>>>
>>> return pclk;
>>> }
next prev parent reply other threads:[~2025-05-07 5:55 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-23 15:17 [PATCH v2 0/9] coresight: Fix and improve clock usage Leo Yan
2025-04-23 15:17 ` [PATCH v2 1/9] coresight: tmc: Support atclk Leo Yan
2025-04-23 15:17 ` [PATCH v2 2/9] coresight: catu: " Leo Yan
2025-04-23 15:17 ` [PATCH v2 3/9] coresight: etm4x: " Leo Yan
2025-04-23 15:17 ` [PATCH v2 4/9] coresight: Disable programming clock properly Leo Yan
2025-05-02 6:10 ` Anshuman Khandual
2025-05-06 9:54 ` Leo Yan
2025-05-07 5:59 ` Anshuman Khandual
2025-04-23 15:17 ` [PATCH v2 5/9] coresight: Disable trace bus " Leo Yan
2025-05-02 6:31 ` Anshuman Khandual
2025-04-23 15:17 ` [PATCH v2 6/9] coresight: Avoid enable programming clock duplicately Leo Yan
2025-05-02 6:38 ` Anshuman Khandual
2025-05-06 9:18 ` Leo Yan
2025-05-07 5:55 ` Anshuman Khandual [this message]
2025-04-23 15:17 ` [PATCH v2 7/9] coresight: Consolidate clock enabling Leo Yan
2025-05-05 7:28 ` Anshuman Khandual
2025-05-06 10:53 ` Leo Yan
2025-05-07 5:51 ` Anshuman Khandual
2025-04-23 15:17 ` [PATCH v2 8/9] coresight: Make clock sequence consistent Leo Yan
2025-05-02 6:56 ` Anshuman Khandual
2025-04-23 15:17 ` [PATCH v2 9/9] coresight: Refactor runtime PM Leo Yan
2025-05-02 8:45 ` Anshuman Khandual
2025-05-06 10:16 ` Leo Yan
2025-05-07 5:39 ` Anshuman Khandual
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