* [PATCH v6 1/5] media: dt-bindings: Add qcom,sc7280-camss
2024-11-27 10:04 [PATCH v6 0/5] media: qcom: camss: Add sc7280 support Vikram Sharma
@ 2024-11-27 10:04 ` Vikram Sharma
2024-11-27 12:57 ` Vladimir Zapolskiy
2024-11-27 10:04 ` [PATCH v6 2/5] media: qcom: camss: Sort camss version enums and compatible strings Vikram Sharma
` (3 subsequent siblings)
4 siblings, 1 reply; 14+ messages in thread
From: Vikram Sharma @ 2024-11-27 10:04 UTC (permalink / raw)
To: rfoss, todor.too, bryan.odonoghue, mchehab, robh, krzk+dt,
conor+dt, akapatra, hariramp, andersson, konradybcio,
hverkuil-cisco, cros-qcom-dts-watchers, catalin.marinas, will
Cc: linux-arm-kernel, quic_vikramsa, linux-media, linux-arm-msm,
devicetree, linux-kernel, kernel
Add bindings for qcom,sc7280-camss to support the camera subsystem
on the SC7280 platform.
Signed-off-by: Suresh Vankadara <quic_svankada@quicinc.com>
Signed-off-by: Trishansh Bhardwaj <quic_tbhardwa@quicinc.com>
Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
---
.../bindings/media/qcom,sc7280-camss.yaml | 415 ++++++++++++++++++
1 file changed, 415 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/qcom,sc7280-camss.yaml
diff --git a/Documentation/devicetree/bindings/media/qcom,sc7280-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sc7280-camss.yaml
new file mode 100644
index 000000000000..6fafb3631b15
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/qcom,sc7280-camss.yaml
@@ -0,0 +1,415 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/qcom,sc7280-camss.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SC7280 CAMSS ISP
+
+maintainers:
+ - Azam Sadiq Pasha Kapatrala Syed <akapatra@quicinc.com>
+ - Hariram Purushothaman <hariramp@quicinc.com>
+
+description:
+ The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms.
+
+properties:
+ compatible:
+ const: qcom,sc7280-camss
+
+ reg:
+ maxItems: 15
+
+ reg-names:
+ items:
+ - const: csid0
+ - const: csid0_lite
+ - const: csid1
+ - const: csid1_lite
+ - const: csid2
+ - const: csiphy0
+ - const: csiphy1
+ - const: csiphy2
+ - const: csiphy3
+ - const: csiphy4
+ - const: vfe0
+ - const: vfe0_lite
+ - const: vfe1
+ - const: vfe1_lite
+ - const: vfe2
+
+ clocks:
+ maxItems: 32
+
+ clock-names:
+ items:
+ - const: camnoc_axi
+ - const: csiphy0
+ - const: csiphy0_timer
+ - const: csiphy1
+ - const: csiphy1_timer
+ - const: csiphy2
+ - const: csiphy2_timer
+ - const: csiphy3
+ - const: csiphy3_timer
+ - const: csiphy4
+ - const: csiphy4_timer
+ - const: gcc_camera_ahb
+ - const: gcc_cam_hf_axi
+ - const: soc_ahb
+ - const: vfe0
+ - const: vfe0_axi
+ - const: vfe0_cphy_rx
+ - const: vfe0_csid
+ - const: vfe0_lite
+ - const: vfe0_lite_cphy_rx
+ - const: vfe0_lite_csid
+ - const: vfe1
+ - const: vfe1_axi
+ - const: vfe1_cphy_rx
+ - const: vfe1_csid
+ - const: vfe1_lite
+ - const: vfe1_lite_cphy_rx
+ - const: vfe1_lite_csid
+ - const: vfe2
+ - const: vfe2_axi
+ - const: vfe2_cphy_rx
+ - const: vfe2_csid
+
+ interrupts:
+ maxItems: 15
+
+ interrupt-names:
+ items:
+ - const: csid0
+ - const: csid0_lite
+ - const: csid1
+ - const: csid1_lite
+ - const: csid2
+ - const: csiphy0
+ - const: csiphy1
+ - const: csiphy2
+ - const: csiphy3
+ - const: csiphy4
+ - const: vfe0
+ - const: vfe0_lite
+ - const: vfe1
+ - const: vfe1_lite
+ - const: vfe2
+
+ interconnects:
+ maxItems: 2
+
+ interconnect-names:
+ items:
+ - const: ahb
+ - const: hf_0
+
+ iommus:
+ maxItems: 1
+
+ power-domains:
+ items:
+ - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller.
+ - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller.
+ - description: IFE2 GDSC - Image Front End, Global Distributed Switch Controller.
+ - description: Titan GDSC - Titan ISP Block, Global Distributed Switch Controller.
+
+ power-domain-names:
+ items:
+ - const: ife0
+ - const: ife1
+ - const: ife2
+ - const: top
+
+ vdda-phy-supply:
+ description:
+ Phandle to a regulator supply to PHY core block.
+
+ vdda-pll-supply:
+ description:
+ Phandle to 1.8V regulator supply to PHY refclk pll block.
+
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ description:
+ CSI input ports.
+
+ properties:
+ port@0:
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ unevaluatedProperties: false
+ description:
+ Input port for receiving CSI data on CSIPHY 0.
+
+ properties:
+ endpoint:
+ $ref: video-interfaces.yaml#
+ unevaluatedProperties: false
+
+ properties:
+ data-lanes:
+ minItems: 1
+ maxItems: 4
+
+ required:
+ - data-lanes
+
+ port@1:
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ unevaluatedProperties: false
+ description:
+ Input port for receiving CSI data on CSIPHY 1.
+
+ properties:
+ endpoint:
+ $ref: video-interfaces.yaml#
+ unevaluatedProperties: false
+
+ properties:
+ data-lanes:
+ minItems: 1
+ maxItems: 4
+
+ required:
+ - data-lanes
+
+ port@2:
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ unevaluatedProperties: false
+ description:
+ Input port for receiving CSI data on CSIPHY 2.
+
+ properties:
+ endpoint:
+ $ref: video-interfaces.yaml#
+ unevaluatedProperties: false
+
+ properties:
+ data-lanes:
+ minItems: 1
+ maxItems: 4
+
+ required:
+ - data-lanes
+
+ port@3:
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ unevaluatedProperties: false
+ description:
+ Input port for receiving CSI data on CSIPHY 3.
+
+ properties:
+ endpoint:
+ $ref: video-interfaces.yaml#
+ unevaluatedProperties: false
+
+ properties:
+ data-lanes:
+ minItems: 1
+ maxItems: 4
+
+ required:
+ - data-lanes
+
+ port@4:
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ unevaluatedProperties: false
+ description:
+ Input port for receiving CSI data on CSIPHY 4.
+
+ properties:
+ endpoint:
+ $ref: video-interfaces.yaml#
+ unevaluatedProperties: false
+
+ properties:
+ data-lanes:
+ minItems: 1
+ maxItems: 4
+
+ required:
+ - data-lanes
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - clocks
+ - clock-names
+ - interrupts
+ - interrupt-names
+ - interconnects
+ - interconnect-names
+ - iommus
+ - power-domains
+ - power-domain-names
+ - vdda-phy-supply
+ - vdda-pll-supply
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,camcc-sc7280.h>
+ #include <dt-bindings/clock/qcom,gcc-sc7280.h>
+ #include <dt-bindings/interconnect/qcom,sc7280.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ camss: camss@acaf000 {
+ compatible = "qcom,sc7280-camss";
+
+ reg = <0x0 0x0acb3000 0x0 0x1000>,
+ <0x0 0x0acc8000 0x0 0x1000>,
+ <0x0 0x0acba000 0x0 0x1000>,
+ <0x0 0x0accf000 0x0 0x1000>,
+ <0x0 0x0acc1000 0x0 0x1000>,
+ <0x0 0x0ace0000 0x0 0x2000>,
+ <0x0 0x0ace2000 0x0 0x2000>,
+ <0x0 0x0ace4000 0x0 0x2000>,
+ <0x0 0x0ace6000 0x0 0x2000>,
+ <0x0 0x0ace8000 0x0 0x2000>,
+ <0x0 0x0acaf000 0x0 0x4000>,
+ <0x0 0x0acc4000 0x0 0x4000>,
+ <0x0 0x0acb6000 0x0 0x4000>,
+ <0x0 0x0accb000 0x0 0x4000>,
+ <0x0 0x0acbd000 0x0 0x4000>;
+ reg-names = "csid0",
+ "csid0_lite",
+ "csid1",
+ "csid1_lite",
+ "csid2",
+ "csiphy0",
+ "csiphy1",
+ "csiphy2",
+ "csiphy3",
+ "csiphy4",
+ "vfe0",
+ "vfe0_lite",
+ "vfe1",
+ "vfe1_lite",
+ "vfe2";
+
+ clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,
+ <&camcc CAM_CC_CSIPHY0_CLK>,
+ <&camcc CAM_CC_CSI0PHYTIMER_CLK>,
+ <&camcc CAM_CC_CSIPHY1_CLK>,
+ <&camcc CAM_CC_CSI1PHYTIMER_CLK>,
+ <&camcc CAM_CC_CSIPHY2_CLK>,
+ <&camcc CAM_CC_CSI2PHYTIMER_CLK>,
+ <&camcc CAM_CC_CSIPHY3_CLK>,
+ <&camcc CAM_CC_CSI3PHYTIMER_CLK>,
+ <&camcc CAM_CC_CSIPHY4_CLK>,
+ <&camcc CAM_CC_CSI4PHYTIMER_CLK>,
+ <&gcc GCC_CAMERA_AHB_CLK>,
+ <&gcc GCC_CAMERA_HF_AXI_CLK>,
+ <&camcc CAM_CC_CPAS_AHB_CLK>,
+ <&camcc CAM_CC_IFE_0_CLK>,
+ <&camcc CAM_CC_IFE_0_AXI_CLK>,
+ <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>,
+ <&camcc CAM_CC_IFE_0_CSID_CLK>,
+ <&camcc CAM_CC_IFE_LITE_0_CLK>,
+ <&camcc CAM_CC_IFE_LITE_0_CPHY_RX_CLK>,
+ <&camcc CAM_CC_IFE_LITE_0_CSID_CLK>,
+ <&camcc CAM_CC_IFE_1_CLK>,
+ <&camcc CAM_CC_IFE_1_AXI_CLK>,
+ <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>,
+ <&camcc CAM_CC_IFE_1_CSID_CLK>,
+ <&camcc CAM_CC_IFE_LITE_1_CLK>,
+ <&camcc CAM_CC_IFE_LITE_1_CPHY_RX_CLK>,
+ <&camcc CAM_CC_IFE_LITE_1_CSID_CLK>,
+ <&camcc CAM_CC_IFE_2_CLK>,
+ <&camcc CAM_CC_IFE_2_AXI_CLK>,
+ <&camcc CAM_CC_IFE_2_CPHY_RX_CLK>,
+ <&camcc CAM_CC_IFE_2_CSID_CLK>;
+ clock-names = "camnoc_axi",
+ "csiphy0",
+ "csiphy0_timer",
+ "csiphy1",
+ "csiphy1_timer",
+ "csiphy2",
+ "csiphy2_timer",
+ "csiphy3",
+ "csiphy3_timer",
+ "csiphy4",
+ "csiphy4_timer",
+ "gcc_camera_ahb",
+ "gcc_cam_hf_axi",
+ "soc_ahb",
+ "vfe0",
+ "vfe0_axi",
+ "vfe0_cphy_rx",
+ "vfe0_csid",
+ "vfe0_lite",
+ "vfe0_lite_cphy_rx",
+ "vfe0_lite_csid",
+ "vfe1",
+ "vfe1_axi",
+ "vfe1_cphy_rx",
+ "vfe1_csid",
+ "vfe1_lite",
+ "vfe1_lite_cphy_rx",
+ "vfe1_lite_csid",
+ "vfe2",
+ "vfe2_axi",
+ "vfe2_cphy_rx",
+ "vfe2_csid";
+
+ interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 359 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 640 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 448 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 360 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 641 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "csid0",
+ "csid0_lite",
+ "csid1",
+ "csid1_lite",
+ "csid2",
+ "csiphy0",
+ "csiphy1",
+ "csiphy2",
+ "csiphy3",
+ "csiphy4",
+ "vfe0",
+ "vfe0_lite",
+ "vfe1",
+ "vfe1_lite",
+ "vfe2";
+
+ interconnects = <&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_CAMERA_CFG 0>,
+ <&mmss_noc MASTER_CAMNOC_HF 0 &mc_virt SLAVE_EBI1 0>;
+ interconnect-names = "ahb", "hf_0";
+
+ iommus = <&apps_smmu 0x800 0x4e0>;
+
+ power-domains = <&camcc CAM_CC_IFE_0_GDSC>,
+ <&camcc CAM_CC_IFE_1_GDSC>,
+ <&camcc CAM_CC_IFE_2_GDSC>,
+ <&camcc CAM_CC_TITAN_TOP_GDSC>;
+ power-domain-names = "ife0", "ife1", "ife2", "top";
+
+ vdda-phy-supply = <&vreg_l10c_0p88>;
+ vdda-pll-supply = <&vreg_l6b_1p2>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+ };
--
2.25.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v6 1/5] media: dt-bindings: Add qcom,sc7280-camss
2024-11-27 10:04 ` [PATCH v6 1/5] media: dt-bindings: Add qcom,sc7280-camss Vikram Sharma
@ 2024-11-27 12:57 ` Vladimir Zapolskiy
2024-11-27 23:31 ` Bryan O'Donoghue
0 siblings, 1 reply; 14+ messages in thread
From: Vladimir Zapolskiy @ 2024-11-27 12:57 UTC (permalink / raw)
To: Vikram Sharma, rfoss, todor.too, bryan.odonoghue, mchehab, robh,
krzk+dt, conor+dt, akapatra, hariramp, andersson, konradybcio,
hverkuil-cisco, cros-qcom-dts-watchers, catalin.marinas, will
Cc: linux-arm-kernel, linux-media, linux-arm-msm, devicetree,
linux-kernel, kernel
On 11/27/24 12:04, Vikram Sharma wrote:
> Add bindings for qcom,sc7280-camss to support the camera subsystem
> on the SC7280 platform.
>
> Signed-off-by: Suresh Vankadara <quic_svankada@quicinc.com>
> Signed-off-by: Trishansh Bhardwaj <quic_tbhardwa@quicinc.com>
> Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
> ---
> .../bindings/media/qcom,sc7280-camss.yaml | 415 ++++++++++++++++++
> 1 file changed, 415 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/media/qcom,sc7280-camss.yaml
>
> diff --git a/Documentation/devicetree/bindings/media/qcom,sc7280-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sc7280-camss.yaml
> new file mode 100644
> index 000000000000..6fafb3631b15
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/qcom,sc7280-camss.yaml
> @@ -0,0 +1,415 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/qcom,sc7280-camss.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm SC7280 CAMSS ISP
> +
> +maintainers:
> + - Azam Sadiq Pasha Kapatrala Syed <akapatra@quicinc.com>
> + - Hariram Purushothaman <hariramp@quicinc.com>
> +
> +description:
> + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms.
> +
> +properties:
> + compatible:
> + const: qcom,sc7280-camss
> +
> + reg:
> + maxItems: 15
> +
> + reg-names:
> + items:
> + - const: csid0
> + - const: csid0_lite
> + - const: csid1
> + - const: csid1_lite
> + - const: csid2
> + - const: csiphy0
> + - const: csiphy1
> + - const: csiphy2
> + - const: csiphy3
> + - const: csiphy4
> + - const: vfe0
> + - const: vfe0_lite
> + - const: vfe1
> + - const: vfe1_lite
> + - const: vfe2
> +
> + clocks:
> + maxItems: 32
> +
> + clock-names:
> + items:
> + - const: camnoc_axi
> + - const: csiphy0
> + - const: csiphy0_timer
> + - const: csiphy1
> + - const: csiphy1_timer
> + - const: csiphy2
> + - const: csiphy2_timer
> + - const: csiphy3
> + - const: csiphy3_timer
> + - const: csiphy4
> + - const: csiphy4_timer
> + - const: gcc_camera_ahb
> + - const: gcc_cam_hf_axi
> + - const: soc_ahb
> + - const: vfe0
> + - const: vfe0_axi
> + - const: vfe0_cphy_rx
> + - const: vfe0_csid
> + - const: vfe0_lite
> + - const: vfe0_lite_cphy_rx
> + - const: vfe0_lite_csid
> + - const: vfe1
> + - const: vfe1_axi
> + - const: vfe1_cphy_rx
> + - const: vfe1_csid
> + - const: vfe1_lite
> + - const: vfe1_lite_cphy_rx
> + - const: vfe1_lite_csid
> + - const: vfe2
> + - const: vfe2_axi
> + - const: vfe2_cphy_rx
> + - const: vfe2_csid
> +
> + interrupts:
> + maxItems: 15
> +
> + interrupt-names:
> + items:
> + - const: csid0
> + - const: csid0_lite
> + - const: csid1
> + - const: csid1_lite
> + - const: csid2
> + - const: csiphy0
> + - const: csiphy1
> + - const: csiphy2
> + - const: csiphy3
> + - const: csiphy4
> + - const: vfe0
> + - const: vfe0_lite
> + - const: vfe1
> + - const: vfe1_lite
> + - const: vfe2
> +
> + interconnects:
> + maxItems: 2
> +
> + interconnect-names:
> + items:
> + - const: ahb
> + - const: hf_0
> +
> + iommus:
> + maxItems: 1
> +
> + power-domains:
> + items:
> + - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller.
> + - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller.
> + - description: IFE2 GDSC - Image Front End, Global Distributed Switch Controller.
> + - description: Titan GDSC - Titan ISP Block, Global Distributed Switch Controller.
> +
> + power-domain-names:
> + items:
> + - const: ife0
> + - const: ife1
> + - const: ife2
> + - const: top
> +
> + vdda-phy-supply:
> + description:
> + Phandle to a regulator supply to PHY core block.
> +
> + vdda-pll-supply:
> + description:
> + Phandle to 1.8V regulator supply to PHY refclk pll block.
> +
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> +
> + description:
> + CSI input ports.
> +
> + properties:
> + port@0:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> + description:
> + Input port for receiving CSI data on CSIPHY 0.
> +
> + properties:
> + endpoint:
> + $ref: video-interfaces.yaml#
> + unevaluatedProperties: false
> +
> + properties:
> + data-lanes:
> + minItems: 1
> + maxItems: 4
> +
> + required:
> + - data-lanes
> +
> + port@1:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> + description:
> + Input port for receiving CSI data on CSIPHY 1.
> +
> + properties:
> + endpoint:
> + $ref: video-interfaces.yaml#
> + unevaluatedProperties: false
> +
> + properties:
> + data-lanes:
> + minItems: 1
> + maxItems: 4
> +
> + required:
> + - data-lanes
> +
> + port@2:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> + description:
> + Input port for receiving CSI data on CSIPHY 2.
> +
> + properties:
> + endpoint:
> + $ref: video-interfaces.yaml#
> + unevaluatedProperties: false
> +
> + properties:
> + data-lanes:
> + minItems: 1
> + maxItems: 4
> +
> + required:
> + - data-lanes
> +
> + port@3:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> + description:
> + Input port for receiving CSI data on CSIPHY 3.
> +
> + properties:
> + endpoint:
> + $ref: video-interfaces.yaml#
> + unevaluatedProperties: false
> +
> + properties:
> + data-lanes:
> + minItems: 1
> + maxItems: 4
> +
> + required:
> + - data-lanes
> +
> + port@4:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> + description:
> + Input port for receiving CSI data on CSIPHY 4.
> +
> + properties:
> + endpoint:
> + $ref: video-interfaces.yaml#
> + unevaluatedProperties: false
> +
> + properties:
> + data-lanes:
> + minItems: 1
> + maxItems: 4
> +
> + required:
> + - data-lanes
> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - clocks
> + - clock-names
> + - interrupts
> + - interrupt-names
> + - interconnects
> + - interconnect-names
> + - iommus
> + - power-domains
> + - power-domain-names
> + - vdda-phy-supply
> + - vdda-pll-supply
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/qcom,camcc-sc7280.h>
> + #include <dt-bindings/clock/qcom,gcc-sc7280.h>
> + #include <dt-bindings/interconnect/qcom,sc7280.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/power/qcom-rpmpd.h>
> +
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + camss: camss@acaf000 {
> + compatible = "qcom,sc7280-camss";
> +
> + reg = <0x0 0x0acb3000 0x0 0x1000>,
> + <0x0 0x0acc8000 0x0 0x1000>,
Unsurprisingly above is the error, which has been already reported for
enumerous amount of times, I wish to stop poking it eventually, please
reference to the previously given review comments and fix all of them
before sending a new version of the changes.
--
Best wishes,
Vladimir
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH v6 1/5] media: dt-bindings: Add qcom,sc7280-camss
2024-11-27 12:57 ` Vladimir Zapolskiy
@ 2024-11-27 23:31 ` Bryan O'Donoghue
2024-11-28 8:54 ` Vladimir Zapolskiy
0 siblings, 1 reply; 14+ messages in thread
From: Bryan O'Donoghue @ 2024-11-27 23:31 UTC (permalink / raw)
To: Vladimir Zapolskiy, Vikram Sharma, rfoss, todor.too, mchehab,
robh, krzk+dt, conor+dt, akapatra, hariramp, andersson,
konradybcio, hverkuil-cisco, cros-qcom-dts-watchers,
catalin.marinas, will
Cc: linux-arm-kernel, linux-media, linux-arm-msm, devicetree,
linux-kernel, kernel
On 27/11/2024 12:57, Vladimir Zapolskiy wrote:
>>
>> + camss: camss@acaf000 {
>> + compatible = "qcom,sc7280-camss";
>> +
>> + reg = <0x0 0x0acb3000 0x0 0x1000>,
>> + <0x0 0x0acc8000 0x0 0x1000>,
>
> Unsurprisingly above is the error, which has been already reported for
> enumerous amount of times, I wish to stop poking it eventually, please
> reference to the previously given review comments and fix all of them
> before sending a new version of the changes.
So just to be clear what is wrong here because it may not be clear.
1. Sort by IP name
2. The first address @ reg should be equal to the address @ camss
-> Documentation/devicetree/bindings/media/qcom,msm8953-camss.yaml
camss: camss@1b00020 {
compatible = "qcom,msm8953-camss";
reg = <0x1b00020 0x10>,
<0x1b30000 0x100>,
<0x1b30400 0x100>,
<0x1b30800 0x100>,
<0x1b34000 0x1000>,
<0x1b00030 0x4>,
<0x1b35000 0x1000>,
<0x1b00038 0x4>,
<0x1b36000 0x1000>,
<0x1b00040 0x4>,
<0x1b31000 0x500>,
<0x1b10000 0x1000>,
<0x1b14000 0x1000>;
reg-names = "csi_clk_mux",
"csid0",
"csid1",
"csid2",
"csiphy0",
"csiphy0_clk_mux",
"csiphy1",
"csiphy1_clk_mux",
"csiphy2",
"csiphy2_clk_mux",
"ispif",
"vfe0",
"vfe1";
So:
camss: camss@acaf000 {
compatible = "qcom,sc7280-camss";
reg = <0x0 0x0acaf000 0x0 0x4000>,
<0x0 0x0acb3000 0x0 0x1000>,
<0x0 0x0acc8000 0x0 0x1000>,
<0x0 0x0acba000 0x0 0x1000>,
<0x0 0x0accf000 0x0 0x1000>,
<0x0 0x0acc1000 0x0 0x1000>,
<0x0 0x0ace0000 0x0 0x2000>,
<0x0 0x0ace2000 0x0 0x2000>,
<0x0 0x0ace4000 0x0 0x2000>,
<0x0 0x0ace6000 0x0 0x2000>,
<0x0 0x0ace8000 0x0 0x2000>,
<0x0 0x0acc4000 0x0 0x4000>,
<0x0 0x0acb6000 0x0 0x4000>,
<0x0 0x0accb000 0x0 0x4000>,
<0x0 0x0acbd000 0x0 0x4000>;
reg-names = "vfe0",
"csid0",
"csid0_lite",
"csid1",
"csid1_lite",
"csid2",
"csiphy0",
"csiphy1",
"csiphy2",
"csiphy3",
"csiphy4",
"vfe0_lite",
"vfe1",
"vfe1_lite",
"vfe2";
:(
---
bod
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH v6 1/5] media: dt-bindings: Add qcom,sc7280-camss
2024-11-27 23:31 ` Bryan O'Donoghue
@ 2024-11-28 8:54 ` Vladimir Zapolskiy
[not found] ` <af043a60-adac-41da-8c7c-1ae5272ffeb1@quicinc.com>
0 siblings, 1 reply; 14+ messages in thread
From: Vladimir Zapolskiy @ 2024-11-28 8:54 UTC (permalink / raw)
To: Bryan O'Donoghue, Vikram Sharma, rfoss, todor.too, mchehab,
robh, krzk+dt, conor+dt, akapatra, hariramp, andersson,
konradybcio, hverkuil-cisco, cros-qcom-dts-watchers,
catalin.marinas, will
Cc: linux-arm-kernel, linux-media, linux-arm-msm, devicetree,
linux-kernel, kernel
Hi Bryan,
On 11/28/24 01:31, Bryan O'Donoghue wrote:
> On 27/11/2024 12:57, Vladimir Zapolskiy wrote:
>>>
>>> + camss: camss@acaf000 {
>>> + compatible = "qcom,sc7280-camss";
>>> +
>>> + reg = <0x0 0x0acb3000 0x0 0x1000>,
>>> + <0x0 0x0acc8000 0x0 0x1000>,
>>
>> Unsurprisingly above is the error, which has been already reported for
>> enumerous amount of times, I wish to stop poking it eventually, please
>> reference to the previously given review comments and fix all of them
>> before sending a new version of the changes.
>
> So just to be clear what is wrong here because it may not be clear.
>
> 1. Sort by IP name
> 2. The first address @ reg should be equal to the address @ camss
>
> -> Documentation/devicetree/bindings/media/qcom,msm8953-camss.yaml
>
> camss: camss@1b00020 {
> compatible = "qcom,msm8953-camss";
>
> reg = <0x1b00020 0x10>,
> <0x1b30000 0x100>,
> <0x1b30400 0x100>,
> <0x1b30800 0x100>,
> <0x1b34000 0x1000>,
> <0x1b00030 0x4>,
> <0x1b35000 0x1000>,
> <0x1b00038 0x4>,
> <0x1b36000 0x1000>,
> <0x1b00040 0x4>,
> <0x1b31000 0x500>,
> <0x1b10000 0x1000>,
> <0x1b14000 0x1000>;
> reg-names = "csi_clk_mux",
> "csid0",
> "csid1",
> "csid2",
> "csiphy0",
> "csiphy0_clk_mux",
> "csiphy1",
> "csiphy1_clk_mux",
> "csiphy2",
> "csiphy2_clk_mux",
> "ispif",
> "vfe0",
> "vfe1";
> So:
>
> camss: camss@acaf000 {
> compatible = "qcom,sc7280-camss";
>
> reg = <0x0 0x0acaf000 0x0 0x4000>,
> <0x0 0x0acb3000 0x0 0x1000>,
> <0x0 0x0acc8000 0x0 0x1000>,
> <0x0 0x0acba000 0x0 0x1000>,
> <0x0 0x0accf000 0x0 0x1000>,
> <0x0 0x0acc1000 0x0 0x1000>,
> <0x0 0x0ace0000 0x0 0x2000>,
> <0x0 0x0ace2000 0x0 0x2000>,
> <0x0 0x0ace4000 0x0 0x2000>,
> <0x0 0x0ace6000 0x0 0x2000>,
> <0x0 0x0ace8000 0x0 0x2000>,
> <0x0 0x0acc4000 0x0 0x4000>,
> <0x0 0x0acb6000 0x0 0x4000>,
> <0x0 0x0accb000 0x0 0x4000>,
> <0x0 0x0acbd000 0x0 0x4000>;
> reg-names = "vfe0",
> "csid0",
> "csid0_lite",
> "csid1",
> "csid1_lite",
> "csid2",
> "csiphy0",
> "csiphy1",
> "csiphy2",
> "csiphy3",
> "csiphy4",
> "vfe0_lite",
> "vfe1",
> "vfe1_lite",
> "vfe2";
So, apparently it is the third and the new proposed order of sorting. Any
following scheme is worse than the previous one in my opinion, but why not.
--
Best wishes,
Vladimir
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v6 2/5] media: qcom: camss: Sort camss version enums and compatible strings
2024-11-27 10:04 [PATCH v6 0/5] media: qcom: camss: Add sc7280 support Vikram Sharma
2024-11-27 10:04 ` [PATCH v6 1/5] media: dt-bindings: Add qcom,sc7280-camss Vikram Sharma
@ 2024-11-27 10:04 ` Vikram Sharma
2024-11-27 10:04 ` [PATCH v6 3/5] media: qcom: camss: Add support for camss driver on sc7280 Vikram Sharma
` (2 subsequent siblings)
4 siblings, 0 replies; 14+ messages in thread
From: Vikram Sharma @ 2024-11-27 10:04 UTC (permalink / raw)
To: rfoss, todor.too, bryan.odonoghue, mchehab, robh, krzk+dt,
conor+dt, akapatra, hariramp, andersson, konradybcio,
hverkuil-cisco, cros-qcom-dts-watchers, catalin.marinas, will
Cc: linux-arm-kernel, quic_vikramsa, linux-media, linux-arm-msm,
devicetree, linux-kernel, kernel
Sort CAMSS version enums and compatible strings alphanumerically.
Signed-off-by: Suresh Vankadara <quic_svankada@quicinc.com>
Signed-off-by: Trishansh Bhardwaj <quic_tbhardwa@quicinc.com>
Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
---
.../media/platform/qcom/camss/camss-csiphy-3ph-1-0.c | 10 +++++-----
drivers/media/platform/qcom/camss/camss-vfe.c | 6 +++---
drivers/media/platform/qcom/camss/camss.c | 2 +-
drivers/media/platform/qcom/camss/camss.h | 4 ++--
4 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
index df7e93a5a4f6..7d2490c9de01 100644
--- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
+++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
@@ -505,10 +505,6 @@ static void csiphy_gen2_config_lanes(struct csiphy_device *csiphy,
u32 val;
switch (csiphy->camss->res->version) {
- case CAMSS_845:
- r = &lane_regs_sdm845[0][0];
- array_size = ARRAY_SIZE(lane_regs_sdm845[0]);
- break;
case CAMSS_8250:
r = &lane_regs_sm8250[0][0];
array_size = ARRAY_SIZE(lane_regs_sm8250[0]);
@@ -517,6 +513,10 @@ static void csiphy_gen2_config_lanes(struct csiphy_device *csiphy,
r = &lane_regs_sc8280xp[0][0];
array_size = ARRAY_SIZE(lane_regs_sc8280xp[0]);
break;
+ case CAMSS_845:
+ r = &lane_regs_sdm845[0][0];
+ array_size = ARRAY_SIZE(lane_regs_sdm845[0]);
+ break;
default:
WARN(1, "unknown cspi version\n");
return;
@@ -557,9 +557,9 @@ static bool csiphy_is_gen2(u32 version)
bool ret = false;
switch (version) {
- case CAMSS_845:
case CAMSS_8250:
case CAMSS_8280XP:
+ case CAMSS_845:
ret = true;
break;
}
diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c
index 80a62ba11295..fb3234c65403 100644
--- a/drivers/media/platform/qcom/camss/camss-vfe.c
+++ b/drivers/media/platform/qcom/camss/camss-vfe.c
@@ -334,11 +334,11 @@ static u32 vfe_src_pad_code(struct vfe_line *line, u32 sink_code,
return sink_code;
}
break;
- case CAMSS_8x96:
case CAMSS_660:
- case CAMSS_845:
+ case CAMSS_8x96:
case CAMSS_8250:
case CAMSS_8280XP:
+ case CAMSS_845:
switch (sink_code) {
case MEDIA_BUS_FMT_YUYV8_1X16:
{
@@ -1693,9 +1693,9 @@ static int vfe_bpl_align(struct vfe_device *vfe)
int ret = 8;
switch (vfe->camss->res->version) {
- case CAMSS_845:
case CAMSS_8250:
case CAMSS_8280XP:
+ case CAMSS_845:
ret = 16;
break;
default:
diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c
index 6824ffbdf4a8..53aa7c963909 100644
--- a/drivers/media/platform/qcom/camss/camss.c
+++ b/drivers/media/platform/qcom/camss/camss.c
@@ -2638,10 +2638,10 @@ static const struct of_device_id camss_dt_match[] = {
{ .compatible = "qcom,msm8916-camss", .data = &msm8916_resources },
{ .compatible = "qcom,msm8953-camss", .data = &msm8953_resources },
{ .compatible = "qcom,msm8996-camss", .data = &msm8996_resources },
+ { .compatible = "qcom,sc8280xp-camss", .data = &sc8280xp_resources },
{ .compatible = "qcom,sdm660-camss", .data = &sdm660_resources },
{ .compatible = "qcom,sdm845-camss", .data = &sdm845_resources },
{ .compatible = "qcom,sm8250-camss", .data = &sm8250_resources },
- { .compatible = "qcom,sc8280xp-camss", .data = &sc8280xp_resources },
{ }
};
diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h
index 9da7f48f5dd7..ffce0a0edbc5 100644
--- a/drivers/media/platform/qcom/camss/camss.h
+++ b/drivers/media/platform/qcom/camss/camss.h
@@ -77,13 +77,13 @@ enum pm_domain {
};
enum camss_version {
+ CAMSS_660,
CAMSS_8x16,
CAMSS_8x53,
CAMSS_8x96,
- CAMSS_660,
- CAMSS_845,
CAMSS_8250,
CAMSS_8280XP,
+ CAMSS_845,
};
enum icc_count {
--
2.25.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH v6 3/5] media: qcom: camss: Add support for camss driver on sc7280
2024-11-27 10:04 [PATCH v6 0/5] media: qcom: camss: Add sc7280 support Vikram Sharma
2024-11-27 10:04 ` [PATCH v6 1/5] media: dt-bindings: Add qcom,sc7280-camss Vikram Sharma
2024-11-27 10:04 ` [PATCH v6 2/5] media: qcom: camss: Sort camss version enums and compatible strings Vikram Sharma
@ 2024-11-27 10:04 ` Vikram Sharma
2024-11-27 10:04 ` [PATCH v6 4/5] arm64: dts: qcom: sc7280: Add support for camss Vikram Sharma
2024-11-27 10:04 ` [PATCH v6 5/5] arm64: dts: qcom: qcs6490-rb3gen2-vision-mezzanine: Add vision mezzanine Vikram Sharma
4 siblings, 0 replies; 14+ messages in thread
From: Vikram Sharma @ 2024-11-27 10:04 UTC (permalink / raw)
To: rfoss, todor.too, bryan.odonoghue, mchehab, robh, krzk+dt,
conor+dt, akapatra, hariramp, andersson, konradybcio,
hverkuil-cisco, cros-qcom-dts-watchers, catalin.marinas, will
Cc: linux-arm-kernel, quic_vikramsa, linux-media, linux-arm-msm,
devicetree, linux-kernel, kernel
From: Suresh Vankadara <quic_svankada@quicinc.com>
Add support for the camss driver on the sc7280 soc.
Signed-off-by: Suresh Vankadara <quic_svankada@quicinc.com>
Signed-off-by: Trishansh Bhardwaj <quic_tbhardwa@quicinc.com>
Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
---
.../qcom/camss/camss-csiphy-3ph-1-0.c | 5 +
.../media/platform/qcom/camss/camss-csiphy.c | 5 +
.../media/platform/qcom/camss/camss-csiphy.h | 1 +
drivers/media/platform/qcom/camss/camss-vfe.c | 2 +
drivers/media/platform/qcom/camss/camss.c | 314 ++++++++++++++++++
drivers/media/platform/qcom/camss/camss.h | 1 +
6 files changed, 328 insertions(+)
diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
index 7d2490c9de01..f341f7b7fd8a 100644
--- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
+++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
@@ -505,6 +505,10 @@ static void csiphy_gen2_config_lanes(struct csiphy_device *csiphy,
u32 val;
switch (csiphy->camss->res->version) {
+ case CAMSS_7280:
+ r = &lane_regs_sm8250[0][0];
+ array_size = ARRAY_SIZE(lane_regs_sm8250[0]);
+ break;
case CAMSS_8250:
r = &lane_regs_sm8250[0][0];
array_size = ARRAY_SIZE(lane_regs_sm8250[0]);
@@ -557,6 +561,7 @@ static bool csiphy_is_gen2(u32 version)
bool ret = false;
switch (version) {
+ case CAMSS_7280:
case CAMSS_8250:
case CAMSS_8280XP:
case CAMSS_845:
diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.c b/drivers/media/platform/qcom/camss/camss-csiphy.c
index 5af2b382a843..3791c2d8a6cf 100644
--- a/drivers/media/platform/qcom/camss/camss-csiphy.c
+++ b/drivers/media/platform/qcom/camss/camss-csiphy.c
@@ -103,6 +103,11 @@ const struct csiphy_formats csiphy_formats_8x96 = {
.formats = formats_8x96
};
+const struct csiphy_formats csiphy_formats_sc7280 = {
+ .nformats = ARRAY_SIZE(formats_sdm845),
+ .formats = formats_sdm845
+};
+
const struct csiphy_formats csiphy_formats_sdm845 = {
.nformats = ARRAY_SIZE(formats_sdm845),
.formats = formats_sdm845
diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.h b/drivers/media/platform/qcom/camss/camss-csiphy.h
index eebc1ff1cfab..b6209bddfb61 100644
--- a/drivers/media/platform/qcom/camss/camss-csiphy.h
+++ b/drivers/media/platform/qcom/camss/camss-csiphy.h
@@ -111,6 +111,7 @@ void msm_csiphy_unregister_entity(struct csiphy_device *csiphy);
extern const struct csiphy_formats csiphy_formats_8x16;
extern const struct csiphy_formats csiphy_formats_8x96;
+extern const struct csiphy_formats csiphy_formats_sc7280;
extern const struct csiphy_formats csiphy_formats_sdm845;
extern const struct csiphy_hw_ops csiphy_ops_2ph_1_0;
diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c
index fb3234c65403..95f6a1ac7eaf 100644
--- a/drivers/media/platform/qcom/camss/camss-vfe.c
+++ b/drivers/media/platform/qcom/camss/camss-vfe.c
@@ -335,6 +335,7 @@ static u32 vfe_src_pad_code(struct vfe_line *line, u32 sink_code,
}
break;
case CAMSS_660:
+ case CAMSS_7280:
case CAMSS_8x96:
case CAMSS_8250:
case CAMSS_8280XP:
@@ -1693,6 +1694,7 @@ static int vfe_bpl_align(struct vfe_device *vfe)
int ret = 8;
switch (vfe->camss->res->version) {
+ case CAMSS_7280:
case CAMSS_8250:
case CAMSS_8280XP:
case CAMSS_845:
diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c
index 53aa7c963909..30ce957124f8 100644
--- a/drivers/media/platform/qcom/camss/camss.c
+++ b/drivers/media/platform/qcom/camss/camss.c
@@ -1266,6 +1266,305 @@ static const struct resources_icc icc_res_sm8250[] = {
},
};
+static const struct camss_subdev_resources csiphy_res_7280[] = {
+ /* CSIPHY0 */
+ {
+ .regulators = { "vdda-phy", "vdda-pll" },
+
+ .clock = { "csiphy0", "csiphy0_timer" },
+ .clock_rate = { { 300000000, 400000000 },
+ { 300000000 } },
+ .reg = { "csiphy0" },
+ .interrupt = { "csiphy0" },
+ .csiphy = {
+ .hw_ops = &csiphy_ops_3ph_1_0,
+ .formats = &csiphy_formats_sc7280
+ }
+ },
+ /* CSIPHY1 */
+ {
+ .regulators = { "vdda-phy", "vdda-pll" },
+
+ .clock = { "csiphy1", "csiphy1_timer" },
+ .clock_rate = { { 300000000, 400000000 },
+ { 300000000 } },
+ .reg = { "csiphy1" },
+ .interrupt = { "csiphy1" },
+ .csiphy = {
+ .hw_ops = &csiphy_ops_3ph_1_0,
+ .formats = &csiphy_formats_sc7280
+ }
+ },
+ /* CSIPHY2 */
+ {
+ .regulators = { "vdda-phy", "vdda-pll" },
+
+ .clock = { "csiphy2", "csiphy2_timer" },
+ .clock_rate = { { 300000000, 400000000 },
+ { 300000000 } },
+ .reg = { "csiphy2" },
+ .interrupt = { "csiphy2" },
+ .csiphy = {
+ .hw_ops = &csiphy_ops_3ph_1_0,
+ .formats = &csiphy_formats_sc7280
+ }
+ },
+ /* CSIPHY3 */
+ {
+ .regulators = { "vdda-phy", "vdda-pll" },
+
+ .clock = { "csiphy3", "csiphy3_timer" },
+ .clock_rate = { { 300000000, 400000000 },
+ { 300000000 } },
+ .reg = { "csiphy3" },
+ .interrupt = { "csiphy3" },
+ .csiphy = {
+ .hw_ops = &csiphy_ops_3ph_1_0,
+ .formats = &csiphy_formats_sc7280
+ }
+ },
+ /* CSIPHY4 */
+ {
+ .regulators = { "vdda-phy", "vdda-pll" },
+
+ .clock = { "csiphy4", "csiphy4_timer" },
+ .clock_rate = { { 300000000, 400000000 },
+ { 300000000 } },
+ .reg = { "csiphy4" },
+ .interrupt = { "csiphy4" },
+ .csiphy = {
+ .hw_ops = &csiphy_ops_3ph_1_0,
+ .formats = &csiphy_formats_sc7280
+ }
+ },
+};
+
+static const struct camss_subdev_resources csid_res_7280[] = {
+ /* CSID0 */
+ {
+ .regulators = {},
+
+ .clock = { "vfe0_csid", "vfe0_cphy_rx", "vfe0" },
+ .clock_rate = { { 300000000, 400000000 },
+ { 0 },
+ { 380000000, 510000000, 637000000, 760000000 }
+ },
+
+ .reg = { "csid0" },
+ .interrupt = { "csid0" },
+ .csid = {
+ .is_lite = false,
+ .hw_ops = &csid_ops_gen2,
+ .parent_dev_ops = &vfe_parent_dev_ops,
+ .formats = &csid_formats_gen2
+ }
+ },
+ /* CSID1 */
+ {
+ .regulators = {},
+
+ .clock = { "vfe1_csid", "vfe1_cphy_rx", "vfe1" },
+ .clock_rate = { { 300000000, 400000000 },
+ { 0 },
+ { 380000000, 510000000, 637000000, 760000000 }
+ },
+
+ .reg = { "csid1" },
+ .interrupt = { "csid1" },
+ .csid = {
+ .is_lite = false,
+ .hw_ops = &csid_ops_gen2,
+ .parent_dev_ops = &vfe_parent_dev_ops,
+ .formats = &csid_formats_gen2
+ }
+ },
+ /* CSID2 */
+ {
+ .regulators = {},
+
+ .clock = { "vfe2_csid", "vfe2_cphy_rx", "vfe2" },
+ .clock_rate = { { 300000000, 400000000 },
+ { 0 },
+ { 380000000, 510000000, 637000000, 760000000 }
+ },
+
+ .reg = { "csid2" },
+ .interrupt = { "csid2" },
+ .csid = {
+ .is_lite = false,
+ .hw_ops = &csid_ops_gen2,
+ .parent_dev_ops = &vfe_parent_dev_ops,
+ .formats = &csid_formats_gen2
+ }
+ },
+ /* CSID3 */
+ {
+ .regulators = {},
+
+ .clock = { "vfe0_lite_csid", "vfe0_lite_cphy_rx", "vfe0_lite" },
+ .clock_rate = { { 300000000, 400000000 },
+ { 0 },
+ { 320000000, 400000000, 480000000, 600000000 }
+ },
+
+ .reg = { "csid0_lite" },
+ .interrupt = { "csid0_lite" },
+ .csid = {
+ .is_lite = true,
+ .hw_ops = &csid_ops_gen2,
+ .parent_dev_ops = &vfe_parent_dev_ops,
+ .formats = &csid_formats_gen2
+ }
+ },
+ /* CSID4 */
+ {
+ .regulators = {},
+
+ .clock = { "vfe1_lite_csid", "vfe1_lite_cphy_rx", "vfe1_lite" },
+ .clock_rate = { { 300000000, 400000000 },
+ { 0 },
+ { 320000000, 400000000, 480000000, 600000000 }
+ },
+
+ .reg = { "csid1_lite" },
+ .interrupt = { "csid1_lite" },
+ .csid = {
+ .is_lite = true,
+ .hw_ops = &csid_ops_gen2,
+ .parent_dev_ops = &vfe_parent_dev_ops,
+ .formats = &csid_formats_gen2
+ }
+ },
+};
+
+static const struct camss_subdev_resources vfe_res_7280[] = {
+ /* VFE0 */
+ {
+ .regulators = {},
+
+ .clock = { "camnoc_axi", "soc_ahb", "vfe0",
+ "vfe0_axi", "gcc_cam_hf_axi" },
+ .clock_rate = { { 150000000, 240000000, 320000000, 400000000, 480000000 },
+ { 80000000 },
+ { 380000000, 510000000, 637000000, 760000000 },
+ { 0 },
+ { 0 } },
+
+ .reg = { "vfe0" },
+ .interrupt = { "vfe0" },
+ .vfe = {
+ .line_num = 3,
+ .is_lite = false,
+ .has_pd = true,
+ .pd_name = "ife0",
+ .hw_ops = &vfe_ops_170,
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845
+ }
+ },
+ /* VFE1 */
+ {
+ .regulators = {},
+
+ .clock = { "camnoc_axi", "soc_ahb", "vfe1",
+ "vfe1_axi", "gcc_cam_hf_axi" },
+ .clock_rate = { { 150000000, 240000000, 320000000, 400000000, 480000000 },
+ { 80000000 },
+ { 380000000, 510000000, 637000000, 760000000 },
+ { 0 },
+ { 0 } },
+
+ .reg = { "vfe1" },
+ .interrupt = { "vfe1" },
+ .vfe = {
+ .line_num = 3,
+ .is_lite = false,
+ .has_pd = true,
+ .pd_name = "ife1",
+ .hw_ops = &vfe_ops_170,
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845
+ }
+ },
+ /* VFE2 */
+ {
+ .regulators = {},
+
+ .clock = { "camnoc_axi", "soc_ahb", "vfe2",
+ "vfe2_axi", "gcc_cam_hf_axi" },
+ .clock_rate = { { 150000000, 240000000, 320000000, 400000000, 480000000 },
+ { 80000000 },
+ { 380000000, 510000000, 637000000, 760000000 },
+ { 0 },
+ { 0 } },
+
+ .reg = { "vfe2" },
+ .interrupt = { "vfe2" },
+ .vfe = {
+ .line_num = 3,
+ .is_lite = false,
+ .hw_ops = &vfe_ops_170,
+ .has_pd = true,
+ .pd_name = "ife2",
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845
+ }
+ },
+ /* VFE3 (lite) */
+ {
+ .clock = { "camnoc_axi", "soc_ahb",
+ "vfe0_lite", "gcc_cam_hf_axi" },
+ .clock_rate = { { 150000000, 240000000, 320000000, 400000000, 480000000 },
+ { 80000000 },
+ { 320000000, 400000000, 480000000, 600000000 },
+ { 0 } },
+
+ .regulators = {},
+ .reg = { "vfe0_lite" },
+ .interrupt = { "vfe0_lite" },
+ .vfe = {
+ .line_num = 4,
+ .is_lite = true,
+ .hw_ops = &vfe_ops_170,
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845
+ }
+ },
+ /* VFE4 (lite) */
+ {
+ .clock = { "camnoc_axi", "soc_ahb",
+ "vfe1_lite", "gcc_cam_hf_axi" },
+ .clock_rate = { { 150000000, 240000000, 320000000, 400000000, 480000000 },
+ { 80000000 },
+ { 320000000, 400000000, 480000000, 600000000 },
+ { 0 } },
+
+ .regulators = {},
+ .reg = { "vfe1_lite" },
+ .interrupt = { "vfe1_lite" },
+ .vfe = {
+ .line_num = 4,
+ .is_lite = true,
+ .hw_ops = &vfe_ops_170,
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845
+ }
+ },
+};
+
+static const struct resources_icc icc_res_sc7280[] = {
+ {
+ .name = "ahb",
+ .icc_bw_tbl.avg = 38400,
+ .icc_bw_tbl.peak = 76800,
+ },
+ {
+ .name = "hf_0",
+ .icc_bw_tbl.avg = 2097152,
+ .icc_bw_tbl.peak = 2097152,
+ },
+};
+
static const struct camss_subdev_resources csiphy_res_sc8280xp[] = {
/* CSIPHY0 */
{
@@ -2634,10 +2933,25 @@ static const struct camss_resources sc8280xp_resources = {
.link_entities = camss_link_entities
};
+static const struct camss_resources sc7280_resources = {
+ .version = CAMSS_7280,
+ .pd_name = "top",
+ .csiphy_res = csiphy_res_7280,
+ .csid_res = csid_res_7280,
+ .vfe_res = vfe_res_7280,
+ .icc_res = icc_res_sc7280,
+ .icc_path_num = ARRAY_SIZE(icc_res_sc7280),
+ .csiphy_num = ARRAY_SIZE(csiphy_res_7280),
+ .csid_num = ARRAY_SIZE(csid_res_7280),
+ .vfe_num = ARRAY_SIZE(vfe_res_7280),
+ .link_entities = camss_link_entities
+};
+
static const struct of_device_id camss_dt_match[] = {
{ .compatible = "qcom,msm8916-camss", .data = &msm8916_resources },
{ .compatible = "qcom,msm8953-camss", .data = &msm8953_resources },
{ .compatible = "qcom,msm8996-camss", .data = &msm8996_resources },
+ { .compatible = "qcom,sc7280-camss", .data = &sc7280_resources },
{ .compatible = "qcom,sc8280xp-camss", .data = &sc8280xp_resources },
{ .compatible = "qcom,sdm660-camss", .data = &sdm660_resources },
{ .compatible = "qcom,sdm845-camss", .data = &sdm845_resources },
diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h
index ffce0a0edbc5..9a046eea334f 100644
--- a/drivers/media/platform/qcom/camss/camss.h
+++ b/drivers/media/platform/qcom/camss/camss.h
@@ -78,6 +78,7 @@ enum pm_domain {
enum camss_version {
CAMSS_660,
+ CAMSS_7280,
CAMSS_8x16,
CAMSS_8x53,
CAMSS_8x96,
--
2.25.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH v6 4/5] arm64: dts: qcom: sc7280: Add support for camss
2024-11-27 10:04 [PATCH v6 0/5] media: qcom: camss: Add sc7280 support Vikram Sharma
` (2 preceding siblings ...)
2024-11-27 10:04 ` [PATCH v6 3/5] media: qcom: camss: Add support for camss driver on sc7280 Vikram Sharma
@ 2024-11-27 10:04 ` Vikram Sharma
2024-11-27 18:32 ` Krzysztof Kozlowski
2024-11-27 10:04 ` [PATCH v6 5/5] arm64: dts: qcom: qcs6490-rb3gen2-vision-mezzanine: Add vision mezzanine Vikram Sharma
4 siblings, 1 reply; 14+ messages in thread
From: Vikram Sharma @ 2024-11-27 10:04 UTC (permalink / raw)
To: rfoss, todor.too, bryan.odonoghue, mchehab, robh, krzk+dt,
conor+dt, akapatra, hariramp, andersson, konradybcio,
hverkuil-cisco, cros-qcom-dts-watchers, catalin.marinas, will
Cc: linux-arm-kernel, quic_vikramsa, linux-media, linux-arm-msm,
devicetree, linux-kernel, kernel
Add changes to support the camera subsystem on the SC7280.
Signed-off-by: Suresh Vankadara <quic_svankada@quicinc.com>
Signed-off-by: Trishansh Bhardwaj <quic_tbhardwa@quicinc.com>
Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 170 +++++++++++++++++++++++++++
1 file changed, 170 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 55db1c83ef55..9376755ac43e 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -4426,6 +4426,176 @@ cci1_i2c1: i2c-bus@1 {
};
};
+ camss: camss@acaf000 {
+ compatible = "qcom,sc7280-camss";
+
+ reg = <0x0 0x0acb3000 0x0 0x1000>,
+ <0x0 0x0acc8000 0x0 0x1000>,
+ <0x0 0x0acba000 0x0 0x1000>,
+ <0x0 0x0accf000 0x0 0x1000>,
+ <0x0 0x0acc1000 0x0 0x1000>,
+ <0x0 0x0ace0000 0x0 0x2000>,
+ <0x0 0x0ace2000 0x0 0x2000>,
+ <0x0 0x0ace4000 0x0 0x2000>,
+ <0x0 0x0ace6000 0x0 0x2000>,
+ <0x0 0x0ace8000 0x0 0x2000>,
+ <0x0 0x0acaf000 0x0 0x4000>,
+ <0x0 0x0acc4000 0x0 0x4000>,
+ <0x0 0x0acb6000 0x0 0x4000>,
+ <0x0 0x0accb000 0x0 0x4000>,
+ <0x0 0x0acbd000 0x0 0x4000>;
+ reg-names = "csid0",
+ "csid0_lite",
+ "csid1",
+ "csid1_lite",
+ "csid2",
+ "csiphy0",
+ "csiphy1",
+ "csiphy2",
+ "csiphy3",
+ "csiphy4",
+ "vfe0",
+ "vfe0_lite",
+ "vfe1",
+ "vfe1_lite",
+ "vfe2";
+
+ clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,
+ <&camcc CAM_CC_CSIPHY0_CLK>,
+ <&camcc CAM_CC_CSI0PHYTIMER_CLK>,
+ <&camcc CAM_CC_CSIPHY1_CLK>,
+ <&camcc CAM_CC_CSI1PHYTIMER_CLK>,
+ <&camcc CAM_CC_CSIPHY2_CLK>,
+ <&camcc CAM_CC_CSI2PHYTIMER_CLK>,
+ <&camcc CAM_CC_CSIPHY3_CLK>,
+ <&camcc CAM_CC_CSI3PHYTIMER_CLK>,
+ <&camcc CAM_CC_CSIPHY4_CLK>,
+ <&camcc CAM_CC_CSI4PHYTIMER_CLK>,
+ <&gcc GCC_CAMERA_AHB_CLK>,
+ <&gcc GCC_CAMERA_HF_AXI_CLK>,
+ <&camcc CAM_CC_CPAS_AHB_CLK>,
+ <&camcc CAM_CC_IFE_0_CLK>,
+ <&camcc CAM_CC_IFE_0_AXI_CLK>,
+ <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>,
+ <&camcc CAM_CC_IFE_0_CSID_CLK>,
+ <&camcc CAM_CC_IFE_LITE_0_CLK>,
+ <&camcc CAM_CC_IFE_LITE_0_CPHY_RX_CLK>,
+ <&camcc CAM_CC_IFE_LITE_0_CSID_CLK>,
+ <&camcc CAM_CC_IFE_1_CLK>,
+ <&camcc CAM_CC_IFE_1_AXI_CLK>,
+ <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>,
+ <&camcc CAM_CC_IFE_1_CSID_CLK>,
+ <&camcc CAM_CC_IFE_LITE_1_CLK>,
+ <&camcc CAM_CC_IFE_LITE_1_CPHY_RX_CLK>,
+ <&camcc CAM_CC_IFE_LITE_1_CSID_CLK>,
+ <&camcc CAM_CC_IFE_2_CLK>,
+ <&camcc CAM_CC_IFE_2_AXI_CLK>,
+ <&camcc CAM_CC_IFE_2_CPHY_RX_CLK>,
+ <&camcc CAM_CC_IFE_2_CSID_CLK>;
+ clock-names = "camnoc_axi",
+ "csiphy0",
+ "csiphy0_timer",
+ "csiphy1",
+ "csiphy1_timer",
+ "csiphy2",
+ "csiphy2_timer",
+ "csiphy3",
+ "csiphy3_timer",
+ "csiphy4",
+ "csiphy4_timer",
+ "gcc_camera_ahb",
+ "gcc_cam_hf_axi",
+ "soc_ahb",
+ "vfe0",
+ "vfe0_axi",
+ "vfe0_cphy_rx",
+ "vfe0_csid",
+ "vfe0_lite",
+ "vfe0_lite_cphy_rx",
+ "vfe0_lite_csid",
+ "vfe1",
+ "vfe1_axi",
+ "vfe1_cphy_rx",
+ "vfe1_csid",
+ "vfe1_lite",
+ "vfe1_lite_cphy_rx",
+ "vfe1_lite_csid",
+ "vfe2",
+ "vfe2_axi",
+ "vfe2_cphy_rx",
+ "vfe2_csid";
+
+ interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 359 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 640 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 448 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 360 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 641 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "csid0",
+ "csid0_lite",
+ "csid1",
+ "csid1_lite",
+ "csid2",
+ "csiphy0",
+ "csiphy1",
+ "csiphy2",
+ "csiphy3",
+ "csiphy4",
+ "vfe0",
+ "vfe0_lite",
+ "vfe1",
+ "vfe1_lite",
+ "vfe2";
+
+ interconnects = <&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_CAMERA_CFG 0>,
+ <&mmss_noc MASTER_CAMNOC_HF 0 &mc_virt SLAVE_EBI1 0>;
+ interconnect-names = "ahb", "hf_0";
+
+ iommus = <&apps_smmu 0x800 0x4e0>;
+
+ power-domains = <&camcc CAM_CC_IFE_0_GDSC>,
+ <&camcc CAM_CC_IFE_1_GDSC>,
+ <&camcc CAM_CC_IFE_2_GDSC>,
+ <&camcc CAM_CC_TITAN_TOP_GDSC>;
+ power-domain-names = "ife0", "ife1", "ife2", "top";
+
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+ };
+
+ port@2 {
+ reg = <2>;
+ };
+
+ port@3 {
+ reg = <3>;
+ };
+
+ port@4 {
+ reg = <4>;
+ };
+ };
+ };
+
camcc: clock-controller@ad00000 {
compatible = "qcom,sc7280-camcc";
reg = <0 0x0ad00000 0 0x10000>;
--
2.25.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v6 4/5] arm64: dts: qcom: sc7280: Add support for camss
2024-11-27 10:04 ` [PATCH v6 4/5] arm64: dts: qcom: sc7280: Add support for camss Vikram Sharma
@ 2024-11-27 18:32 ` Krzysztof Kozlowski
2024-11-27 18:38 ` Krzysztof Kozlowski
0 siblings, 1 reply; 14+ messages in thread
From: Krzysztof Kozlowski @ 2024-11-27 18:32 UTC (permalink / raw)
To: Vikram Sharma, rfoss, todor.too, bryan.odonoghue, mchehab, robh,
krzk+dt, conor+dt, akapatra, hariramp, andersson, konradybcio,
hverkuil-cisco, cros-qcom-dts-watchers, catalin.marinas, will
Cc: linux-arm-kernel, linux-media, linux-arm-msm, devicetree,
linux-kernel, kernel
On 27/11/2024 11:04, Vikram Sharma wrote:
> Add changes to support the camera subsystem on the SC7280.
>
> Signed-off-by: Suresh Vankadara <quic_svankada@quicinc.com>
> Signed-off-by: Trishansh Bhardwaj <quic_tbhardwa@quicinc.com>
> Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 170 +++++++++++++++++++++++++++
> 1 file changed, 170 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 55db1c83ef55..9376755ac43e 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -4426,6 +4426,176 @@ cci1_i2c1: i2c-bus@1 {
> };
> };
>
> + camss: camss@acaf000 {
> + compatible = "qcom,sc7280-camss";
> +
> + reg = <0x0 0x0acb3000 0x0 0x1000>,
You received feedback to really start testing your code with tools.
Nothing improved. Do you have troubles running tools or something in
feedback was not clear? If first - ask. If second - respond to our
comments, so we can clarify.
Repeating the same mistake over and over and asking us to point you the
same issue is waste of our time. Sorry, that's not acceptable to me.
NAK.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH v6 4/5] arm64: dts: qcom: sc7280: Add support for camss
2024-11-27 18:32 ` Krzysztof Kozlowski
@ 2024-11-27 18:38 ` Krzysztof Kozlowski
[not found] ` <993cea98-24bc-4f86-835f-099c5009c3b8@quicinc.com>
0 siblings, 1 reply; 14+ messages in thread
From: Krzysztof Kozlowski @ 2024-11-27 18:38 UTC (permalink / raw)
To: Vikram Sharma, rfoss, todor.too, bryan.odonoghue, mchehab, robh,
krzk+dt, conor+dt, akapatra, hariramp, andersson, konradybcio,
hverkuil-cisco, cros-qcom-dts-watchers, catalin.marinas, will
Cc: linux-arm-kernel, linux-media, linux-arm-msm, devicetree,
linux-kernel, kernel
On 27/11/2024 19:32, Krzysztof Kozlowski wrote:
> On 27/11/2024 11:04, Vikram Sharma wrote:
>> Add changes to support the camera subsystem on the SC7280.
>>
>> Signed-off-by: Suresh Vankadara <quic_svankada@quicinc.com>
>> Signed-off-by: Trishansh Bhardwaj <quic_tbhardwa@quicinc.com>
>> Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 170 +++++++++++++++++++++++++++
>> 1 file changed, 170 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index 55db1c83ef55..9376755ac43e 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -4426,6 +4426,176 @@ cci1_i2c1: i2c-bus@1 {
>> };
>> };
>>
>> + camss: camss@acaf000 {
>> + compatible = "qcom,sc7280-camss";
>> +
>> + reg = <0x0 0x0acb3000 0x0 0x1000>,
>
> You received feedback to really start testing your code with tools.
> Nothing improved. Do you have troubles running tools or something in
> feedback was not clear? If first - ask. If second - respond to our
> comments, so we can clarify.
>
> Repeating the same mistake over and over and asking us to point you the
> same issue is waste of our time. Sorry, that's not acceptable to me.
>
> NAK.
I saw now previous threads where multiple times I asked the same, e.g.
following coding style. Only at v6 you started doing it.
About the tools, let's recap - we expect absolutely 0 warnings for:
1. `make dtbs_check W=1` (see
Documentation/devicetree/bindings/writing-schema.rst or
https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
for instructions).
2. standard kernel tools for static analysis, like coccinelle, smatch
and sparse, and fix reported warnings. Also please check for warnings
when building with W=1. Most of these commands (checks or W=1 build) can
build specific targets, like some directory, to narrow the scope to only
your code. The code here looks like it needs a fix. Feel free to get in
touch if the warning is not clear.
(so 4 tools/checks above)
3. clang with W=1
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v6 5/5] arm64: dts: qcom: qcs6490-rb3gen2-vision-mezzanine: Add vision mezzanine
2024-11-27 10:04 [PATCH v6 0/5] media: qcom: camss: Add sc7280 support Vikram Sharma
` (3 preceding siblings ...)
2024-11-27 10:04 ` [PATCH v6 4/5] arm64: dts: qcom: sc7280: Add support for camss Vikram Sharma
@ 2024-11-27 10:04 ` Vikram Sharma
2024-11-27 10:26 ` Bryan O'Donoghue
4 siblings, 1 reply; 14+ messages in thread
From: Vikram Sharma @ 2024-11-27 10:04 UTC (permalink / raw)
To: rfoss, todor.too, bryan.odonoghue, mchehab, robh, krzk+dt,
conor+dt, akapatra, hariramp, andersson, konradybcio,
hverkuil-cisco, cros-qcom-dts-watchers, catalin.marinas, will
Cc: linux-arm-kernel, quic_vikramsa, linux-media, linux-arm-msm,
devicetree, linux-kernel, kernel
The Vision Mezzanine for the RB3 ships with an imx577 camera sensor.
Enable the IMX577 on the vision mezzanine.
An example media-ctl pipeline for the imx577 is:
media-ctl --reset
media-ctl -v -V '"imx577 '19-001a'":0[fmt:SRGGB10/4056x3040 field:none]'
media-ctl -V '"msm_csiphy3":0[fmt:SRGGB10/4056x3040]'
media-ctl -V '"msm_csid0":0[fmt:SRGGB10/4056x3040]'
media-ctl -V '"msm_vfe0_rdi0":0[fmt:SRGGB10/4056x3040]'
media-ctl -l '"msm_csiphy3":1->"msm_csid0":0[1]'
media-ctl -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]'
yavta -B capture-mplane -c -I -n 5 -f SRGGB10P -s 4056x3040 -F /dev/video0
Signed-off-by: Hariram Purushothaman <quic_hariramp@quicinc.com>
Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
Signed-off-by: Trishansh Bhardwaj <quic_tbhardwa@quicinc.com>
---
arch/arm64/boot/dts/qcom/Makefile | 4 +
.../qcs6490-rb3gen2-vision-mezzanine.dtso | 108 ++++++++++++++++++
2 files changed, 112 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-vision-mezzanine.dtso
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 9bb8b191aeb5..4ee57b3871dd 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -114,6 +114,10 @@ dtb-$(CONFIG_ARCH_QCOM) += qcm6490-shift-otter.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb
+
+qcs6490-rb3gen2-vision-mezzanine-dtbs := qcs6490-rb3gen2.dtb qcs6490-rb3gen2-vision-mezzanine.dtbo
+
+dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2-vision-mezzanine.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride-r3.dtb
diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-vision-mezzanine.dtso b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-vision-mezzanine.dtso
new file mode 100644
index 000000000000..6e2fccca8f11
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-vision-mezzanine.dtso
@@ -0,0 +1,108 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/*
+ * Camera Sensor overlay on top of rb3gen2 core kit.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/qcom,camcc-sc7280.h>
+
+/dts-v1/;
+/plugin/;
+
+&camcc {
+ status = "okay";
+};
+
+&camss {
+ vdda-phy-supply = <&vreg_l10c_0p88>;
+ vdda-pll-supply = <&vreg_l6b_1p2>;
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* The port index denotes CSIPHY id i.e. csiphy3 */
+ port@3 {
+ reg = <3>;
+ csiphy3_ep: endpoint {
+ clock-lanes = <7>;
+ data-lanes = <0 1 2 3>;
+ remote-endpoint = <&imx577_ep>;
+ };
+ };
+ };
+};
+
+&cci1 {
+ status = "okay";
+};
+
+&cci1_i2c1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ camera@1a {
+ compatible = "sony,imx577";
+ reg = <0x1a>;
+
+ reset-gpios = <&tlmm 78 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default", "suspend";
+ pinctrl-0 = <&cam2_default>;
+ pinctrl-1 = <&cam2_suspend>;
+
+ clocks = <&camcc CAM_CC_MCLK3_CLK>;
+ assigned-clocks = <&camcc CAM_CC_MCLK3_CLK>;
+ assigned-clock-rates = <24000000>;
+
+ dovdd-supply = <&vreg_l18b_1p8>;
+
+ port {
+ imx577_ep: endpoint {
+ clock-lanes = <7>;
+ link-frequencies = /bits/ 64 <600000000>;
+ data-lanes = <0 1 2 3>;
+ remote-endpoint = <&csiphy3_ep>;
+ };
+ };
+ };
+};
+
+&tlmm {
+ cam2_default: cam2-default-state {
+ rst-pins {
+ pins = "gpio78";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ mclk-pins {
+ pins = "gpio67";
+ function = "cam_mclk";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
+ cam2_suspend: cam2-suspend-state {
+ rst-pins {
+ pins = "gpio78";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-down;
+ output-low;
+ };
+
+ mclk-pins {
+ pins = "gpio67";
+ function = "cam_mclk";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+ };
+};
--
2.25.1
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v6 5/5] arm64: dts: qcom: qcs6490-rb3gen2-vision-mezzanine: Add vision mezzanine
2024-11-27 10:04 ` [PATCH v6 5/5] arm64: dts: qcom: qcs6490-rb3gen2-vision-mezzanine: Add vision mezzanine Vikram Sharma
@ 2024-11-27 10:26 ` Bryan O'Donoghue
0 siblings, 0 replies; 14+ messages in thread
From: Bryan O'Donoghue @ 2024-11-27 10:26 UTC (permalink / raw)
To: Vikram Sharma, rfoss, todor.too, mchehab, robh, krzk+dt, conor+dt,
akapatra, hariramp, andersson, konradybcio, hverkuil-cisco,
cros-qcom-dts-watchers, catalin.marinas, will
Cc: linux-arm-kernel, linux-media, linux-arm-msm, devicetree,
linux-kernel, kernel
On 27/11/2024 10:04, Vikram Sharma wrote:
> + dovdd-supply = <&vreg_l18b_1p8>;
You seem to be missing some supplies here.
I'm not sure if we've covered this before but, it looks to me as though
avdd and dvdd are missing.
On rb5/sm8250 it looks like this.
dovdd-supply = <&vreg_l7f_1p8>;
avdd-supply = <&vdc_5v>;
dvdd-supply = <&vdc_5v>;
Can you point to the right supplies here in your dtbo ?
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
^ permalink raw reply [flat|nested] 14+ messages in thread