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From: xiong <xiong@qca.qualcomm.com>
To: <davem@davemloft.net>, <netdev@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>
Cc: <qca-linux-team@qualcomm.com>, <nic-devel@qualcomm.com>,
	xiong <xiong@qca.qualcomm.com>
Subject: [PATCH 01/10] atl1c: add workaround for issue of bit INTX-disable for MSI interrupt
Date: Tue, 1 May 2012 09:38:49 +0800	[thread overview]
Message-ID: <1335836338-9425-2-git-send-email-xiong@qca.qualcomm.com> (raw)
In-Reply-To: <1335836338-9425-1-git-send-email-xiong@qca.qualcomm.com>

All supported devices have one issue that msi interrupt doesn't assert
if pci command register bit (PCI_COMMAND_INTX_DISABLE) is set.
Add workaround in drivers/pci/quirks.c

Signed-off-by: xiong <xiong@qca.qualcomm.com>
---
 drivers/pci/quirks.c |   12 ++++++++++++
 1 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 4bf7102..953ec3f 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -2626,6 +2626,18 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x4374,
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x4375,
 			quirk_msi_intx_disable_bug);
 
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x1062,
+			quirk_msi_intx_disable_bug);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x1063,
+			quirk_msi_intx_disable_bug);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x2060,
+			quirk_msi_intx_disable_bug);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x2062,
+			quirk_msi_intx_disable_bug);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x1073,
+			quirk_msi_intx_disable_bug);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x1083,
+			quirk_msi_intx_disable_bug);
 #endif /* CONFIG_PCI_MSI */
 
 /* Allow manual resource allocation for PCI hotplug bridges
-- 
1.7.7

  reply	other threads:[~2012-05-01  1:38 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-05-01  1:38 [PATCH 00/10] atl1c: update hardware settings - v4 xiong
2012-05-01  1:38 ` xiong [this message]
2012-05-01  1:38 ` [PATCH 02/10] atl1c: add PHY link event(up/down) patch xiong
2012-05-01  1:38 ` [PATCH 03/10] atl1c: clear WoL status when reset pcie xiong
2012-05-01  1:38 ` [PATCH 04/10] atl1c: remove code of closing register writable attribution xiong
2012-05-01  1:38 ` [PATCH 05/10] atl1c: refine mac address related code xiong
2012-05-01  1:38 ` [PATCH 06/10] atl1c: enlarge L1 response waiting timer xiong
2012-05-01  1:38 ` [PATCH 07/10] atl1c: cancel task when interface closed xiong
2012-05-01  1:38 ` [PATCH 08/10] atl1c: do MAC-reset when PHY link down xiong
2012-05-01  1:38 ` [PATCH 09/10] atl1c: Disable L0S when no cable link xiong
2012-05-01  1:38 ` [PATCH 10/10] atl1c: remove PHY polling from atl1c_change_mtu xiong
2012-05-01  1:45 ` [PATCH 00/10] atl1c: update hardware settings - v4 David Miller
  -- strict thread matches above, loose matches on Subject: below --
2012-04-28  1:58 xiong
2012-04-28  1:58 ` [PATCH 01/10] atl1c: add workaround for issue of bit INTX-disable for MSI interrupt xiong
2012-04-28  2:05   ` Luis R. Rodriguez
2012-04-28  9:53     ` Huang, Xiong
2012-04-28 17:21       ` Luis R. Rodriguez

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