* [PATCH net-next 1/5] net: phy: bcm7xxx: only show PHY revision once
2014-11-11 22:55 [PATCH net-next 0/5] net: phy: bcm7xxx: workaround updates Florian Fainelli
@ 2014-11-11 22:55 ` Florian Fainelli
2014-11-11 22:55 ` [PATCH net-next 2/5] net: phy: bcm7xxx: drop A0 revision workaround and fix B0 workaround Florian Fainelli
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Florian Fainelli @ 2014-11-11 22:55 UTC (permalink / raw)
To: netdev; +Cc: davem, Florian Fainelli
bcm7xxx_28nm_config_init() can be called as frequently as needed by the
PHY library upon suspend/resume cycles and interface bring up/down, just
print the PHY revision once and for all in order not to spam kernel
logs.
Fixes: d8ebfed3f11b ("net: phy: bcm7xxx: utilize PHY revision in config_init")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/net/phy/bcm7xxx.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/bcm7xxx.c b/drivers/net/phy/bcm7xxx.c
index 1d211d369039..25b07a4d31f8 100644
--- a/drivers/net/phy/bcm7xxx.c
+++ b/drivers/net/phy/bcm7xxx.c
@@ -200,7 +200,8 @@ static int bcm7xxx_28nm_config_init(struct phy_device *phydev)
u8 patch = PHY_BRCM_7XXX_PATCH(phydev->dev_flags);
int ret = 0;
- dev_info(&phydev->dev, "PHY revision: 0x%02x, patch: %d\n", rev, patch);
+ pr_info_once("%s: %s PHY revision: 0x%02x, patch: %d\n",
+ dev_name(&phydev->dev), phydev->drv->name, rev, patch);
switch (rev) {
case 0xa0:
--
1.9.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH net-next 2/5] net: phy: bcm7xxx: drop A0 revision workaround and fix B0 workaround
2014-11-11 22:55 [PATCH net-next 0/5] net: phy: bcm7xxx: workaround updates Florian Fainelli
2014-11-11 22:55 ` [PATCH net-next 1/5] net: phy: bcm7xxx: only show PHY revision once Florian Fainelli
@ 2014-11-11 22:55 ` Florian Fainelli
2014-11-11 22:55 ` [PATCH net-next 3/5] net: phy: bcm7xxx: introduce r_rc_cal_reset helper Florian Fainelli
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Florian Fainelli @ 2014-11-11 22:55 UTC (permalink / raw)
To: netdev; +Cc: davem, Florian Fainelli
bcm7445_config_init() was working around non-production version of the
PHY HW block, so just remove it entirely.
bcm7xxx_28nm_afe_config_init() was running for all PHY revisions greater
than B0, but this workaround sequence is really specific to the B0 PHY
revision, so rename the function accordingly and update the GPHY macro
to use the generic config_init callback.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/net/phy/bcm7xxx.c | 41 +++--------------------------------------
1 file changed, 3 insertions(+), 38 deletions(-)
diff --git a/drivers/net/phy/bcm7xxx.c b/drivers/net/phy/bcm7xxx.c
index 25b07a4d31f8..417e16c618fa 100644
--- a/drivers/net/phy/bcm7xxx.c
+++ b/drivers/net/phy/bcm7xxx.c
@@ -45,39 +45,6 @@
#define CORE_EXPB0 0xb0
-static int bcm7445_config_init(struct phy_device *phydev)
-{
- int ret;
- const struct bcm7445_regs {
- int reg;
- u16 value;
- } bcm7445_regs_cfg[] = {
- /* increases ADC latency by 24ns */
- { MII_BCM54XX_EXP_SEL, 0x0038 },
- { MII_BCM54XX_EXP_DATA, 0xAB95 },
- /* increases internal 1V LDO voltage by 5% */
- { MII_BCM54XX_EXP_SEL, 0x2038 },
- { MII_BCM54XX_EXP_DATA, 0xBB22 },
- /* reduce RX low pass filter corner frequency */
- { MII_BCM54XX_EXP_SEL, 0x6038 },
- { MII_BCM54XX_EXP_DATA, 0xFFC5 },
- /* reduce RX high pass filter corner frequency */
- { MII_BCM54XX_EXP_SEL, 0x003a },
- { MII_BCM54XX_EXP_DATA, 0x2002 },
- };
- unsigned int i;
-
- for (i = 0; i < ARRAY_SIZE(bcm7445_regs_cfg); i++) {
- ret = phy_write(phydev,
- bcm7445_regs_cfg[i].reg,
- bcm7445_regs_cfg[i].value);
- if (ret)
- return ret;
- }
-
- return 0;
-}
-
static void phy_write_exp(struct phy_device *phydev,
u16 reg, u16 value)
{
@@ -102,7 +69,7 @@ static void phy_write_misc(struct phy_device *phydev,
phy_write(phydev, MII_BCM54XX_EXP_DATA, value);
}
-static int bcm7xxx_28nm_afe_config_init(struct phy_device *phydev)
+static int bcm7xxx_28nm_b0_afe_config_init(struct phy_device *phydev)
{
/* Increase VCO range to prevent unlocking problem of PLL at low
* temp
@@ -204,12 +171,10 @@ static int bcm7xxx_28nm_config_init(struct phy_device *phydev)
dev_name(&phydev->dev), phydev->drv->name, rev, patch);
switch (rev) {
- case 0xa0:
case 0xb0:
- ret = bcm7445_config_init(phydev);
+ ret = bcm7xxx_28nm_b0_afe_config_init(phydev);
break;
default:
- ret = bcm7xxx_28nm_afe_config_init(phydev);
break;
}
@@ -337,7 +302,7 @@ static int bcm7xxx_dummy_config_init(struct phy_device *phydev)
.features = PHY_GBIT_FEATURES | \
SUPPORTED_Pause | SUPPORTED_Asym_Pause, \
.flags = PHY_IS_INTERNAL, \
- .config_init = bcm7xxx_28nm_afe_config_init, \
+ .config_init = bcm7xxx_28nm_config_init, \
.config_aneg = genphy_config_aneg, \
.read_status = genphy_read_status, \
.resume = bcm7xxx_28nm_resume, \
--
1.9.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH net-next 3/5] net: phy: bcm7xxx: introduce r_rc_cal_reset helper
2014-11-11 22:55 [PATCH net-next 0/5] net: phy: bcm7xxx: workaround updates Florian Fainelli
2014-11-11 22:55 ` [PATCH net-next 1/5] net: phy: bcm7xxx: only show PHY revision once Florian Fainelli
2014-11-11 22:55 ` [PATCH net-next 2/5] net: phy: bcm7xxx: drop A0 revision workaround and fix B0 workaround Florian Fainelli
@ 2014-11-11 22:55 ` Florian Fainelli
2014-11-11 22:55 ` [PATCH net-next 4/5] net: phy: bcm7xxx: add PHY revision D0 workaround sequence Florian Fainelli
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Florian Fainelli @ 2014-11-11 22:55 UTC (permalink / raw)
To: netdev; +Cc: davem, Florian Fainelli
This function performs a R/RC calibration reset and will start being
used by more than one function in the next patches, create a helper
function to factor code.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/net/phy/bcm7xxx.c | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/net/phy/bcm7xxx.c b/drivers/net/phy/bcm7xxx.c
index 417e16c618fa..82824dde7f5f 100644
--- a/drivers/net/phy/bcm7xxx.c
+++ b/drivers/net/phy/bcm7xxx.c
@@ -69,6 +69,15 @@ static void phy_write_misc(struct phy_device *phydev,
phy_write(phydev, MII_BCM54XX_EXP_DATA, value);
}
+static void r_rc_cal_reset(struct phy_device *phydev)
+{
+ /* Reset R_CAL/RC_CAL Engine */
+ phy_write_exp(phydev, 0x00b0, 0x0010);
+
+ /* Disable Reset R_AL/RC_CAL Engine */
+ phy_write_exp(phydev, 0x00b0, 0x0000);
+}
+
static int bcm7xxx_28nm_b0_afe_config_init(struct phy_device *phydev)
{
/* Increase VCO range to prevent unlocking problem of PLL at low
@@ -90,11 +99,7 @@ static int bcm7xxx_28nm_b0_afe_config_init(struct phy_device *phydev)
/* Switch to CORE_BASE1E */
phy_write(phydev, MII_BCM7XXX_CORE_BASE1E, 0xd);
- /* Reset R_CAL/RC_CAL Engine */
- phy_write_exp(phydev, CORE_EXPB0, 0x0010);
-
- /* Disable Reset R_CAL/RC_CAL Engine */
- phy_write_exp(phydev, CORE_EXPB0, 0x0000);
+ r_rc_cal_reset(phydev);
/* write AFE_RXCONFIG_0 */
phy_write_misc(phydev, AFE_RXCONFIG_0, 0xeb19);
--
1.9.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH net-next 4/5] net: phy: bcm7xxx: add PHY revision D0 workaround sequence
2014-11-11 22:55 [PATCH net-next 0/5] net: phy: bcm7xxx: workaround updates Florian Fainelli
` (2 preceding siblings ...)
2014-11-11 22:55 ` [PATCH net-next 3/5] net: phy: bcm7xxx: introduce r_rc_cal_reset helper Florian Fainelli
@ 2014-11-11 22:55 ` Florian Fainelli
2014-11-11 22:55 ` [PATCH net-next 5/5] net: phy: bcm7xxx: add workaround for PHY revision E0 and F0 Florian Fainelli
2014-11-12 19:08 ` [PATCH net-next 0/5] net: phy: bcm7xxx: workaround updates David Miller
5 siblings, 0 replies; 7+ messages in thread
From: Florian Fainelli @ 2014-11-11 22:55 UTC (permalink / raw)
To: netdev; +Cc: davem, Florian Fainelli
PHY revision D0 requires a specific workaround sequence which needs to
be applied to get the HW to behave properly in all corner cases
conditions. Do this based on the revision we just read out of the HW
using a specific function.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/net/phy/bcm7xxx.c | 46 ++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/drivers/net/phy/bcm7xxx.c b/drivers/net/phy/bcm7xxx.c
index 82824dde7f5f..0ce527744513 100644
--- a/drivers/net/phy/bcm7xxx.c
+++ b/drivers/net/phy/bcm7xxx.c
@@ -39,8 +39,11 @@
#define AFE_RXCONFIG_0 MISC_ADDR(0x38, 0)
#define AFE_RXCONFIG_1 MISC_ADDR(0x38, 1)
+#define AFE_RXCONFIG_2 MISC_ADDR(0x38, 2)
#define AFE_RX_LP_COUNTER MISC_ADDR(0x38, 3)
#define AFE_TX_CONFIG MISC_ADDR(0x39, 0)
+#define AFE_VDCA_ICTRL_0 MISC_ADDR(0x39, 1)
+#define AFE_VDAC_OTHERS_0 MISC_ADDR(0x39, 3)
#define AFE_HPF_TRIM_OTHERS MISC_ADDR(0x3a, 0)
#define CORE_EXPB0 0xb0
@@ -119,6 +122,46 @@ static int bcm7xxx_28nm_b0_afe_config_init(struct phy_device *phydev)
return 0;
}
+static int bcm7xxx_28nm_d0_afe_config_init(struct phy_device *phydev)
+{
+ /* AFE_RXCONFIG_0 */
+ phy_write_misc(phydev, AFE_RXCONFIG_0, 0xeb15);
+
+ /* AFE_RXCONFIG_1 */
+ phy_write_misc(phydev, AFE_RXCONFIG_1, 0x9b2f);
+
+ /* AFE_RXCONFIG_2, set rCal offset for HT=0 code and LT=-2 code */
+ phy_write_misc(phydev, AFE_RXCONFIG_2, 0x2003);
+
+ /* AFE_RX_LP_COUNTER, set RX bandwidth to maximum */
+ phy_write_misc(phydev, AFE_RX_LP_COUNTER, 0x7fc0);
+
+ /* AFE_TX_CONFIG, set 1000BT Cfeed=110 for all ports */
+ phy_write_misc(phydev, AFE_TX_CONFIG, 0x0061);
+
+ /* AFE_VDCA_ICTRL_0, set Iq=1101 instead of 0111 for AB symmetry */
+ phy_write_misc(phydev, AFE_VDCA_ICTRL_0, 0xa7da);
+
+ /* AFE_VDAC_OTHERS_0, set 1000BT Cidac=010 for all ports */
+ phy_write_misc(phydev, AFE_VDAC_OTHERS_0, 0xa020);
+
+ /* AFE_HPF_TRIM_OTHERS, set 100Tx/10BT to -4.5% swing and set rCal
+ * offset for HT=0 code
+ */
+ phy_write_misc(phydev, AFE_HPF_TRIM_OTHERS, 0x00e3);
+
+ /* CORE_BASE1E, force trim to overwrite and set I_ext trim to 0000 */
+ phy_write(phydev, MII_BCM7XXX_CORE_BASE1E, 0x0010);
+
+ /* DSP_TAP10, adjust bias current trim (+0% swing, +0 tick) */
+ phy_write_misc(phydev, DSP_TAP10, 0x011b);
+
+ /* Reset R_CAL/RC_CAL engine */
+ r_rc_cal_reset(phydev);
+
+ return 0;
+}
+
static int bcm7xxx_apd_enable(struct phy_device *phydev)
{
int val;
@@ -179,6 +222,9 @@ static int bcm7xxx_28nm_config_init(struct phy_device *phydev)
case 0xb0:
ret = bcm7xxx_28nm_b0_afe_config_init(phydev);
break;
+ case 0xd0:
+ ret = bcm7xxx_28nm_d0_afe_config_init(phydev);
+ break;
default:
break;
}
--
1.9.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH net-next 5/5] net: phy: bcm7xxx: add workaround for PHY revision E0 and F0
2014-11-11 22:55 [PATCH net-next 0/5] net: phy: bcm7xxx: workaround updates Florian Fainelli
` (3 preceding siblings ...)
2014-11-11 22:55 ` [PATCH net-next 4/5] net: phy: bcm7xxx: add PHY revision D0 workaround sequence Florian Fainelli
@ 2014-11-11 22:55 ` Florian Fainelli
2014-11-12 19:08 ` [PATCH net-next 0/5] net: phy: bcm7xxx: workaround updates David Miller
5 siblings, 0 replies; 7+ messages in thread
From: Florian Fainelli @ 2014-11-11 22:55 UTC (permalink / raw)
To: netdev; +Cc: davem, Florian Fainelli
PHY revisions E0 and F0 share the same shorter workaround initialization
sequence. Dedicate a special function for these two PHY revisions to
perform the needed workaround sequence.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/net/phy/bcm7xxx.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/drivers/net/phy/bcm7xxx.c b/drivers/net/phy/bcm7xxx.c
index 0ce527744513..1b5f3c1a5093 100644
--- a/drivers/net/phy/bcm7xxx.c
+++ b/drivers/net/phy/bcm7xxx.c
@@ -162,6 +162,31 @@ static int bcm7xxx_28nm_d0_afe_config_init(struct phy_device *phydev)
return 0;
}
+static int bcm7xxx_28nm_e0_plus_afe_config_init(struct phy_device *phydev)
+{
+ /* AFE_RXCONFIG_1, provide more margin for INL/DNL measurement */
+ phy_write_misc(phydev, AFE_RXCONFIG_1, 0x9b2f);
+
+ /* AFE_VDCA_ICTRL_0, set Iq=1101 instead of 0111 for AB symmetry */
+ phy_write_misc(phydev, AFE_VDCA_ICTRL_0, 0xa7da);
+
+ /* AFE_HPF_TRIM_OTHERS, set 100Tx/10BT to -4.5% swing and set rCal
+ * offset for HT=0 code
+ */
+ phy_write_misc(phydev, AFE_HPF_TRIM_OTHERS, 0x00e3);
+
+ /* CORE_BASE1E, force trim to overwrite and set I_ext trim to 0000 */
+ phy_write(phydev, MII_BCM7XXX_CORE_BASE1E, 0x0010);
+
+ /* DSP_TAP10, adjust bias current trim (+0% swing, +0 tick) */
+ phy_write_misc(phydev, DSP_TAP10, 0x011b);
+
+ /* Reset R_CAL/RC_CAL engine */
+ r_rc_cal_reset(phydev);
+
+ return 0;
+}
+
static int bcm7xxx_apd_enable(struct phy_device *phydev)
{
int val;
@@ -225,6 +250,10 @@ static int bcm7xxx_28nm_config_init(struct phy_device *phydev)
case 0xd0:
ret = bcm7xxx_28nm_d0_afe_config_init(phydev);
break;
+ case 0xe0:
+ case 0xf0:
+ ret = bcm7xxx_28nm_e0_plus_afe_config_init(phydev);
+ break;
default:
break;
}
--
1.9.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH net-next 0/5] net: phy: bcm7xxx: workaround updates
2014-11-11 22:55 [PATCH net-next 0/5] net: phy: bcm7xxx: workaround updates Florian Fainelli
` (4 preceding siblings ...)
2014-11-11 22:55 ` [PATCH net-next 5/5] net: phy: bcm7xxx: add workaround for PHY revision E0 and F0 Florian Fainelli
@ 2014-11-12 19:08 ` David Miller
5 siblings, 0 replies; 7+ messages in thread
From: David Miller @ 2014-11-12 19:08 UTC (permalink / raw)
To: f.fainelli; +Cc: netdev
From: Florian Fainelli <f.fainelli@gmail.com>
Date: Tue, 11 Nov 2014 14:55:09 -0800
> This patch series contains some updates to the Broadcom BCM7xxx internal
> PHY driver, including:
>
> - removing an annonying print that would appear during interface up/down and
> suspend/resume cycles
> - drop a workaround sequence for a non-production PHY revision
> - add new workarounds for the latest and greatest PHY devices found out ther
Applied, thanks Florian.
^ permalink raw reply [flat|nested] 7+ messages in thread