Netdev List
 help / color / mirror / Atom feed
* mv88e6xxx: 88E6320 external PHY on MDC_PHY/MDIO_PHY - (GPIO 7/8) — is mdio-gpio the right approach?
@ 2026-05-12 11:32 Tiju Jacob
  2026-05-12 12:39 ` Andrew Lunn
  0 siblings, 1 reply; 2+ messages in thread
From: Tiju Jacob @ 2026-05-12 11:32 UTC (permalink / raw)
  To: netdev; +Cc: Andrew Lunn, Vivien Didelot, Florian Fainelli, Vladimir Oltean

Hi All,

We have an 88E6320 (marvell,mv88e6085) with an 88E1512 PHY on Port 5.

The PHY's MDIO is wired to the switch's MDC_PHY/MDIO_PHY pins (52/53
=GPIO 7/8), which are separate physical pins from MDC_CPU/MDIO_CPU
(54/55) used by the CPU. GPIO 7/8 read HIGH as inputs confirming the
PHY is alive.

We tested exhaustively at runtime: marvell,mv88e6xxx-mdio-external,
NORMALSMI set and cleared, PHY in internal mdio bus, and all 8 PCTL
modes on GPIO 7/8. In every case the PHY at address 5 was unreachable.

The mv88e6390_g2_scratch_gpio_set_smi() NO_CPU inversion appears
designed for chips where MDC_CPU and MDC_PHY are muxed on the same
pins.
On the 88E6320 they are physically separate, making the inversion
wrong — but even manually correcting NORMALSMI did not help.

Is virtual,mdio-gpio (CONFIG_MDIO_GPIO) over GPIO 7/8 the correct
upstream solution here? Or is there a mechanism to activate the
hardware MDC_PHY/MDIO_PHY master on the 88E6320 that we have missed?

Thanks,
Tiju

^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: mv88e6xxx: 88E6320 external PHY on MDC_PHY/MDIO_PHY - (GPIO 7/8) — is mdio-gpio the right approach?
  2026-05-12 11:32 mv88e6xxx: 88E6320 external PHY on MDC_PHY/MDIO_PHY - (GPIO 7/8) — is mdio-gpio the right approach? Tiju Jacob
@ 2026-05-12 12:39 ` Andrew Lunn
  0 siblings, 0 replies; 2+ messages in thread
From: Andrew Lunn @ 2026-05-12 12:39 UTC (permalink / raw)
  To: Tiju Jacob; +Cc: netdev, Vivien Didelot, Florian Fainelli, Vladimir Oltean

On Tue, May 12, 2026 at 07:32:19AM -0400, Tiju Jacob wrote:
> Hi All,
> 
> We have an 88E6320 (marvell,mv88e6085) with an 88E1512 PHY on Port 5.
> 
> The PHY's MDIO is wired to the switch's MDC_PHY/MDIO_PHY pins (52/53
> =GPIO 7/8), which are separate physical pins from MDC_CPU/MDIO_CPU
> (54/55) used by the CPU. GPIO 7/8 read HIGH as inputs confirming the
> PHY is alive.
> 
> We tested exhaustively at runtime: marvell,mv88e6xxx-mdio-external,

marvell,mv88e6xxx-mdio-external is for the 6390 family and newer. It
is not relevant for the 6320.

The 6320 has one MDIO bus, covering both the internal and external
devices. What address do you have the 88E1512 PHY strapped to? You
need to avoid the internal devices. Ideally you want it on address 5,
but it can be other addresses.

	Andrew

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2026-05-12 12:39 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-05-12 11:32 mv88e6xxx: 88E6320 external PHY on MDC_PHY/MDIO_PHY - (GPIO 7/8) — is mdio-gpio the right approach? Tiju Jacob
2026-05-12 12:39 ` Andrew Lunn

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox