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From: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
To: Andrew Lunn <andrew+netdev@lunn.ch>,
	 "David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	 Jakub Kicinski <kuba@kernel.org>,
	Paolo Abeni <pabeni@redhat.com>,  Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	 Richard Cochran <richardcochran@gmail.com>,
	 Matthias Brugger <matthias.bgg@gmail.com>,
	 AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	 Biao Huang <biao.huang@mediatek.com>,
	 Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	 Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: maxime.chevallier@bootlin.com, rmk+kernel@armlinux.org.uk,
	 kernel@collabora.com, netdev@vger.kernel.org,
	devicetree@vger.kernel.org,  linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	 linux-mediatek@lists.infradead.org,
	 linux-stm32@st-md-mailman.stormreply.com,
	 Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
Subject: [PATCH net-next 6/6] net: stmmac: mediatek: add support for MT8189 SoC
Date: Tue, 07 Jul 2026 10:21:24 +0200	[thread overview]
Message-ID: <20260707-dwmac-mediatek-mt8189-v1-6-17f345eaaca3@collabora.com> (raw)
In-Reply-To: <20260707-dwmac-mediatek-mt8189-v1-0-17f345eaaca3@collabora.com>

Like MT8195 SoC, MT8189 SoC uses the Ethernet control registers from
the peripheral configuration (pericfg) but at a different
offset. It also needs additional features.

Thus, add compatible, clock definitions and specific platform data to
support the MT8189 SoC.

Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
---
 .../net/ethernet/stmicro/stmmac/dwmac-mediatek.c    | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c
index 6b0a42b5839f..e7e336b1f114 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c
@@ -37,6 +37,8 @@
 #define ETH_FINE_DLY_RXC	BIT(0)
 
 /* Peri Configuration register for mt8189 */
+#define MT8189_PERI_ETH_CTRL_BASE		0x270
+
 #define MT8189_CTRL0_TXC_OUT_OP			BIT(20)
 #define MT8189_CTRL0_DLY_GTXC_STAGE_FINE	GENMASK(11, 6)
 
@@ -116,6 +118,10 @@ static const char * const mt8195_dwmac_clk_l[] = {
 	"axi", "apb", "mac_cg", "mac_main", "ptp_ref"
 };
 
+static const char * const mt8189_dwmac_clk_l[] = {
+	"mac_main", "ptp_ref"
+};
+
 static int set_phy_interface_v1(struct mediatek_dwmac_plat_data *plat,
 				u8 phy_intf_sel)
 {
@@ -444,6 +450,19 @@ static int set_delay_v2(struct mediatek_dwmac_plat_data *plat)
 	return 0;
 }
 
+static const struct mediatek_dwmac_variant mt8189_gmac_variant = {
+	.dwmac_set_phy_interface = set_phy_interface_v2,
+	.dwmac_set_delay = set_delay_v2,
+	.clk_list = mt8189_dwmac_clk_l,
+	.num_clks = ARRAY_SIZE(mt8189_dwmac_clk_l),
+	.dma_bit_mask = 35,
+	.rx_delay_max = 9280,
+	.tx_delay_max = 9280,
+	.peri_eth_ctrl_offset = MT8189_PERI_ETH_CTRL_BASE,
+	.use_out_op = true,
+	.use_stage_fine = true,
+};
+
 static const struct mediatek_dwmac_variant mt8195_gmac_variant = {
 	.dwmac_set_phy_interface = set_phy_interface_v2,
 	.dwmac_set_delay = set_delay_v2,
@@ -694,6 +713,8 @@ static void mediatek_dwmac_remove(struct platform_device *pdev)
 static const struct of_device_id mediatek_dwmac_match[] = {
 	{ .compatible = "mediatek,mt2712-gmac",
 	  .data = &mt2712_gmac_variant },
+	{ .compatible = "mediatek,mt8189-gmac",
+	  .data = &mt8189_gmac_variant },
 	{ .compatible = "mediatek,mt8195-gmac",
 	  .data = &mt8195_gmac_variant },
 	{ }

-- 
2.55.0


      parent reply	other threads:[~2026-07-07  8:21 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-07  8:21 [PATCH net-next 0/6] net/stmmac: Add Mediatek MT8189 support Louis-Alexis Eyraud
2026-07-07  8:21 ` [PATCH net-next 1/6] dt-bindings: net: mediatek-dwmac: add support for MT8189 SoC Louis-Alexis Eyraud
2026-07-07 12:42   ` Andrew Lunn
2026-07-08 11:36     ` Louis-Alexis Eyraud
2026-07-07  8:21 ` [PATCH net-next 2/6] net: stmmac: mediatek: add PERI_ETH_CTRLx register offset in platform data Louis-Alexis Eyraud
2026-07-07  8:55   ` Maxime Chevallier
2026-07-07 12:45   ` Andrew Lunn
2026-07-08 11:44     ` Louis-Alexis Eyraud
2026-07-07  8:21 ` [PATCH net-next 3/6] net: stmmac: mediatek: rename MT2712 and MT8195 variant methods Louis-Alexis Eyraud
2026-07-07  9:05   ` Maxime Chevallier
2026-07-08 12:04     ` Louis-Alexis Eyraud
2026-07-07  8:21 ` [PATCH net-next 4/6] net: stmmac: mediatek: add support for TX clock output enable feature Louis-Alexis Eyraud
2026-07-07  8:21 ` [PATCH net-next 5/6] net: stmmac: mediatek: add support for TX deallocation adjustment feature Louis-Alexis Eyraud
2026-07-07  9:11   ` Maxime Chevallier
2026-07-08 12:28     ` Louis-Alexis Eyraud
2026-07-07  8:21 ` Louis-Alexis Eyraud [this message]

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