Re: [PATCH net-next v2 2/4] dt-bindings: net: dsa: Add SoC-e SWIP switch

[Vasilij Strassheim <v.strassheim@linutronix.de>]

On Tue, 2026-09-08 at 21:10 +0200, Andrew Lunn wrote:
> On Tue, Sep 08, 2026 at 08:15:35PM +0200, Vasilij Strassheim wrote:
> > On Mon, 2026-09-07 at 21:04 +0200, Andrew Lunn wrote:
> > > > +    patternProperties:
> > > > +      '^mdio@[0-9a-f]+$':
> > > > +        $ref: /schemas/net/mdio.yaml#
> > > > +        unevaluatedProperties: false
> > > > +
> > > > +        properties:
> > > > +          reg:
> > > > +            maximum: 30
> > > > +            description:
> > > > +              MDIO controller output index, which must be lower than the
> > > > +              number of implemented switch ports.
> > > 
> > > Is there a relationship between an MDIO bus and a port?
> > 
> > Yes, there is a one-to-one relationship for this IP. The MDIO bus
> > selector corresponds to the switch port index.
> > 
> > > 
> > > I'm just wondering if the MDIO bus should be a property of the
> > > port. There are switch which have an MDIO bus per port.
> > > 
> > 
> > I see this model in the new NETC switch binding. I will move the
> > optional mdio node below the corresponding ethernet-port@N and derive
> > the selector from the port's reg.
> 
> Since this is an FPGA, i assume there are no internal PHYs. Mixed mode
> is not something FPGAs do. There are sometime "interesting"
> relationships between port number and address on the MDIO bus. But
> without internal PHYs you don't need to worry about this.
> 

Correct, the FPGA IP has no internal PHYs. Each port is associated with
a dedicated external MDIO bus.

> > > > +patternProperties:
> > > > +  '^(ethernet-)?ports$':
> > > > +    patternProperties:
> > > > +      '^(ethernet-)?port@[0-9a-f]+$':
> > > > +        $ref: dsa-port.yaml#
> > > > +        unevaluatedProperties: false
> > > > +
> > > > +        properties:
> > > > +          reg:
> > > > +            maximum: 30
> > > > +            description:
> > > > +              Switch port index. Supported switch configurations have
> > > > +              up to 31 ports, numbered from 0 through 30.
> > > 
> > > 30 seems odd. Is 31 something special? 
> > > 
> > 
> > The hardware stores the port count directly in a 5-bit field, so 31 is
> > the maximum representable count. Therefore, valid zero-based port
> > indices range from 0 to 30. The switch documentation is unclear about
> > the encoding, but I tested a three-port configuration and the field
> > contained 3.
> 
> So in theory, a 0 port switch is possible!

In theory, yes, but I prefer to treat it as invalid until it can be
tested.

> 
>    Andrew

Thanks,
Vasilij