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From: Andrew Lunn <andrew@lunn.ch>
To: Vasilij Strassheim <v.strassheim@linutronix.de>
Cc: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Vladimir Oltean <olteanv@gmail.com>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Simon Horman <horms@kernel.org>,
	Russell King <linux@armlinux.org.uk>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	netdev@vger.kernel.org,
	Martin Kaistra <martin.kaistra@linutronix.de>,
	Benedikt Spranger <b.spranger@linutronix.de>
Subject: Re: [PATCH net-next v2 4/4] net: dsa: soce: Add basic support for SoC-e switch IP cores
Date: Tue, 8 Sep 2026 02:37:27 +0200	[thread overview]
Message-ID: <371fe855-e21f-4d53-a13f-4486494c8ae1@lunn.ch> (raw)
In-Reply-To: <20260903-devel-vstrassheim-soce-dsa-ml-v2-4-fb0587cb466b@linutronix.de>

> +#define SOCE_CORE_VERSION_SHIFT			24
> +#define SOCE_CORE_SUBVERSION_SHIFT		16
> +#define SOCE_LICENSED_NUM_PORTS_MASK		GENMASK(31, 27)
> +#define SOCE_IMPLEMENTED_NUM_PORTS_MASK		GENMASK(31, 27)
> +#define SOCE_IMPLEMENTED_DSA			BIT(23)
> +#define SOCE_DSA_REGS_BASE			0x1200
> +#define SOCE_TAG_ALL_FRAMES_CTRL_OFFSET		(SOCE_DSA_REGS_BASE + 0x001c)
> +#define SOCE_TAG_ALL_FRAMES_ENABLE		BIT(0)
> +#define SOCE_CUSTOM_RULES_TAGGING_OFFSET	(SOCE_DSA_REGS_BASE + 0x0020)
> +#define SOCE_CUSTOM_RULES_TAGGING_ENABLE	BIT(0)
> +#define SOCE_MIN_CORE_VERSION			0x24
> +#define SOCE_MIN_CORE_SUBVERSION		0x01

Could you fully describe the feature registers, so we have an idea
what is actually there.

> +struct soce_probe_desc {
> +	u32 core_version_offset;
> +	u32 licensed_features_offset;
> +	u32 implemented_features0_offset;
> +	u32 mdio_master_offset;
> +};
> +
> +static const struct soce_probe_desc soce_probe_desc_swip_00_04_0c_10 = {
> +	.core_version_offset		= 0x0000,
> +	.licensed_features_offset	= 0x0004,
> +	.implemented_features0_offset	= 0x000c,
> +	.mdio_master_offset		= 0x0200,
> +};

How fixed/variable are these? I'm just thinking there may be too much
abstraction here. To some extent, we leave abstractions out until they
are needed. If you know there are other devices out there which have
these at other addresses, then O.K. But if not, i would keep it KISS.

> +static int soce_sw_detect_features(struct soce_dsa_local *local,
> +				   const struct soce_probe_desc *probe_desc,
> +				   u32 *numports)
> +{
> +	u32 implemented_numports;
> +	u32 licensed_numports;
> +	u32 regval;
> +
> +	regval = readl(local->base_addr + probe_desc->licensed_features_offset);
> +	licensed_numports = FIELD_GET(SOCE_LICENSED_NUM_PORTS_MASK, regval);
> +	if (!licensed_numports || licensed_numports > SOCE_MAX_NUM_PORTS)
> +		return -EINVAL;
> +
> +	regval = readl(local->base_addr +
> +		       probe_desc->implemented_features0_offset);
> +	if (!(regval & SOCE_IMPLEMENTED_DSA))
> +		return -ENODEV;

I find it useful to have macros like SOCE_IMPLEMENTED_DSA indicate
they apply to features0. It makes it easier to spot dumb typos when
you apply it to features1, not features0.

I also wounder at the name. Does the data sheet really call it DSA?

> +
> +	implemented_numports = FIELD_GET(SOCE_IMPLEMENTED_NUM_PORTS_MASK,
> +					 regval);
> +	if (!implemented_numports ||
> +	    implemented_numports > licensed_numports)
> +		return -EINVAL;
> +
> +	*numports = implemented_numports;

How is this going to scale when you need to look at more bits in these
registers? It seems like at some point you are going to need to pass a
structure to be filled in.

> +static int soce_register_mdio_bus(struct soce_priv *priv, struct device *dev,
> +				  struct device_node *mdio_np,
> +				  u32 mdio_output)
> +{
> +	struct soce_mdio_bus *state;
> +	struct mii_bus *bus;
> +
> +	bus = devm_mdiobus_alloc(dev);
> +	if (!bus)
> +		return -ENOMEM;
> +
> +	state = devm_kzalloc(dev, sizeof(*state), GFP_KERNEL);
> +	if (!state)
> +		return -ENOMEM;
> +
> +	state->ds = priv->ds;
> +	state->mdio_output = mdio_output;
> +
> +	bus->priv = state;
> +	bus->name = "soce mdio";
> +	bus->read = soce_mdio_read;
> +	bus->write = soce_mdio_write;
> +	bus->read_c45 = soce_mdio_read_c45;
> +	bus->write_c45 = soce_mdio_write_c45;
> +	/* ds->dst can be NULL during probe, before dsa_register_switch() */
> +	snprintf(bus->id, MII_BUS_ID_SIZE, "%s-mdio-%u", dev_name(dev),
> +		 mdio_output);

Why the comment. How is it relevant?

> +static int soce_mdio_23_02_read_c22(struct dsa_switch *ds, int mdio_output,
> +				    int phy_addr, int regnum)
> +{
> +	void __iomem *ctrl, *params, *read_reg;
> +	struct soce_priv *priv = ds->priv;
> +	struct soce_dsa_local *local;
> +	u32 regvalue;
> +	int ret;
> +
> +	local = &priv->local;
> +	ctrl = local->mdio_master_addr + SOCE_MDIO_CTRL_OFFSET;
> +	params = local->mdio_master_addr + SOCE_MDIO_23_02_PARAMS_OFFSET;
> +	read_reg = local->mdio_master_addr + SOCE_MDIO_23_02_READ_OFFSET;
> +
> +	regvalue = (regnum << SOCE_MDIO_23_02_CTRL_REGADDRDEVTYPE_OFFSET) +
> +		   (phy_addr << SOCE_MDIO_23_02_CTRL_PHYADDR_OFFSET);
> +	writel(regvalue, params);
> +
> +	regvalue = ((mdio_output << SOCE_MDIO_23_02_CTRL_BUS_OFFSET) +
> +		    (0x3 << SOCE_MDIO_23_02_CTRL_TRANSTYPE_OFFSET) +

0x3 means read?

> +		    (0x0 << SOCE_MDIO_23_02_CTRL_CLAUSE_OFFSET) +

0x0 means C22

> +		    (0x1 << SOCE_MDIO_23_02_CTRL_OPSTATUS_OFFSET));

What does 0x1 mean? Please add some #defines for theses to act as
documentation.

	Andrew

  parent reply	other threads:[~2026-09-08  0:37 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-03 18:10 [PATCH net-next v2 0/4] net: dsa: Add SoC-e DSA driver Vasilij Strassheim
2026-09-03 18:10 ` [PATCH net-next v2 1/4] dt-bindings: vendor-prefixes: Add soce Vasilij Strassheim
2026-09-07  9:14   ` Krzysztof Kozlowski
2026-09-03 18:10 ` [PATCH net-next v2 2/4] dt-bindings: net: dsa: Add SoC-e SWIP switch Vasilij Strassheim
2026-09-07  9:21   ` Krzysztof Kozlowski
2026-09-07 14:01     ` Vasilij Strassheim
2026-09-07 18:56       ` Andrew Lunn
2026-09-08 10:16         ` Vasilij Strassheim
2026-09-08 10:29         ` Kurt Kanzenbach
2026-09-08  9:14       ` Krzysztof Kozlowski
2026-09-08 10:09         ` Vasilij Strassheim
2026-09-07 19:04   ` Andrew Lunn
2026-09-07 19:09     ` Andrew Lunn
2026-09-08 18:15     ` Vasilij Strassheim
2026-09-08 19:10       ` Andrew Lunn
2026-09-09 18:46         ` Vasilij Strassheim
2026-09-10 12:12           ` Andrew Lunn
2026-09-15 10:23             ` Vasilij Strassheim
2026-09-03 18:11 ` [PATCH net-next v2 3/4] net: dsa: Add tag handling for SoC-e switches Vasilij Strassheim
2026-09-09 12:12   ` netdev-bot+sashiko
2026-09-03 18:11 ` [PATCH net-next v2 4/4] net: dsa: soce: Add basic support for SoC-e switch IP cores Vasilij Strassheim
2026-09-07 19:28   ` Andrew Lunn
2026-09-08 18:44     ` Vasilij Strassheim
2026-09-08 19:20       ` Andrew Lunn
2026-09-09 19:28         ` Vasilij Strassheim
2026-09-10 12:18           ` Andrew Lunn
2026-09-15 10:48             ` Vasilij Strassheim
2026-09-15 12:52               ` Andrew Lunn
2026-09-08  0:37   ` Andrew Lunn [this message]
2026-09-10 13:01     ` Vasilij Strassheim
2026-09-10 15:07       ` Andrew Lunn
2026-09-11 13:39         ` Vasilij Strassheim
2026-09-08  8:25   ` Kurt Kanzenbach
2026-09-08 10:12     ` Vasilij Strassheim
2026-09-09 12:12   ` netdev-bot+sashiko
2026-09-15 11:23     ` Vasilij Strassheim
2026-09-15 12:56       ` Andrew Lunn
2026-09-07  9:10 ` [PATCH net-next v2 0/4] net: dsa: Add SoC-e DSA driver Krzysztof Kozlowski

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