Re: [PATCH v27 5/5] sfc: support pio mapping based on cxl

[Alejandro Lucero Palau <alucerop@amd.com>]

On 6/9/26 23:18, Dave Jiang wrote:
>
> On 6/9/26 2:57 PM, alejandro.lucero-palau@amd.com wrote:
>> From: Alejandro Lucero <alucerop@amd.com>
>>
>> A PIO buffer is a region of device memory to which the driver can write a
>> packet for TX, with the device handling the transmit doorbell without
>> requiring a DMA for getting the packet data, which helps reducing latency
>> in certain exchanges. With CXL mem protocol this latency can be lowered
>> further.
>>
>> With a device supporting CXL and successfully initialised, use the cxl
>> region to map the memory range and use this mapping for PIO buffers.
>>
>> Add the disabling of those CXL-based PIO buffers if the callback for
>> potential cxl endpoint removal by the CXL core happens.
> ^ This seems to be missing?


Yes, this comes from v26. That is not happening anymore and I forgot to 
remove the reference.


<snip>

>> +	/* Set up the WC mapping */
>> +
>> +#ifdef CONFIG_SFC_CXL
>> +	probe_data = container_of(efx, struct efx_probe_data, efx);
>> +	if ((nic_data->datapath_caps3 &
>> +	    (1 << MC_CMD_GET_CAPABILITIES_V7_OUT_CXL_CONFIG_ENABLE_LBN)) &&
>> +	    probe_data->cxl_pio_initialised) {
>> +		/* Using PIO through CXL mapping */
>> +		nic_data->pio_write_base = probe_data->cxl->ctpio_cxl;
>> +		nic_data->pio_write_vi_base = pio_write_vi_base;
>> +
>> +		probe_data->cxl_pio_in_use = true;
> Don't think this is used anywhere.
>
> DJ


Right again and same reason: this is not needed anymore.


I will fix it.


Thanks!

<snip>