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From: Andrew Lunn <andrew@lunn.ch>
To: Romain Gantois <romain.gantois@bootlin.com>
Cc: davem@davemloft.net, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Jakub Kicinski <kuba@kernel.org>,
	Eric Dumazet <edumazet@google.com>,
	Paolo Abeni <pabeni@redhat.com>,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, thomas.petazzoni@bootlin.com,
	Florian Fainelli <f.fainelli@gmail.com>,
	Heiner Kallweit <hkallweit1@gmail.com>,
	Russell King <linux@armlinux.org.uk>,
	linux-arm-kernel@lists.infradead.org,
	Vladimir Oltean <vladimir.oltean@nxp.com>,
	Luka Perkov <luka.perkov@sartura.hr>,
	Robert Marko <robert.marko@sartura.hr>,
	Andy Gross <agross@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konrad.dybcio@somainline.org>,
	Maxime Chevallier <maxime.chevallier@bootlin.com>
Subject: Re: [PATCH net-next 4/5] net: ipqess: add a PSGMII calibration procedure to the IPQESS driver
Date: Tue, 24 Oct 2023 16:13:30 +0200	[thread overview]
Message-ID: <4bde9110-c88d-4a22-8e67-e788db4673f3@lunn.ch> (raw)
In-Reply-To: <9d447cb5-c8f9-06d2-0909-2870d57f0f7a@bootlin.com>

> Yes, I'll add more detailed comments to the code in the v2. The calibration 
> procedure itself targets the PSGMII device, which is internal to the SoC and can 
> be logically accessed as a PHY device on the MDIO bus. This component is a 
> little opaque and has some nonstandard MII register definitions.
> 
> The "testing" phase that follows the calibration accesses both the internal 
> QCA8K switch ports and the external QCA8075 PHY. For example, it puts both the 
> switch ports and the PHY ports in loopback before starting packet generation on 
> the external PHYs. This is done to verify that the PSGMII link works correctly 
> after being calibrated.
> 
> So this code interacts with both internal ESS devices and external PHYs, but 
> mostly the former, which is why I kept everything in the MAC/switch driver.

Accessing the external PHYs i would suggest go over the normal phylib
API. Somebody might build a board using a different PHY, with
different registers. If all you need is loopback, there is a phylib
call for that.

Directly accessing the internal ESS is fine, it cannot be changed, but
if there are phylib helpers which do the same thing, consider using
them.

     Andrew

  reply	other threads:[~2023-10-24 14:13 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-23 15:50 [PATCH net-next 0/5] net: ipqess: introduce Qualcomm IPQESS driver Romain Gantois
2023-10-23 15:50 ` [PATCH net-next 1/5] net: dt-bindings: Introduce the Qualcomm IPQESS Ethernet switch Romain Gantois
2023-10-23 17:37   ` Krzysztof Kozlowski
2023-10-24  8:01     ` Romain Gantois
2023-10-23 17:40   ` Rob Herring
2023-10-24  9:54     ` Romain Gantois
2023-10-24  9:56       ` Krzysztof Kozlowski
2023-10-24 10:05         ` Romain Gantois
2023-10-24 10:54           ` Krzysztof Kozlowski
2023-10-24 12:13             ` Romain Gantois
2023-10-23 15:50 ` [PATCH net-next 2/5] net: dsa: qca: Make the QCA8K hardware library available globally Romain Gantois
2023-10-23 16:40   ` Andrew Lunn
2023-10-23 15:50 ` [PATCH net-next 3/5] net: ipqess: introduce the Qualcomm IPQESS driver Romain Gantois
2023-10-23 17:50   ` Andrew Lunn
2023-10-24  9:16     ` Romain Gantois
2023-10-24 14:08       ` Andrew Lunn
2023-10-24 16:23         ` Robert Marko
2023-10-24 16:48           ` Andrew Lunn
2023-10-24 11:44   ` Wojciech Drewek
2023-10-24 15:55   ` kernel test robot
2023-10-23 15:50 ` [PATCH net-next 4/5] net: ipqess: add a PSGMII calibration procedure to the " Romain Gantois
2023-10-23 18:01   ` Andrew Lunn
2023-10-24  9:03     ` Romain Gantois
2023-10-24 14:13       ` Andrew Lunn [this message]
2023-10-24 16:49         ` Robert Marko
2023-10-23 15:50 ` [PATCH net-next 5/5] dts: qcom: ipq4019: Add description for the IPQ4019 ESS EDMA and switch Romain Gantois
2023-10-23 17:39   ` Krzysztof Kozlowski

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