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From: Andrew Lunn <andrew@lunn.ch>
To: Vladimir Oltean <vladimir.oltean@nxp.com>
Cc: netdev@vger.kernel.org, Heiner Kallweit <hkallweit1@gmail.com>,
	Russell King <linux@armlinux.org.uk>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Marek Vasut <marex@denx.de>, Wei Fang <wei.fang@nxp.com>,
	Clark Wang <xiaoning.wang@nxp.com>
Subject: Re: [PATCH v2 net-next 6/6] net: phy: realtek: create rtl8211f_config_phy_eee() helper
Date: Fri, 7 Nov 2025 14:34:54 +0100	[thread overview]
Message-ID: <56b1deb7-2cc4-46fc-9890-bb7d984bed55@lunn.ch> (raw)
In-Reply-To: <20251107110817.324389-7-vladimir.oltean@nxp.com>

On Fri, Nov 07, 2025 at 01:08:17PM +0200, Vladimir Oltean wrote:
> To simplify the rtl8211f_config_init() control flow and get rid of
> "early" returns for PHYs where the PHYCR2 register is absent, move the
> entire logic sub-block that deals with disabling PHY-mode EEE to a
> separate function. There, it is much more obvious what the early
> "return 0" skips, and it becomes more difficult to accidentally skip
> unintended stuff.
> 
> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
> ---
> v1->v2: patch is new
> 
>  drivers/net/phy/realtek/realtek_main.c | 29 ++++++++++++++++----------
>  1 file changed, 18 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realtek/realtek_main.c
> index 4501b8923aad..6e75e124f27a 100644
> --- a/drivers/net/phy/realtek/realtek_main.c
> +++ b/drivers/net/phy/realtek/realtek_main.c
> @@ -684,6 +684,23 @@ static int rtl8211f_config_aldps(struct phy_device *phydev)
>  				mask, mask);
>  }
>  
> +static int rtl8211f_config_phy_eee(struct phy_device *phydev)
> +{
> +	int ret;
> +
> +	/* RTL8211FVD has no PHYCR2 register */
> +	if (phydev->drv->phy_id == RTL_8211FVD_PHYID)
> +		return 0;
> +
> +	/* Disable PHY-mode EEE so LPI is passed to the MAC */
> +	ret = phy_modify_paged(phydev, RTL8211F_PHYCR_PAGE, RTL8211F_PHYCR2,
> +			       RTL8211F_PHYCR2_PHY_EEE_ENABLE, 0);
> +	if (ret)
> +		return ret;
> +
> +	return genphy_soft_reset(phydev);

Is this soft reset only required for EEE? None of the other
configuration needs it?

For the Marvell PHYs, lots of registers need a soft reset to put
changes into effect. I would not want to hide the soft reset inside a
helper, because of the danger more calls to helps are added
afterwards.

	Andrew

  reply	other threads:[~2025-11-07 13:34 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-07 11:08 [PATCH v2 net-next 0/6] Disable CLKOUT on RTL8211F(D)(I)-VD-CG Vladimir Oltean
2025-11-07 11:08 ` [PATCH v2 net-next 1/6] net: phy: realtek: create rtl8211f_config_rgmii_delay() Vladimir Oltean
2025-11-07 13:27   ` Andrew Lunn
2025-11-07 11:08 ` [PATCH v2 net-next 2/6] net: phy: realtek: eliminate priv->phycr2 variable Vladimir Oltean
2025-11-07 13:27   ` Andrew Lunn
2025-11-07 11:08 ` [PATCH v2 net-next 3/6] net: phy: realtek: eliminate has_phycr2 variable Vladimir Oltean
2025-11-07 11:08 ` [PATCH v2 net-next 4/6] net: phy: realtek: allow CLKOUT to be disabled on RTL8211F(D)(I)-VD-CG Vladimir Oltean
2025-11-07 13:29   ` Andrew Lunn
2025-11-07 11:08 ` [PATCH v2 net-next 5/6] net: phy: realtek: eliminate priv->phycr1 variable Vladimir Oltean
2025-11-07 13:30   ` Andrew Lunn
2025-11-07 11:08 ` [PATCH v2 net-next 6/6] net: phy: realtek: create rtl8211f_config_phy_eee() helper Vladimir Oltean
2025-11-07 13:34   ` Andrew Lunn [this message]
2025-11-07 14:32     ` Vladimir Oltean
2025-11-07 16:18       ` Andrew Lunn
2025-11-13 12:13         ` Vladimir Oltean
2025-11-13 14:03           ` Andrew Lunn

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