From: Dan Williams <dan.j.williams@intel.com>
To: Alejandro Lucero Palau <alucerop@amd.com>,
Dan Williams <dan.j.williams@intel.com>,
<alejandro.lucero-palau@amd.com>, <linux-cxl@vger.kernel.org>,
<netdev@vger.kernel.org>, <edward.cree@amd.com>,
<davem@davemloft.net>, <kuba@kernel.org>, <pabeni@redhat.com>,
<edumazet@google.com>, <dave.jiang@intel.com>
Subject: Re: [PATCH v9 15/27] cxl: define a driver interface for HPA free space enumeration
Date: Tue, 21 Jan 2025 15:44:07 -0800 [thread overview]
Message-ID: <67903147bc715_20fa2942e@dwillia2-xfh.jf.intel.com.notmuch> (raw)
In-Reply-To: <d71fd820-5dd8-0010-226e-f8f6b224de1d@amd.com>
Alejandro Lucero Palau wrote:
[..]
> >> So, I am not sure this code path has ever been tested as lockdep should
> >> complain about the double acquisition.
> >
> >
> > Oddly enough, it has been tested with two different drivers and with
> > the kernel configuring lockdep.
> >
> > It is worth to investigate ...
> >
>
> Confirmed the double lock is not an issue. Maybe the code hidden in
> those macros is checking if the current caller is the same one that the
> current owner of the lock. I will check that or investigate further.
Are you sure?
This splat:
============================================
WARNING: possible recursive locking detected
6.13.0-rc2+ #68 Tainted: G OE
--------------------------------------------
cat/1212 is trying to acquire lock:
ffffffffc0591cf0 (cxl_region_rwsem){++++}-{4:4}, at: decoders_committed_show+0x2a/0x90 [cxl_core]
but task is already holding lock:
ffffffffc0591cf0 (cxl_region_rwsem){++++}-{4:4}, at: decoders_committed_show+0x1e/0x90 [cxl_core]
other info that might help us debug this:
Possible unsafe locking scenario:
CPU0
----
lock(cxl_region_rwsem);
lock(cxl_region_rwsem);
*** DEADLOCK ***
...results from this change:
diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c
index 72950f631d49..9ebe9d46422b 100644
--- a/drivers/cxl/core/port.c
+++ b/drivers/cxl/core/port.c
@@ -560,9 +560,11 @@ static ssize_t decoders_committed_show(struct device *dev,
struct cxl_port *port = to_cxl_port(dev);
int rc;
+ down_read(&cxl_region_rwsem);
down_read(&cxl_region_rwsem);
rc = sysfs_emit(buf, "%d\n", cxl_num_decoders_committed(port));
up_read(&cxl_region_rwsem);
+ up_read(&cxl_region_rwsem);
return rc;
}
...and "cat /sys/bus/cxl/devices/port*/decoders_committed".
next prev parent reply other threads:[~2025-01-21 23:44 UTC|newest]
Thread overview: 89+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-30 21:44 [PATCH v9 00/27] cxl: add type2 device basic support alejandro.lucero-palau
2024-12-30 21:44 ` [PATCH v9 01/27] " alejandro.lucero-palau
2024-12-30 21:44 ` [PATCH v9 02/27] sfc: add cxl support using new CXL API alejandro.lucero-palau
2025-01-02 14:32 ` Jonathan Cameron
2025-01-03 7:21 ` Alejandro Lucero Palau
2025-01-18 1:30 ` Dan Williams
2025-01-20 14:35 ` Alejandro Lucero Palau
2024-12-30 21:44 ` [PATCH v9 03/27] cxl: add capabilities field to cxl_dev_state and cxl_port alejandro.lucero-palau
2025-01-02 14:36 ` Jonathan Cameron
2025-01-03 7:20 ` Alejandro Lucero Palau
2025-01-03 10:50 ` Jonathan Cameron
2025-01-03 11:50 ` Alejandro Lucero Palau
2025-01-18 1:37 ` Dan Williams
2025-01-20 14:58 ` Alejandro Lucero Palau
2025-01-21 22:39 ` Dan Williams
2024-12-30 21:44 ` [PATCH v9 04/27] cxl/pci: add check for validating capabilities alejandro.lucero-palau
2025-01-02 14:38 ` Jonathan Cameron
2025-01-18 1:40 ` Dan Williams
2025-01-20 15:14 ` Alejandro Lucero Palau
2025-01-21 22:42 ` Dan Williams
2024-12-30 21:44 ` [PATCH v9 05/27] cxl: move pci generic code alejandro.lucero-palau
2025-01-02 14:41 ` Jonathan Cameron
2025-01-18 1:43 ` Dan Williams
2024-12-30 21:44 ` [PATCH v9 06/27] cxl: add function for type2 cxl regs setup alejandro.lucero-palau
2025-01-02 14:53 ` Jonathan Cameron
2025-01-03 7:23 ` Alejandro Lucero Palau
2025-01-18 1:51 ` Dan Williams
2025-01-20 15:40 ` Alejandro Lucero Palau
2025-01-21 22:51 ` Dan Williams
2025-01-22 9:05 ` Alejandro Lucero Palau
2025-01-22 23:34 ` Dan Williams
2024-12-30 21:44 ` [PATCH v9 07/27] sfc: use cxl api for regs setup and checking alejandro.lucero-palau
2025-01-02 14:54 ` Jonathan Cameron
2025-01-18 1:53 ` Dan Williams
2025-01-20 15:44 ` Alejandro Lucero Palau
2024-12-30 21:44 ` [PATCH v9 08/27] cxl: add functions for resource request/release by a driver alejandro.lucero-palau
2024-12-30 21:44 ` [PATCH v9 09/27] sfc: request cxl ram resource alejandro.lucero-palau
2025-01-18 1:58 ` Dan Williams
2025-01-20 16:00 ` Alejandro Lucero Palau
2024-12-30 21:44 ` [PATCH v9 10/27] resource: harden resource_contains alejandro.lucero-palau
2025-01-18 2:03 ` Dan Williams
2025-01-20 16:10 ` Alejandro Lucero Palau
2025-01-20 16:16 ` Alejandro Lucero Palau
2025-01-20 16:26 ` Alejandro Lucero Palau
2025-01-21 20:38 ` Alison Schofield
2025-01-22 9:37 ` Alejandro Lucero Palau
2025-01-21 23:01 ` Dan Williams
2025-01-22 9:41 ` Alejandro Lucero Palau
2024-12-30 21:44 ` [PATCH v9 11/27] cxl: add function for setting media ready by a driver alejandro.lucero-palau
2024-12-30 21:44 ` [PATCH v9 12/27] sfc: set cxl media ready alejandro.lucero-palau
2025-01-02 14:55 ` Jonathan Cameron
2024-12-30 21:44 ` [PATCH v9 13/27] cxl: prepare memdev creation for type2 alejandro.lucero-palau
2025-01-02 15:01 ` Jonathan Cameron
2025-01-03 7:24 ` Alejandro Lucero Palau
2025-01-18 2:27 ` Dan Williams
2025-01-20 17:15 ` Alejandro Lucero Palau
2025-01-21 23:11 ` Dan Williams
2024-12-30 21:44 ` [PATCH v9 14/27] sfc: create type2 cxl memdev alejandro.lucero-palau
2025-01-18 2:41 ` Dan Williams
2025-01-20 17:27 ` Alejandro Lucero Palau
2025-01-21 23:22 ` Dan Williams
2024-12-30 21:44 ` [PATCH v9 15/27] cxl: define a driver interface for HPA free space enumeration alejandro.lucero-palau
2025-01-02 15:10 ` Jonathan Cameron
2025-01-03 7:55 ` Alejandro Lucero Palau
2025-01-18 3:02 ` Dan Williams
2025-01-20 18:16 ` Alejandro Lucero Palau
2025-01-21 14:00 ` Alejandro Lucero Palau
2025-01-21 23:44 ` Dan Williams [this message]
2025-01-22 9:26 ` Alejandro Lucero Palau
2025-01-21 23:35 ` Dan Williams
2024-12-30 21:44 ` [PATCH v9 16/27] sfc: obtain root decoder with enough HPA free space alejandro.lucero-palau
2024-12-30 21:44 ` [PATCH v9 17/27] cxl: define a driver interface for DPA allocation alejandro.lucero-palau
2025-01-02 15:15 ` Jonathan Cameron
2025-01-03 7:58 ` Alejandro Lucero Palau
2024-12-30 21:44 ` [PATCH v9 18/27] sfc: get endpoint decoder alejandro.lucero-palau
2025-01-02 15:17 ` Jonathan Cameron
2025-01-02 16:38 ` Edward Cree
2024-12-30 21:44 ` [PATCH v9 19/27] cxl: make region type based on endpoint type alejandro.lucero-palau
2024-12-30 21:44 ` [PATCH v9 20/27] cxl/region: factor out interleave ways setup alejandro.lucero-palau
2024-12-30 21:44 ` [PATCH v9 21/27] cxl/region: factor out interleave granularity setup alejandro.lucero-palau
2024-12-30 21:44 ` [PATCH v9 22/27] cxl: allow region creation by type2 drivers alejandro.lucero-palau
2025-01-02 15:22 ` Jonathan Cameron
2025-01-03 8:16 ` Alejandro Lucero Palau
2024-12-30 21:44 ` [PATCH v9 23/27] cxl: add region flag for precluding a device memory to be used for dax alejandro.lucero-palau
2025-01-02 15:24 ` Jonathan Cameron
2024-12-30 21:44 ` [PATCH v9 24/27] sfc: create cxl region alejandro.lucero-palau
2024-12-30 21:44 ` [PATCH v9 25/27] cxl: add function for obtaining region range alejandro.lucero-palau
2024-12-30 21:44 ` [PATCH v9 26/27] sfc: update MCDI protocol headers alejandro.lucero-palau
2024-12-30 21:44 ` [PATCH v9 27/27] sfc: support pio mapping based on cxl alejandro.lucero-palau
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