[PATCH net-next v3] net: stmmac: Use interrupt mode INTM=1 for per channel irq

[PATCH net-next v3] net: stmmac: Use interrupt mode INTM=1 for per channel irq

[muhammad.nazim.amirul.nazle.asmade]

From: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade@altera.com>

commit 6ccf12ae111e ("net: stmmac: use interrupt mode INTM=1 for
multi-MSI") introduced INTM=1 interrupt mode for platforms using MSI.

Apply a similar approach to enable per-channel interrupts using shared
peripheral interrupt (SPI), so that only per-channel TX and RX
interrupts (TI/RI) are handled by the TX/RX ISR without invoking the
common interrupt ISR.

Signed-off-by: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade@altera.com>
---
Changes in v3:
- Rebased and reposted on the net-next tree.

Changes in v2:
- Rename macros to use XGMAC_ prefix to match dwxgmac2.h convention.
- Drop DMA_MODE_INTM_SHIFT and use FIELD_PREP() instead.
- Wire up multi_irq_en via STMMAC_FLAG_MULTI_IRQ_EN in stmmac_main.c
  so the feature is reachable by platform drivers.
- Drop unused plat_stmmacenet_data fields (ext_snapshot_num,
  int_snapshot_en, ext_snapshot_en, multi_msi_en, multi_irq_en)
  which duplicate existing flags bits.
- Remove misleading commit message paragraph about ISR decoupling
  (dwxgmac2_dma_interrupt() already handles TI/RI independently of NIS).

 drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h     | 2 ++
 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c | 9 +++++++++
 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c  | 2 ++
 include/linux/stmmac.h                             | 2 ++
 4 files changed, 15 insertions(+)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h
index 51943705a2b0..544541e0e2a5 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h
@@ -320,6 +320,8 @@
 /* DMA Registers */
 #define XGMAC_DMA_MODE			0x00003000
 #define XGMAC_SWR			BIT(0)
+#define XGMAC_DMA_MODE_INTM_MASK	GENMASK(13, 12)
+#define XGMAC_DMA_MODE_INTM_MODE1	0x1
 #define XGMAC_DMA_SYSBUS_MODE		0x00003004
 #define XGMAC_WR_OSR_LMT		GENMASK(29, 24)
 #define XGMAC_RD_OSR_LMT		GENMASK(21, 16)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
index 03437f1cf3df..59fe488933d3 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
@@ -4,6 +4,7 @@
  * stmmac XGMAC support.
  */
 
+#include <linux/bitfield.h>
 #include <linux/iopoll.h>
 #include "stmmac.h"
 #include "dwxgmac2.h"
@@ -31,6 +32,14 @@ static void dwxgmac2_dma_init(void __iomem *ioaddr,
 		value |= XGMAC_EAME;
 
 	writel(value, ioaddr + XGMAC_DMA_SYSBUS_MODE);
+
+	if (dma_cfg->multi_irq_en) {
+		value = readl(ioaddr + XGMAC_DMA_MODE);
+		value &= ~XGMAC_DMA_MODE_INTM_MASK;
+		value |= FIELD_PREP(XGMAC_DMA_MODE_INTM_MASK,
+				    XGMAC_DMA_MODE_INTM_MODE1);
+		writel(value, ioaddr + XGMAC_DMA_MODE);
+	}
 }
 
 static void dwxgmac2_dma_init_chan(struct stmmac_priv *priv,
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 3591755ea30b..531f9d7bf2b9 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -7836,6 +7836,8 @@ static int __stmmac_dvr_probe(struct device *device,
 	priv->dev->base_addr = (unsigned long)res->addr;
 	priv->plat->dma_cfg->multi_msi_en =
 		(priv->plat->flags & STMMAC_FLAG_MULTI_MSI_EN);
+	priv->plat->dma_cfg->multi_irq_en =
+		(priv->plat->flags & STMMAC_FLAG_MULTI_IRQ_EN);
 
 	priv->dev->irq = res->irq;
 	priv->wol_irq = res->wol_irq;
diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h
index 4430b967abde..cdb983e49856 100644
--- a/include/linux/stmmac.h
+++ b/include/linux/stmmac.h
@@ -122,6 +122,7 @@ struct stmmac_dma_cfg {
 	bool eame;
 	/* multi_msi_en: stmmac core internal */
 	bool multi_msi_en;
+	bool multi_irq_en;
 	/* atds: stmmac core internal */
 	bool atds;
 };
@@ -211,6 +212,7 @@ enum dwmac_core_type {
 #define STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY	BIT(14)
 #define STMMAC_FLAG_KEEP_PREAMBLE_BEFORE_SFD	BIT(15)
 #define STMMAC_FLAG_SERDES_SUPPORTS_2500M	BIT(16)
+#define STMMAC_FLAG_MULTI_IRQ_EN		BIT(17)
 
 struct mac_device_info;
 
-- 
2.43.7

Re: [PATCH net-next v3] net: stmmac: Use interrupt mode INTM=1 for per channel irq

[Jakub Kicinski]

On Thu,  7 May 2026 00:01:25 -0700
muhammad.nazim.amirul.nazle.asmade@altera.com wrote:
> - Wire up multi_irq_en via STMMAC_FLAG_MULTI_IRQ_EN in stmmac_main.c
>   so the feature is reachable by platform drivers.

Okay, but where is a platform driver which uses it _today_ ?
We need an upstream platform that uses this new bit submitted
as part of the same series.

If I'm completely off, and this new code somehow gets triggered
with upstream platforms - please improve the commit message.
-- 
pw-bot: cr

Re: [PATCH net-next v3] net: stmmac: Use interrupt mode INTM=1 for per channel irq

[Jakub Raczynski]

[-- Attachment #1: Type: text/plain, Size: 1263 bytes --]

On Mon, May 11, 2026 at 06:08:42PM -0700, Jakub Kicinski wrote:
> On Thu,  7 May 2026 00:01:25 -0700
> muhammad.nazim.amirul.nazle.asmade@altera.com wrote:
> > - Wire up multi_irq_en via STMMAC_FLAG_MULTI_IRQ_EN in stmmac_main.c
> >   so the feature is reachable by platform drivers.
> 
> Okay, but where is a platform driver which uses it _today_ ?
> We need an upstream platform that uses this new bit submitted
> as part of the same series.
> 
> If I'm completely off, and this new code somehow gets triggered
> with upstream platforms - please improve the commit message.
> -- 
> pw-bot: cr
>
Please allow me to attach question to this response, but is this patch enough?

In stmmac code there is handler stmmac_request_irq() which deals with
stmmac_request_irq_multi_msi() and single() aka shared IRQ.
If INTM is enabled, does it really do anything if there is no handler within
stmmac_request_irq() that would process all different IRQs, depending how
is it wired on specific hardware? Or rather, shouldn't there be new function
to call request_irq() per DMA channel for that?

There is e9ee910218ffd that reverted basically whole support for above,
so I think this change is not sufficient.

Please correct me if I am wrong. Thank you.

BR
Jakub Raczynski

[-- Attachment #2: Type: text/plain, Size: 0 bytes --]

Re: [PATCH net-next v3] net: stmmac: Use interrupt mode INTM=1 for per channel irq

[Nazle Asmade, Muhammad Nazim Amirul]

On 12/5/2026 11:56 pm, Jakub Raczynski wrote:
> [You don't often get email from j.raczynski@samsung.com. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
> 
> On Mon, May 11, 2026 at 06:08:42PM -0700, Jakub Kicinski wrote:
>> On Thu,  7 May 2026 00:01:25 -0700
>> muhammad.nazim.amirul.nazle.asmade@altera.com wrote:
>>> - Wire up multi_irq_en via STMMAC_FLAG_MULTI_IRQ_EN in stmmac_main.c
>>>    so the feature is reachable by platform drivers.
>>
>> Okay, but where is a platform driver which uses it _today_ ?
>> We need an upstream platform that uses this new bit submitted
>> as part of the same series.
>>
>> If I'm completely off, and this new code somehow gets triggered
>> with upstream platforms - please improve the commit message.
>> --
>> pw-bot: cr
>>
> Please allow me to attach question to this response, but is this patch enough?
> 
> In stmmac code there is handler stmmac_request_irq() which deals with
> stmmac_request_irq_multi_msi() and single() aka shared IRQ.
> If INTM is enabled, does it really do anything if there is no handler within
> stmmac_request_irq() that would process all different IRQs, depending how
> is it wired on specific hardware? Or rather, shouldn't there be new function
> to call request_irq() per DMA channel for that?
> 
> There is e9ee910218ffd that reverted basically whole support for above,
> so I think this change is not sufficient.
> 
> Please correct me if I am wrong. Thank you.
> 
> BR
> Jakub Raczynski
> 
> 
Hi Jakub


After looking back your commit message above, it seems like this patch 
had been upstreamed before and was reverted together with another 3 due 
to one issue on DT side. I will re-send the new one with complete 
version in series. Thanks Jakub!