From: Krzysztof Kozlowski <krzk@kernel.org>
To: Coia Prant <coiaprant@gmail.com>
Cc: Andrew Lunn <andrew+netdev@lunn.ch>,
"David S . Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>, Vinod Koul <vkoul@kernel.org>,
Maxime Chevallier <maxime.chevallier@bootlin.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
Romain Gantois <romain.gantois@bootlin.com>,
Heiner Kallweit <hkallweit1@gmail.com>,
Neil Armstrong <neil.armstrong@linaro.org>,
Russell King <linux@armlinux.org.uk>,
Shawn Lin <shawn.lin@rock-chips.com>,
David Heidelberg <david@ixit.cz>,
netdev@vger.kernel.org, linux-rockchip@lists.infradead.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-renesas-soc@vger.kernel.org
Subject: Re: [PATCH v2 04/10] dt-bindings: net: pcs: add rockchip,rk3568-xpcs binding
Date: Thu, 6 Aug 2026 08:48:53 +0200 [thread overview]
Message-ID: <b90b8790-b0dc-4383-a9b7-fe9ba3f6edfd@kernel.org> (raw)
In-Reply-To: <CALj3r0hbp-zS7Sv-6T3uBOCq2ZO4XZHKvkD4dTZ3gXRS=90JUQ@mail.gmail.com>
On 05/08/2026 19:20, Coia Prant wrote:
> Hi Krzysztof,
>
> Thanks for the detailed review. Here's my response to each point:
>
>>> +title: Rockchip RK3568 Synopsys DesignWare Ethernet PCS
>>> +
>>> +maintainers:
>>> + - Coia Prant <coiaprant@gmail.com>
>>> +
>>> +description: |
>>> + Rockchip RK3568 SoC integrates a Synopsys DesignWare Ethernet Physical
>>> + Coding Sublayer (XPCS).
>>> + The PCS provides an interface between the Media Access Control (MAC)
>>> + and the Physical Medium Attachment (PMA) sublayer through a Media
>>> + Independent Interface (GMII).
>>> +
>>> + The XPCS is accessed over the APB3 bus and internally connected to a
>>> + Naneng Combo SerDes PHY.
>>> + It supports 1000BASE-X, SGMII and QSGMII modes.
>>> +
>>> + The block contains four MII ports (pcs-mii@0..3) that can be
>>> + individually enabled and routed to one of the Ethernet GMAC controllers
>>> + via the pcs-handle property in the MAC device tree node.
>
> 1. Commit message: I'll drop the redundant description paragraph and keep
> only the essential information.
>
> 2. Subject: I'll drop the redundant "binding" word.
>
>> +properties:
>> + compatible:
>> + const: rockchip,rk3568-xpcs
>> +
>> + '#address-cells':
>> + const: 1
>> +
>> + '#size-cells':
>> + const: 0
>
> 3. reg order: I'll move reg to the second property (after compatible).
>
> 4. Quotes: I'll use consistent quoting style throughout.
>
>> + reg:
>> + description: |
>> + Base address and size of the XPCS register space mapped over the
>> + APB3 bus.
>
> 5. reg description: I'll drop it as redundant.
>
>> + clocks:
>> + description: |
>> + Clock sources for the XPCS:
>> + - csr: APB3 bus interface clock (clk_csr_i), required for register
>> + access.
>> + - eee: EEE clock (clk_eee_i), required for Energy Efficient
>> + Ethernet (EEE) operation.
>> + minItems: 2
>> + maxItems: 2
>
> 6. clocks: I'll change to items with descriptions instead of min/maxItems.
>
>> + clock-names:
>> + items:
>> + - const: csr
>> + - const: eee
>> +
>> + phys:
>> + description: |
>
> 7. description formatting: I'll remove unnecessary '|' where not needed.
>
>> + power-domains:
>> + description: |
>> + Power domain for the XPCS.
>
> 8. power-domains description: I'll drop the redundant part.
I don't understand any of these. There are none of my quotes. I don't
get what you are referring to.
Best regards,
Krzysztof
next prev parent reply other threads:[~2026-08-06 6:49 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-01 14:22 [PATCH v2 00/10] net-next: add basic support for RK3568 XPCS Coia Prant
2026-08-01 14:22 ` [PATCH v2 01/10] net: stmmac: move XPCS lifetime management to platform drivers Coia Prant
2026-08-01 14:22 ` [PATCH v2 02/10] dt-bindings: phy: rockchip: naneng-combphy: add rockchip,sgmii-mac-sel property Coia Prant
2026-08-01 14:22 ` [PATCH v2 03/10] phy: rockchip: naneng-combphy: add SGMII MAC selection for RK3568 Coia Prant
2026-08-01 20:58 ` Andrew Lunn
2026-08-02 2:51 ` Coia Prant
2026-08-01 14:22 ` [PATCH v2 04/10] dt-bindings: net: pcs: add rockchip,rk3568-xpcs binding Coia Prant
2026-08-05 7:29 ` Krzysztof Kozlowski
2026-08-05 17:20 ` Coia Prant
2026-08-06 6:48 ` Krzysztof Kozlowski [this message]
2026-08-01 14:22 ` [PATCH v2 05/10] arm64: dts: rockchip: rk3568: add XPCS and fixed-clock nodes Coia Prant
2026-08-01 16:28 ` Heiko Stübner
2026-08-01 19:19 ` Coia Prant
2026-08-01 21:05 ` Andrew Lunn
2026-08-02 3:28 ` Coia Prant
2026-08-02 15:19 ` Andrew Lunn
2026-08-02 18:36 ` Coia Prant
2026-08-01 14:22 ` [PATCH v2 06/10] net: pcs: xpcs: add ANRESTART support for SGMII link recovery Coia Prant
2026-08-01 21:10 ` Andrew Lunn
2026-08-02 3:11 ` Coia Prant
2026-08-02 14:30 ` Andrew Lunn
2026-08-02 14:59 ` Maxime Chevallier
2026-08-02 18:25 ` Coia Prant
2026-08-04 7:35 ` Maxime Chevallier
2026-08-01 14:22 ` [PATCH v2 07/10] net: pcs: xpcs: add Rockchip RK3568 platform glue driver Coia Prant
2026-08-02 1:29 ` Andrew Lunn
2026-08-02 3:20 ` Coia Prant
2026-08-02 14:39 ` Andrew Lunn
2026-08-02 18:33 ` Coia Prant
2026-08-02 19:00 ` Andrew Lunn
2026-08-01 14:22 ` [PATCH v2 08/10] net: stmmac: dwmac-rk: add SGMII support for RK3568 Coia Prant
2026-08-01 14:22 ` [PATCH v2 09/10] arm64: dts: rockchip: rk3568-photonicat: enable SGMII LAN port Coia Prant
2026-08-01 14:22 ` [PATCH v2 10/10] MAINTAINERS: add entry for Rockchip XPCS driver Coia Prant
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