* Re: [PATCH net-next 4/4] net: dsa: assign a master to slave ports
From: Andrew Lunn @ 2017-09-02 15:34 UTC (permalink / raw)
To: Vivien Didelot
Cc: netdev, linux-kernel, kernel, David S. Miller, Florian Fainelli
In-Reply-To: <20170831183746.2109-5-vivien.didelot@savoirfairelinux.com>
On Thu, Aug 31, 2017 at 02:37:46PM -0400, Vivien Didelot wrote:
> Because each DSA slave port may use a different DSA master port, add a
> pointer to a master in the slave structure. This is a preparatory patch
> for multiple CPU ports.
>
> Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
> ---
> net/dsa/dsa_priv.h | 7 ++-----
> net/dsa/slave.c | 33 ++++++++++++++++++---------------
> 2 files changed, 20 insertions(+), 20 deletions(-)
>
> diff --git a/net/dsa/dsa_priv.h b/net/dsa/dsa_priv.h
> index 59f155cbbe87..a8cd6cbe4061 100644
> --- a/net/dsa/dsa_priv.h
> +++ b/net/dsa/dsa_priv.h
> @@ -66,6 +66,8 @@ struct dsa_notifier_vlan_info {
> };
>
> struct dsa_slave_priv {
> + struct dsa_master *master;
> +
> /* Copy of the master xmit tagging op for faster access in hot path */
> struct sk_buff * (*xmit)(struct sk_buff *skb,
> struct net_device *dev);
> @@ -179,9 +181,4 @@ extern const struct dsa_device_ops qca_netdev_ops;
> /* tag_trailer.c */
> extern const struct dsa_device_ops trailer_netdev_ops;
>
> -static inline struct net_device *dsa_master_netdev(struct dsa_slave_priv *p)
> -{
> - return p->dp->ds->dst->master->netdev;
> -}
> -
Hi Vivien
Why remove this helper, when it could become p->master->netdev ?
Andrew
^ permalink raw reply
* Re: [PATCH] DSA support for Micrel KSZ8895
From: Pavel Machek @ 2017-09-02 15:40 UTC (permalink / raw)
To: Florian Fainelli
Cc: Tristram.Ha, Woojung.Huh, nathan.leigh.conrad, vivien.didelot,
netdev, linux-kernel, andrew
In-Reply-To: <16a7fede-d308-f759-9444-22e754903612@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 2475 bytes --]
Hi!
> >>>> Section 4.8 of the datasheet says:
> >>>>
> >>>> All the registers defined in this section can be also accessed
> >>>> via the SPI interface.
> >>>>
> >>>> Meaning all PHY registers can be access via the SPI interface. So you
> >>>> should be able to make a standard Linux MDIO bus driver which performs
> >>>> SPI reads.
> >>>
> >>> As far as I can tell (and their driver confirms) -- yes, all those registers can be
> >>> accessed over the SPI, they are just shuffled around... hence MDIO
> >>> emulation code. I copied it from their code (see the copyrights) so no, I don't
> >>> believe there's nicer solution.
> >>>
> >>> Best regards,
> >>
> >> Can you hold on your developing work on KSZ8895 driver? I am afraid your effort may be in vain. We at Microchip are planning to release DSA drivers for all KSZ switches, starting at KSZ8795, then KSZ8895, and KSZ8863.
> >>
> >
> > Well, thanks for heads up... but its too late to stop now. I already
> > have working code, without the advanced features.
>
> No driver has landed yet nor has any driver been posted in a proper form
> or shape, so at this point neither of you are able to make any claims as
> to which one should be chosen.
I certainly do not want to make any claims. Tristram's driver is
likely to support all (most?) features of the chip, which is not my
goal.
> > I don't know how far away you are with the development. You may want
> > to start from my driver (but its probably too late now).
>
> I would tend to favor Tristram's submission when we see it because he
> claims support for more devices and it is likely to be backed and
> maintained by Microchip in the future.
Well, I guess we decide when we see the code, that's how it works, right?
> I am sure there will be opportunity for you to contribute a lot to this
> driver. Of course, this all depends on the code quality and timing, but
> having two people work on the same things in parallel is just a complete
> waste of each other's time so we might as well wait for Tristram to post
> the said driver and define a plan of action from there?
Well, it would be good to see the code, so we can judge the
quality. Normally, code is posted before testing, so this kind of
problems does not arise.
Best regards,
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 181 bytes --]
^ permalink raw reply
* [PATCH net] net: dsa: loop: Do not unregister invalid fixed PHY
From: Florian Fainelli @ 2017-09-02 15:56 UTC (permalink / raw)
To: netdev; +Cc: Florian Fainelli, Andrew Lunn, Vivien Didelot, open list
During error injection it was possible to crash in dsa_loop_exit() because of
an attempt to unregister an invalid PHY. We actually want to the driver probing
in dsa_loop_init() even though fixed_phy_register() may return an error to
exercise how DSA deals with such cases, but we should not be crashing during
driver removal.
Fixes: 98cd1552ea27 ("net: dsa: Mock-up driver")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/net/dsa/dsa_loop.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/dsa/dsa_loop.c b/drivers/net/dsa/dsa_loop.c
index fdd8f3872102..8150e3a3c8dd 100644
--- a/drivers/net/dsa/dsa_loop.c
+++ b/drivers/net/dsa/dsa_loop.c
@@ -390,7 +390,7 @@ static void __exit dsa_loop_exit(void)
mdio_driver_unregister(&dsa_loop_drv);
for (i = 0; i < NUM_FIXED_PHYS; i++)
- if (phydevs[i])
+ if (!IS_ERR(phydevs[i]))
fixed_phy_unregister(phydevs[i]);
}
module_exit(dsa_loop_exit);
--
2.11.0
^ permalink raw reply related
* Re: [PATCH net] net: dsa: loop: Do not unregister invalid fixed PHY
From: Andrew Lunn @ 2017-09-02 16:16 UTC (permalink / raw)
To: Florian Fainelli; +Cc: netdev, Vivien Didelot, open list
In-Reply-To: <20170902155645.19071-1-f.fainelli@gmail.com>
On Sat, Sep 02, 2017 at 08:56:45AM -0700, Florian Fainelli wrote:
> During error injection it was possible to crash in dsa_loop_exit() because of
> an attempt to unregister an invalid PHY. We actually want to the driver probing
> in dsa_loop_init() even though fixed_phy_register() may return an error to
> exercise how DSA deals with such cases, but we should not be crashing during
> driver removal.
>
> Fixes: 98cd1552ea27 ("net: dsa: Mock-up driver")
> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
^ permalink raw reply
* Re: [PATCH net-next 4/4] net: dsa: assign a master to slave ports
From: Florian Fainelli @ 2017-09-02 16:29 UTC (permalink / raw)
To: Andrew Lunn, Vivien Didelot; +Cc: netdev, linux-kernel, kernel, David S. Miller
In-Reply-To: <20170902153435.GB21003@lunn.ch>
On 09/02/2017 08:34 AM, Andrew Lunn wrote:
> On Thu, Aug 31, 2017 at 02:37:46PM -0400, Vivien Didelot wrote:
>> Because each DSA slave port may use a different DSA master port, add a
>> pointer to a master in the slave structure. This is a preparatory patch
>> for multiple CPU ports.
>>
>> Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
>> ---
>> net/dsa/dsa_priv.h | 7 ++-----
>> net/dsa/slave.c | 33 ++++++++++++++++++---------------
>> 2 files changed, 20 insertions(+), 20 deletions(-)
>>
>> diff --git a/net/dsa/dsa_priv.h b/net/dsa/dsa_priv.h
>> index 59f155cbbe87..a8cd6cbe4061 100644
>> --- a/net/dsa/dsa_priv.h
>> +++ b/net/dsa/dsa_priv.h
>> @@ -66,6 +66,8 @@ struct dsa_notifier_vlan_info {
>> };
>>
>> struct dsa_slave_priv {
>> + struct dsa_master *master;
>> +
>> /* Copy of the master xmit tagging op for faster access in hot path */
>> struct sk_buff * (*xmit)(struct sk_buff *skb,
>> struct net_device *dev);
>> @@ -179,9 +181,4 @@ extern const struct dsa_device_ops qca_netdev_ops;
>> /* tag_trailer.c */
>> extern const struct dsa_device_ops trailer_netdev_ops;
>>
>> -static inline struct net_device *dsa_master_netdev(struct dsa_slave_priv *p)
>> -{
>> - return p->dp->ds->dst->master->netdev;
>> -}
>> -
>
> Hi Vivien
>
> Why remove this helper, when it could become p->master->netdev ?
Agreed, I would keep the helper at this point to minimize the delta, it
should really identical in terms of code generated.
--
Florian
^ permalink raw reply
* Re: [PATCH net-next 4/4] net: dsa: bcm_sf2: Configure IMP port TC2QOS mapping
From: Andrew Lunn @ 2017-09-02 16:30 UTC (permalink / raw)
To: Florian Fainelli; +Cc: netdev, davem, vivien.didelot, jiri, jhs, xiyou.wangcong
In-Reply-To: <1504310354-42773-5-git-send-email-f.fainelli@gmail.com>
> @@ -129,6 +130,14 @@ static void bcm_sf2_imp_setup(struct dsa_switch *ds, int port)
> reg |= MII_DUMB_FWDG_EN;
> core_writel(priv, reg, CORE_SWITCH_CTRL);
>
> + /* Configure Traffic Class to QoS mapping, allow each priority to map
> + * to a different queue number
> + */
> + reg = core_readl(priv, CORE_PORT_TC2_QOS_MAP_PORT(port));
> + for (i = 0; i < 8; i++)
> + reg |= i << (PRT_TO_QID_SHIFT * i);
Hi Florian
Rather than 8, would ds->num_tx_queues be more descriptive?
Andrew
^ permalink raw reply
* Re: [PATCH net-next 4/4] net: dsa: bcm_sf2: Configure IMP port TC2QOS mapping
From: Florian Fainelli @ 2017-09-02 16:32 UTC (permalink / raw)
To: Andrew Lunn; +Cc: netdev, davem, vivien.didelot, jiri, jhs, xiyou.wangcong
In-Reply-To: <20170902163057.GB5463@lunn.ch>
On 09/02/2017 09:30 AM, Andrew Lunn wrote:
>> @@ -129,6 +130,14 @@ static void bcm_sf2_imp_setup(struct dsa_switch *ds, int port)
>> reg |= MII_DUMB_FWDG_EN;
>> core_writel(priv, reg, CORE_SWITCH_CTRL);
>>
>> + /* Configure Traffic Class to QoS mapping, allow each priority to map
>> + * to a different queue number
>> + */
>> + reg = core_readl(priv, CORE_PORT_TC2_QOS_MAP_PORT(port));
>> + for (i = 0; i < 8; i++)
>> + reg |= i << (PRT_TO_QID_SHIFT * i);
>
> Hi Florian
>
> Rather than 8, would ds->num_tx_queues be more descriptive?
I actually have a patch on top of this which defines a constant for the
number of queues instead of open coding 8 here. Thanks!
--
Florian
^ permalink raw reply
* Re: [PATCH net-next 0/4] net: dsa: add master interface
From: Florian Fainelli @ 2017-09-02 16:42 UTC (permalink / raw)
To: Vivien Didelot, netdev; +Cc: linux-kernel, kernel, David S. Miller, Andrew Lunn
In-Reply-To: <20170831183746.2109-1-vivien.didelot@savoirfairelinux.com>
Hi Vivien,
On 08/31/2017 11:37 AM, Vivien Didelot wrote:
> Currently the SoC network interface (called master) to which a switch
> fabric hangs, has its dsa_ptr pointing to a dsa_switch_tree instance.
>
> This is not quite correct, because this interface is physically wired to
> one of the switch ports (called CPU port), and because in a switch
> fabric with multiple CPU ports, several master interfaces will point to
> several CPU ports of the same dsa_switch_tree.
>
> This patchset adds a new dsa_master structure to represent the pipe
> between the SoC master interface and its switch CPU port. This structure
> will store specific data such as the master ethtool_ops copy and the
> tagging protocol used to pass frames with the associated slave ports.
> The dsa_ptr is changed to a dsa_master instance, and each DSA slave now
> has a pointer to a master port.
>
> This is a step forward better control over the CPU conduit and support
> for multiple CPU ports.
Looked briefly over this series and this looks good to me, Andrew has a
valid point about reducing the number of dereferences in hot paths
though. Thanks!
>
> Vivien Didelot (4):
> net: dsa: introduce dsa_master
> net: dsa: move master ethtool ops in dsa_master
> net: dsa: change dsa_ptr for a dsa_master
> net: dsa: assign a master to slave ports
>
> drivers/net/dsa/b53/b53_common.c | 4 +-
> drivers/net/dsa/bcm_sf2.c | 8 +--
> drivers/net/dsa/mt7530.c | 4 +-
> drivers/net/dsa/mv88e6060.c | 2 +-
> drivers/net/dsa/qca8k.c | 2 +-
> include/linux/netdevice.h | 4 +-
> include/net/dsa.h | 42 +++++------
> net/dsa/Makefile | 2 +-
> net/dsa/dsa.c | 34 +--------
> net/dsa/dsa2.c | 38 +++++-----
> net/dsa/dsa_priv.h | 24 +++----
> net/dsa/legacy.c | 34 +++++----
> net/dsa/master.c | 149 +++++++++++++++++++++++++++++++++++++++
> net/dsa/slave.c | 117 +++++-------------------------
> net/dsa/tag_brcm.c | 5 +-
> net/dsa/tag_dsa.c | 3 +-
> net/dsa/tag_edsa.c | 3 +-
> net/dsa/tag_ksz.c | 5 +-
> net/dsa/tag_lan9303.c | 6 +-
> net/dsa/tag_mtk.c | 12 +---
> net/dsa/tag_qca.c | 12 +---
> net/dsa/tag_trailer.c | 5 +-
> 22 files changed, 265 insertions(+), 250 deletions(-)
> create mode 100644 net/dsa/master.c
>
--
Florian
^ permalink raw reply
* Re: [PATCH] Fix build on fedora-14 (and other older systems)
From: Michal Kubecek @ 2017-09-02 17:03 UTC (permalink / raw)
To: greearb; +Cc: netdev
In-Reply-To: <1504361702-30266-1-git-send-email-greearb@candelatech.com>
On Sat, Sep 02, 2017 at 07:15:02AM -0700, greearb@candelatech.com wrote:
> From: Ben Greear <greearb@candelatech.com>
>
> Seems Fedora-20 and below fail, hopefully this fixes
> them.
>
> Signed-off-by: Ben Greear <greearb@candelatech.com>
> ---
> include/linux/sysinfo.h | 8 ++++++++
> ip/ipxfrm.c | 1 +
> ip/xfrm_policy.c | 1 +
> ip/xfrm_state.c | 1 +
> 4 files changed, 11 insertions(+)
Works for me from openSUSE Tumbleweed to SLE11 SP4 (kernel 3.0). The
build on SLE11 SP2 (also 3.0 but older headers in /usr/include)
fails with unknown MS_PRIVATE and MS_REC in lib/bpf.c
Newer systems have these defined in <sys/mount.h>
Including <linux/fs.h> directly in lib/bpf.c fixes that but if we do
that, a copy of the file would have to be included.
> diff --git a/include/linux/sysinfo.h b/include/linux/sysinfo.h
> index 934335a..3596b02 100644
> --- a/include/linux/sysinfo.h
> +++ b/include/linux/sysinfo.h
> @@ -3,6 +3,14 @@
>
> #include <linux/types.h>
>
> +/* So we can compile on older OSs, hopefully this is correct. --Ben */
> +#ifndef __kernel_long_t
> +typedef long __kernel_long_t;
> +#endif
> +#ifndef __kernel_ulong_t
> +typedef unsigned long __kernel_ulong_t;
> +#endif
> +
> #define SI_LOAD_SHIFT 16
> struct sysinfo {
> __kernel_long_t uptime; /* Seconds since boot */
I'm not sure if it is acceptable to modify a file which is supposed to
be a direct copy of kernel uapi header.
Michal Kubecek
^ permalink raw reply
* Re: [PATCH net-next 4/4] net: dsa: bcm_sf2: Configure IMP port TC2QOS mapping
From: Andrew Lunn @ 2017-09-02 17:47 UTC (permalink / raw)
To: Florian Fainelli; +Cc: netdev, davem, vivien.didelot, jiri, jhs, xiyou.wangcong
In-Reply-To: <e0d92f15-342d-2b5b-2f7d-aedba328116f@gmail.com>
On Sat, Sep 02, 2017 at 09:32:08AM -0700, Florian Fainelli wrote:
>
>
> On 09/02/2017 09:30 AM, Andrew Lunn wrote:
> >> @@ -129,6 +130,14 @@ static void bcm_sf2_imp_setup(struct dsa_switch *ds, int port)
> >> reg |= MII_DUMB_FWDG_EN;
> >> core_writel(priv, reg, CORE_SWITCH_CTRL);
> >>
> >> + /* Configure Traffic Class to QoS mapping, allow each priority to map
> >> + * to a different queue number
> >> + */
> >> + reg = core_readl(priv, CORE_PORT_TC2_QOS_MAP_PORT(port));
> >> + for (i = 0; i < 8; i++)
> >> + reg |= i << (PRT_TO_QID_SHIFT * i);
> >
> > Hi Florian
> >
> > Rather than 8, would ds->num_tx_queues be more descriptive?
>
> I actually have a patch on top of this which defines a constant for the
> number of queues instead of open coding 8 here. Thanks!
Hi Florian
It sounds like it should be part of 3/4?
Andrew
^ permalink raw reply
* Re: [PATCH net-next 4/4] net: dsa: bcm_sf2: Configure IMP port TC2QOS mapping
From: Florian Fainelli @ 2017-09-02 17:57 UTC (permalink / raw)
To: Andrew Lunn; +Cc: netdev, davem, vivien.didelot, jiri, jhs, xiyou.wangcong
In-Reply-To: <20170902174753.GA8981@lunn.ch>
On 09/02/2017 10:47 AM, Andrew Lunn wrote:
> On Sat, Sep 02, 2017 at 09:32:08AM -0700, Florian Fainelli wrote:
>>
>>
>> On 09/02/2017 09:30 AM, Andrew Lunn wrote:
>>>> @@ -129,6 +130,14 @@ static void bcm_sf2_imp_setup(struct dsa_switch *ds, int port)
>>>> reg |= MII_DUMB_FWDG_EN;
>>>> core_writel(priv, reg, CORE_SWITCH_CTRL);
>>>>
>>>> + /* Configure Traffic Class to QoS mapping, allow each priority to map
>>>> + * to a different queue number
>>>> + */
>>>> + reg = core_readl(priv, CORE_PORT_TC2_QOS_MAP_PORT(port));
>>>> + for (i = 0; i < 8; i++)
>>>> + reg |= i << (PRT_TO_QID_SHIFT * i);
>>>
>>> Hi Florian
>>>
>>> Rather than 8, would ds->num_tx_queues be more descriptive?
>>
>> I actually have a patch on top of this which defines a constant for the
>> number of queues instead of open coding 8 here. Thanks!
>
> Hi Florian
>
> It sounds like it should be part of 3/4?
Right, let me re-submit with that change included. Thanks
--
Florian
^ permalink raw reply
* [PATCH net-next v2 0/4] net: dsa: Allow switch drivers to indicate number of TX queues
From: Florian Fainelli @ 2017-09-02 18:06 UTC (permalink / raw)
To: netdev
Cc: davem, andrew, vivien.didelot, jiri, jhs, xiyou.wangcong,
Florian Fainelli
Hi all,
This patch series extracts the parts of the patch set that are likely not to be
controversial and actually bringing multi-queue support to DSA-created network
devices.
With these patches, we can now use sch_multiq as documented under
Documentation/networking/multique.txt and let applications dedice the switch
port output queue they want to use. Currently only Broadcom tags utilize that
information.
Changes in v2:
- use a proper define for the number of TX queues in bcm_sf2.c (Andrew)
Changes from RFC:
- dropped the ability to configure RX queues since we don't do anything with
those just yet
- dropped the patches that dealt with binding the DSA slave network devices
queues with their master network devices queues this will be worked on
separately.
Florian Fainelli (4):
net: dsa: Allow switch drivers to indicate number of TX queues
net: dsa: tag_brcm: Set output queue from skb queue mapping
net: dsa: bcm_sf2: Advertise number of egress queues
net: dsa: bcm_sf2: Configure IMP port TC2QOS mapping
drivers/net/dsa/bcm_sf2.c | 14 +++++++++++++-
drivers/net/dsa/bcm_sf2_regs.h | 3 +++
include/net/dsa.h | 3 +++
net/dsa/slave.c | 8 ++++++--
net/dsa/tag_brcm.c | 3 ++-
5 files changed, 27 insertions(+), 4 deletions(-)
--
2.11.0
^ permalink raw reply
* [PATCH net-next v2 1/4] net: dsa: Allow switch drivers to indicate number of TX queues
From: Florian Fainelli @ 2017-09-02 18:06 UTC (permalink / raw)
To: netdev
Cc: davem, andrew, vivien.didelot, jiri, jhs, xiyou.wangcong,
Florian Fainelli
In-Reply-To: <20170902180609.23122-1-f.fainelli@gmail.com>
Let switch drivers indicate how many TX queues they support. Some
switches, such as Broadcom Starfighter 2 are designed with 8 egress
queues. Future changes will allow us to leverage the queue mapping and
direct the transmission towards a particular queue.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
include/net/dsa.h | 3 +++
net/dsa/slave.c | 8 ++++++--
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/include/net/dsa.h b/include/net/dsa.h
index 398ca8d70ccd..dd44d6ce1097 100644
--- a/include/net/dsa.h
+++ b/include/net/dsa.h
@@ -243,6 +243,9 @@ struct dsa_switch {
/* devlink used to represent this switch device */
struct devlink *devlink;
+ /* Number of switch port queues */
+ unsigned int num_tx_queues;
+
/* Dynamically allocated ports, keep last */
size_t num_ports;
struct dsa_port ports[];
diff --git a/net/dsa/slave.c b/net/dsa/slave.c
index 78e78a6e6833..2afa99506f8b 100644
--- a/net/dsa/slave.c
+++ b/net/dsa/slave.c
@@ -1259,8 +1259,12 @@ int dsa_slave_create(struct dsa_port *port, const char *name)
cpu_dp = ds->dst->cpu_dp;
master = cpu_dp->netdev;
- slave_dev = alloc_netdev(sizeof(struct dsa_slave_priv), name,
- NET_NAME_UNKNOWN, ether_setup);
+ if (!ds->num_tx_queues)
+ ds->num_tx_queues = 1;
+
+ slave_dev = alloc_netdev_mqs(sizeof(struct dsa_slave_priv), name,
+ NET_NAME_UNKNOWN, ether_setup,
+ ds->num_tx_queues, 1);
if (slave_dev == NULL)
return -ENOMEM;
--
2.11.0
^ permalink raw reply related
* [PATCH net-next v2 2/4] net: dsa: tag_brcm: Set output queue from skb queue mapping
From: Florian Fainelli @ 2017-09-02 18:06 UTC (permalink / raw)
To: netdev
Cc: davem, andrew, vivien.didelot, jiri, jhs, xiyou.wangcong,
Florian Fainelli
In-Reply-To: <20170902180609.23122-1-f.fainelli@gmail.com>
We originally used skb->priority but that was not quite correct as this
bitfield needs to contain the egress switch queue we intend to send this
SKB to.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
net/dsa/tag_brcm.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/net/dsa/tag_brcm.c b/net/dsa/tag_brcm.c
index de74c3f77818..dbb016434ace 100644
--- a/net/dsa/tag_brcm.c
+++ b/net/dsa/tag_brcm.c
@@ -62,6 +62,7 @@
static struct sk_buff *brcm_tag_xmit(struct sk_buff *skb, struct net_device *dev)
{
struct dsa_slave_priv *p = netdev_priv(dev);
+ u16 queue = skb_get_queue_mapping(skb);
u8 *brcm_tag;
if (skb_cow_head(skb, BRCM_TAG_LEN) < 0)
@@ -78,7 +79,7 @@ static struct sk_buff *brcm_tag_xmit(struct sk_buff *skb, struct net_device *dev
* deprecated
*/
brcm_tag[0] = (1 << BRCM_OPCODE_SHIFT) |
- ((skb->priority << BRCM_IG_TC_SHIFT) & BRCM_IG_TC_MASK);
+ ((queue & BRCM_IG_TC_MASK) << BRCM_IG_TC_SHIFT);
brcm_tag[1] = 0;
brcm_tag[2] = 0;
if (p->dp->index == 8)
--
2.11.0
^ permalink raw reply related
* [PATCH net-next v2 3/4] net: dsa: bcm_sf2: Advertise number of egress queues
From: Florian Fainelli @ 2017-09-02 18:06 UTC (permalink / raw)
To: netdev
Cc: davem, andrew, vivien.didelot, jiri, jhs, xiyou.wangcong,
Florian Fainelli
In-Reply-To: <20170902180609.23122-1-f.fainelli@gmail.com>
The switch supports 8 egress queues per port, so indicate that such that
net/dsa/slave.c::dsa_slave_create can allocate the right number of TX queues.
While at it use SF2_NUM_EGRESS_QUEUE as a define for the number of queues we
support.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/net/dsa/bcm_sf2.c | 5 ++++-
drivers/net/dsa/bcm_sf2_regs.h | 3 +++
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/net/dsa/bcm_sf2.c b/drivers/net/dsa/bcm_sf2.c
index 554fe2df9365..6b184bafa235 100644
--- a/drivers/net/dsa/bcm_sf2.c
+++ b/drivers/net/dsa/bcm_sf2.c
@@ -244,7 +244,7 @@ static int bcm_sf2_port_setup(struct dsa_switch *ds, int port,
* to a different queue number
*/
reg = core_readl(priv, CORE_PORT_TC2_QOS_MAP_PORT(port));
- for (i = 0; i < 8; i++)
+ for (i = 0; i < SF2_NUM_EGRESS_QUEUES; i++)
reg |= i << (PRT_TO_QID_SHIFT * i);
core_writel(priv, reg, CORE_PORT_TC2_QOS_MAP_PORT(port));
@@ -1151,6 +1151,9 @@ static int bcm_sf2_sw_probe(struct platform_device *pdev)
ds = dev->ds;
ds->ops = &bcm_sf2_ops;
+ /* Advertise the 8 egress queues */
+ ds->num_tx_queues = SF2_NUM_EGRESS_QUEUES;
+
dev_set_drvdata(&pdev->dev, priv);
spin_lock_init(&priv->indir_lock);
diff --git a/drivers/net/dsa/bcm_sf2_regs.h b/drivers/net/dsa/bcm_sf2_regs.h
index 26052450091e..49695fcc2ea8 100644
--- a/drivers/net/dsa/bcm_sf2_regs.h
+++ b/drivers/net/dsa/bcm_sf2_regs.h
@@ -401,4 +401,7 @@ enum bcm_sf2_reg_offs {
#define CFP_NUM_RULES 256
+/* Number of egress queues per port */
+#define SF2_NUM_EGRESS_QUEUES 8
+
#endif /* __BCM_SF2_REGS_H */
--
2.11.0
^ permalink raw reply related
* [PATCH net-next v2 4/4] net: dsa: bcm_sf2: Configure IMP port TC2QOS mapping
From: Florian Fainelli @ 2017-09-02 18:06 UTC (permalink / raw)
To: netdev
Cc: davem, andrew, vivien.didelot, jiri, jhs, xiyou.wangcong,
Florian Fainelli
In-Reply-To: <20170902180609.23122-1-f.fainelli@gmail.com>
Even though TC2QOS mapping is for switch egress queues, we need to
configure it correclty in order for the Broadcom tag ingress (CPU ->
switch) queue selection to work correctly since there is a 1:1 mapping
between switch egress queues and ingress queues.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/net/dsa/bcm_sf2.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/net/dsa/bcm_sf2.c b/drivers/net/dsa/bcm_sf2.c
index 6b184bafa235..d7b53d53c116 100644
--- a/drivers/net/dsa/bcm_sf2.c
+++ b/drivers/net/dsa/bcm_sf2.c
@@ -103,6 +103,7 @@ static void bcm_sf2_brcm_hdr_setup(struct bcm_sf2_priv *priv, int port)
static void bcm_sf2_imp_setup(struct dsa_switch *ds, int port)
{
struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
+ unsigned int i;
u32 reg, offset;
if (priv->type == BCM7445_DEVICE_ID)
@@ -129,6 +130,14 @@ static void bcm_sf2_imp_setup(struct dsa_switch *ds, int port)
reg |= MII_DUMB_FWDG_EN;
core_writel(priv, reg, CORE_SWITCH_CTRL);
+ /* Configure Traffic Class to QoS mapping, allow each priority to map
+ * to a different queue number
+ */
+ reg = core_readl(priv, CORE_PORT_TC2_QOS_MAP_PORT(port));
+ for (i = 0; i < SF2_NUM_EGRESS_QUEUES; i++)
+ reg |= i << (PRT_TO_QID_SHIFT * i);
+ core_writel(priv, reg, CORE_PORT_TC2_QOS_MAP_PORT(port));
+
bcm_sf2_brcm_hdr_setup(priv, port);
/* Force link status for IMP port */
--
2.11.0
^ permalink raw reply related
* Re: [RFC PATCH v1 0/5] TCP Wave
From: Natale Patriciello @ 2017-09-02 20:33 UTC (permalink / raw)
To: Eric Dumazet; +Cc: netdev, Ahmed Said, Francesco Zampognaro, Cesare Roseti
In-Reply-To: <1501306413.1876.4.camel@edumazet-glaptop3.roam.corp.google.com>
Hello all,
first of all, we would like to thank everyone that commented our
patches; we are working to include all the suggestions (we are at a good
point).
However, we have two questions:
1) How to retrieve information about each connection? Right now we used
debug messages, but we understand it isn't the best option. TCP Wave
users have other values to track rather than congestion window and slow
start threshold. It seems we have two alternatives: (a) use get_info,
that returns strings to be read with ss, (b) open a file under /proc/net
and write data to it, in the same way as tcp_probe do. With option (a)
it is necessary a poll from userspace (for instance, using watch), but
is subjected to delays and maybe not suitable for fast connections
(watch minimum interval is 100 ms). Option (b), toggled with a module
parameter, seems the more viable. Is that correct?
The second one is inline:
On 28/07/17 at 10:33pm, Eric Dumazet wrote:
> On Fri, 2017-07-28 at 21:59 +0200, Natale Patriciello wrote:
> > Hi,
[cut]
> > TCP Wave (TCPW) replaces the window-based transmission paradigm of the standard
> > TCP with a burst-based transmission, the ACK-clock scheduling with a
> > self-managed timer and the RTT-based congestion control loop with an Ack-based
> > Capacity and Congestion Estimation (ACCE) module. In non-technical words, it
> > sends data down the stack when its internal timer expires, and the timing of
> > the received ACKs contribute to updating this timer regularly.
>
> This patch series seems to have missed recent efforts in TCP stack,
> namely TCP pacing.
>
> commit 218af599fa635b107cfe10acf3249c4dfe5e4123 ("tcp: internal
> implementation for pacing") added a timer already to get fine grained
> packet xmits.
Thank you, Eric, for this suggestion; in fact, we had problems with our
implementation of the timer, and we would like to switch to the new
pacing timer entirely. However, a pacing approach is exactly the
opposite we would like to achieve: we want to send a burst of data
(let's say, ten segments) and then wait some amount of time. Do you
think that adding a new congestion control callback that returns the
number of segments to send when the timer expires (default to 1) and another
callback for retrieving the pacing time can be a sound strategy?
Thank you again, have a nice day.
Natale
^ permalink raw reply
* [patch net-next v2 00/21] mlxsw: Offloading GRE tunnels
From: Jiri Pirko @ 2017-09-02 21:49 UTC (permalink / raw)
To: netdev; +Cc: davem, petrm, idosch, mlxsw
From: Jiri Pirko <jiri@mellanox.com>
Petr says:
This patch series introduces to mlxsw driver support for offloading
IP-in-IP tunnels in general, and for (subset of) GRE in particular.
This patchset supports two ways of configuring GRE:
- So called "hierarchical configuration", where the GRE device has a bound
dummy device, which is in a different VRF. The VRF with host traffic is
called "overlay", the one with encapsulated traffic is called "underlay".
- So called "flat configuration", where the GRE device doesn't have a bound
device, and overlay and underlay are both in the same VRF (possibly the
default one).
Two routes are then interesting: a route that directs traffic to a GRE
device (which would typically be in overlay VRF, but could be in another
one), and a local route for the tunnel's local address (in underlay).
Handling of these two route types is then introduced as patches to support,
respectively, IPv4 and IPv6 encapsulation and IPv4 decapsulation.
The encap and decap routes then reference a loopback device, a new type of
RIF introduced by this patchset for the specific use of offloading tunnels.
The encap and decap code is abstract with respect to the particulars of
individual L3 tunnel types. This patchset introduces support for GRE
tunnels in particular.
Limitations:
- Each tunnel needs to have a different local address (within a given VRF).
When two tunnels are used that are in conflict, FIB abort is triggered
and the driver ceases offloading FIBs. Full handling of such
configurations needs special setup in the hardware, such that the tunnels
that share an address are dispatched correctly according to their key (or
lack thereof). That's currently not implemented, and to keep things
deterministic, the driver triggers FIB abort.
- A next hop that uses an incompletely-specified tunnel (e.g. such that are
used for LWT) is not offloaded, but doesn't trigger FIB abort like the
above. If such routes end up being in a de facto conflict with other
tunnels, then if there already is an offload for that address, the
traffic for the conflicting tunnel will end up mismatching the
configuration of the offloaded tunnel, and thus gets to slow path through
an error trap.
- GRE checksumming and sequence numbers are not supported and TTL and TOS
need to be set to inherit. Tunnels with a different configuration are not
offloaded and their traffic is trapping to slow path.
Note in particular that TOS of inherit is not the default configuration
and needs to be explicitly specified when the tunnel is created.
- The only feature that is not graciously handled is that if a change is
made to the tunnel, e.g. through "ip tunnel change", such changes are not
reflected in the driver. There is currently no notification mechanism for
these changes. Introduction of this mechanism and its leverage in the
driver will be subject of follow-up work. For now this limitation can be
worked around by removing and re-adding the encap route.
---
v1->v2:
-fix order of patch 5
Petr Machata (21):
mlxsw: reg: Update RITR to support loopback device
mlxsw: reg: Update RATR to support IP-in-IP tunnels
mlxsw: reg: Move enum mlxsw_reg_ratr_trap_id
mlxsw: reg: Add mlxsw_reg_ralue_act_ip2me_tun_pack()
mlxsw: reg: Add Routing Tunnel Decap Properties Register
mlxsw: reg: Extract mlxsw_reg_ritr_mac_pack()
mlxsw: reg: Give mlxsw_reg_ratr_pack a type parameter
mlxsw: spectrum_router: Publish mlxsw_sp_l3proto
mlxsw: spectrum_router: Add mlxsw_sp_ipip_ops
mlxsw: spectrum_router: Support FID-less RIFs
mlxsw: spectrum_router: Introduce loopback RIFs
mlxsw: spectrum_router: Extract mlxsw_sp_fi_is_gateway()
mlxsw: spectrum_router: Extract mlxsw_sp_rt6_is_gateway()
mlxsw: spectrum_router: Make nexthops typed
mlxsw: spectrum_router: Support IPv4 overlay encap
mlxsw: spectrum_router: Support IPv6 overlay encap
mlxsw: spectrum_router: Support IPv4 underlay decap
mlxsw: spectrum_router: Use existing decap route
mlxsw: spectrum: Register for IPIP_DECAP_ERROR trap
mlxsw: spectrum_router: Add loopback accessors
mlxsw: spectrum_router: Support GRE tunnels
drivers/net/ethernet/mellanox/mlxsw/Makefile | 4 +-
drivers/net/ethernet/mellanox/mlxsw/reg.h | 311 ++++++-
drivers/net/ethernet/mellanox/mlxsw/spectrum.c | 1 +
drivers/net/ethernet/mellanox/mlxsw/spectrum.h | 1 +
.../net/ethernet/mellanox/mlxsw/spectrum_ipip.c | 214 +++++
.../net/ethernet/mellanox/mlxsw/spectrum_ipip.h | 79 ++
.../net/ethernet/mellanox/mlxsw/spectrum_router.c | 947 +++++++++++++++++++--
.../net/ethernet/mellanox/mlxsw/spectrum_router.h | 28 +
drivers/net/ethernet/mellanox/mlxsw/trap.h | 1 +
9 files changed, 1485 insertions(+), 101 deletions(-)
create mode 100644 drivers/net/ethernet/mellanox/mlxsw/spectrum_ipip.c
create mode 100644 drivers/net/ethernet/mellanox/mlxsw/spectrum_ipip.h
--
2.9.3
^ permalink raw reply
* [patch net-next v2 01/21] mlxsw: reg: Update RITR to support loopback device
From: Jiri Pirko @ 2017-09-02 21:49 UTC (permalink / raw)
To: netdev; +Cc: davem, petrm, idosch, mlxsw
In-Reply-To: <20170902214929.2890-1-jiri@resnulli.us>
From: Petr Machata <petrm@mellanox.com>
Update the register so that loopback RIFs can be created and loopback
properties specified.
Signed-off-by: Petr Machata <petrm@mellanox.com>
Reviewed-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
---
drivers/net/ethernet/mellanox/mlxsw/reg.h | 88 +++++++++++++++++++++++++++++++
1 file changed, 88 insertions(+)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index 11e290c..8736f8492 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -3998,6 +3998,8 @@ enum mlxsw_reg_ritr_if_type {
MLXSW_REG_RITR_FID_IF,
/* Sub-port interface. */
MLXSW_REG_RITR_SP_IF,
+ /* Loopback Interface. */
+ MLXSW_REG_RITR_LOOPBACK_IF,
};
/* reg_ritr_type
@@ -4129,6 +4131,67 @@ MLXSW_ITEM32(reg, ritr, sp_if_system_port, 0x08, 0, 16);
*/
MLXSW_ITEM32(reg, ritr, sp_if_vid, 0x18, 0, 12);
+/* Loopback Interface */
+
+enum mlxsw_reg_ritr_loopback_protocol {
+ /* IPinIP IPv4 underlay Unicast */
+ MLXSW_REG_RITR_LOOPBACK_PROTOCOL_IPIP_IPV4,
+ /* IPinIP IPv6 underlay Unicast */
+ MLXSW_REG_RITR_LOOPBACK_PROTOCOL_IPIP_IPV6,
+};
+
+/* reg_ritr_loopback_protocol
+ * Access: RW
+ */
+MLXSW_ITEM32(reg, ritr, loopback_protocol, 0x08, 28, 4);
+
+enum mlxsw_reg_ritr_loopback_ipip_type {
+ /* Tunnel is IPinIP. */
+ MLXSW_REG_RITR_LOOPBACK_IPIP_TYPE_IP_IN_IP,
+ /* Tunnel is GRE, no key. */
+ MLXSW_REG_RITR_LOOPBACK_IPIP_TYPE_IP_IN_GRE_IN_IP,
+ /* Tunnel is GRE, with a key. */
+ MLXSW_REG_RITR_LOOPBACK_IPIP_TYPE_IP_IN_GRE_KEY_IN_IP,
+};
+
+/* reg_ritr_loopback_ipip_type
+ * Encapsulation type.
+ * Access: RW
+ */
+MLXSW_ITEM32(reg, ritr, loopback_ipip_type, 0x10, 24, 4);
+
+enum mlxsw_reg_ritr_loopback_ipip_options {
+ /* The key is defined by gre_key. */
+ MLXSW_REG_RITR_LOOPBACK_IPIP_OPTIONS_GRE_KEY_PRESET,
+};
+
+/* reg_ritr_loopback_ipip_options
+ * Access: RW
+ */
+MLXSW_ITEM32(reg, ritr, loopback_ipip_options, 0x10, 20, 4);
+
+/* reg_ritr_loopback_ipip_uvr
+ * Underlay Virtual Router ID.
+ * Range is 0..cap_max_virtual_routers-1.
+ * Reserved for Spectrum-2.
+ * Access: RW
+ */
+MLXSW_ITEM32(reg, ritr, loopback_ipip_uvr, 0x10, 0, 16);
+
+/* reg_ritr_loopback_ipip_usip*
+ * Encapsulation Underlay source IP.
+ * Access: RW
+ */
+MLXSW_ITEM_BUF(reg, ritr, loopback_ipip_usip6, 0x18, 16);
+MLXSW_ITEM32(reg, ritr, loopback_ipip_usip4, 0x24, 0, 32);
+
+/* reg_ritr_loopback_ipip_gre_key
+ * GRE Key.
+ * Reserved when ipip_type is not IP_IN_GRE_KEY_IN_IP.
+ * Access: RW
+ */
+MLXSW_ITEM32(reg, ritr, loopback_ipip_gre_key, 0x28, 0, 32);
+
/* Shared between ingress/egress */
enum mlxsw_reg_ritr_counter_set_type {
/* No Count. */
@@ -4219,6 +4282,31 @@ static inline void mlxsw_reg_ritr_pack(char *payload, bool enable,
mlxsw_reg_ritr_if_mac_memcpy_to(payload, mac);
}
+static inline void
+mlxsw_reg_ritr_loopback_ipip_common_pack(char *payload,
+ enum mlxsw_reg_ritr_loopback_ipip_type ipip_type,
+ enum mlxsw_reg_ritr_loopback_ipip_options options,
+ u16 uvr_id, u32 gre_key)
+{
+ mlxsw_reg_ritr_loopback_ipip_type_set(payload, ipip_type);
+ mlxsw_reg_ritr_loopback_ipip_options_set(payload, options);
+ mlxsw_reg_ritr_loopback_ipip_uvr_set(payload, uvr_id);
+ mlxsw_reg_ritr_loopback_ipip_gre_key_set(payload, gre_key);
+}
+
+static inline void
+mlxsw_reg_ritr_loopback_ipip4_pack(char *payload,
+ enum mlxsw_reg_ritr_loopback_ipip_type ipip_type,
+ enum mlxsw_reg_ritr_loopback_ipip_options options,
+ u16 uvr_id, u32 usip, u32 gre_key)
+{
+ mlxsw_reg_ritr_loopback_protocol_set(payload,
+ MLXSW_REG_RITR_LOOPBACK_PROTOCOL_IPIP_IPV4);
+ mlxsw_reg_ritr_loopback_ipip_common_pack(payload, ipip_type, options,
+ uvr_id, gre_key);
+ mlxsw_reg_ritr_loopback_ipip_usip4_set(payload, usip);
+}
+
/* RATR - Router Adjacency Table Register
* --------------------------------------
* The RATR register is used to configure the Router Adjacency (next-hop)
--
2.9.3
^ permalink raw reply related
* [patch net-next v2 02/21] mlxsw: reg: Update RATR to support IP-in-IP tunnels
From: Jiri Pirko @ 2017-09-02 21:49 UTC (permalink / raw)
To: netdev; +Cc: davem, petrm, idosch, mlxsw
In-Reply-To: <20170902214929.2890-1-jiri@resnulli.us>
From: Petr Machata <petrm@mellanox.com>
So far, adjacencies have always been of type Ethernet (with value of 0),
and thus there was no need to explicitly support RATR type. However to
support IP-in-IP adjacencies, this type and a suite of IP-in-IP-specific
attributes need to be added.
Signed-off-by: Petr Machata <petrm@mellanox.com>
Reviewed-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
---
drivers/net/ethernet/mellanox/mlxsw/reg.h | 66 +++++++++++++++++++++++++++++++
1 file changed, 66 insertions(+)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index 8736f8492..6a7757f 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -4362,6 +4362,38 @@ MLXSW_ITEM32(reg, ratr, v, 0x00, 24, 1);
*/
MLXSW_ITEM32(reg, ratr, a, 0x00, 16, 1);
+enum mlxsw_reg_ratr_type {
+ /* Ethernet */
+ MLXSW_REG_RATR_TYPE_ETHERNET,
+ /* IPoIB Unicast without GRH.
+ * Reserved for Spectrum.
+ */
+ MLXSW_REG_RATR_TYPE_IPOIB_UC,
+ /* IPoIB Unicast with GRH. Supported only in table 0 (Ethernet unicast
+ * adjacency).
+ * Reserved for Spectrum.
+ */
+ MLXSW_REG_RATR_TYPE_IPOIB_UC_W_GRH,
+ /* IPoIB Multicast.
+ * Reserved for Spectrum.
+ */
+ MLXSW_REG_RATR_TYPE_IPOIB_MC,
+ /* MPLS.
+ * Reserved for SwitchX/-2.
+ */
+ MLXSW_REG_RATR_TYPE_MPLS,
+ /* IPinIP Encap.
+ * Reserved for SwitchX/-2.
+ */
+ MLXSW_REG_RATR_TYPE_IPIP,
+};
+
+/* reg_ratr_type
+ * Adjacency entry type.
+ * Access: RW
+ */
+MLXSW_ITEM32(reg, ratr, type, 0x04, 28, 4);
+
/* reg_ratr_adjacency_index_low
* Bits 15:0 of index into the adjacency table.
* For SwitchX and SwitchX-2, the adjacency table is linear and
@@ -4416,6 +4448,34 @@ MLXSW_ITEM32(reg, ratr, trap_id, 0x0C, 0, 8);
*/
MLXSW_ITEM_BUF(reg, ratr, eth_destination_mac, 0x12, 6);
+enum mlxsw_reg_ratr_ipip_type {
+ /* IPv4, address set by mlxsw_reg_ratr_ipip_ipv4_udip. */
+ MLXSW_REG_RATR_IPIP_TYPE_IPV4,
+ /* IPv6, address set by mlxsw_reg_ratr_ipip_ipv6_ptr. */
+ MLXSW_REG_RATR_IPIP_TYPE_IPV6,
+};
+
+/* reg_ratr_ipip_type
+ * Underlay destination ip type.
+ * Note: the type field must match the protocol of the router interface.
+ * Access: RW
+ */
+MLXSW_ITEM32(reg, ratr, ipip_type, 0x10, 16, 4);
+
+/* reg_ratr_ipip_ipv4_udip
+ * Underlay ipv4 dip.
+ * Reserved when ipip_type is IPv6.
+ * Access: RW
+ */
+MLXSW_ITEM32(reg, ratr, ipip_ipv4_udip, 0x18, 0, 32);
+
+/* reg_ratr_ipip_ipv6_ptr
+ * Pointer to IPv6 underlay destination ip address.
+ * For Spectrum: Pointer to KVD linear space.
+ * Access: RW
+ */
+MLXSW_ITEM32(reg, ratr, ipip_ipv6_ptr, 0x1C, 0, 24);
+
static inline void
mlxsw_reg_ratr_pack(char *payload,
enum mlxsw_reg_ratr_op op, bool valid,
@@ -4435,6 +4495,12 @@ static inline void mlxsw_reg_ratr_eth_entry_pack(char *payload,
mlxsw_reg_ratr_eth_destination_mac_memcpy_to(payload, dest_mac);
}
+static inline void mlxsw_reg_ratr_ipip4_entry_pack(char *payload, u32 ipv4_udip)
+{
+ mlxsw_reg_ratr_ipip_type_set(payload, MLXSW_REG_RATR_IPIP_TYPE_IPV4);
+ mlxsw_reg_ratr_ipip_ipv4_udip_set(payload, ipv4_udip);
+}
+
/* RICNT - Router Interface Counter Register
* -----------------------------------------
* The RICNT register retrieves per port performance counters
--
2.9.3
^ permalink raw reply related
* [patch net-next v2 03/21] mlxsw: reg: Move enum mlxsw_reg_ratr_trap_id
From: Jiri Pirko @ 2017-09-02 21:49 UTC (permalink / raw)
To: netdev; +Cc: davem, petrm, idosch, mlxsw
In-Reply-To: <20170902214929.2890-1-jiri@resnulli.us>
From: Petr Machata <petrm@mellanox.com>
This enum is used with reg_ratr_trap_id, so move it next to the register
definition.
While at it, drop the enumerator initializers.
Signed-off-by: Petr Machata <petrm@mellanox.com>
Reviewed-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
---
drivers/net/ethernet/mellanox/mlxsw/reg.h | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index 6a7757f..bf936b6 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -4423,17 +4423,17 @@ enum mlxsw_reg_ratr_trap_action {
*/
MLXSW_ITEM32(reg, ratr, trap_action, 0x0C, 28, 4);
-enum mlxsw_reg_ratr_trap_id {
- MLXSW_REG_RATR_TRAP_ID_RTR_EGRESS0 = 0,
- MLXSW_REG_RATR_TRAP_ID_RTR_EGRESS1 = 1,
-};
-
/* reg_ratr_adjacency_index_high
* Bits 23:16 of the adjacency_index.
* Access: Index
*/
MLXSW_ITEM32(reg, ratr, adjacency_index_high, 0x0C, 16, 8);
+enum mlxsw_reg_ratr_trap_id {
+ MLXSW_REG_RATR_TRAP_ID_RTR_EGRESS0,
+ MLXSW_REG_RATR_TRAP_ID_RTR_EGRESS1,
+};
+
/* reg_ratr_trap_id
* Trap ID to be reported to CPU.
* Trap-ID is RTR_EGRESS0 or RTR_EGRESS1.
--
2.9.3
^ permalink raw reply related
* [patch net-next v2 04/21] mlxsw: reg: Add mlxsw_reg_ralue_act_ip2me_tun_pack()
From: Jiri Pirko @ 2017-09-02 21:49 UTC (permalink / raw)
To: netdev; +Cc: davem, petrm, idosch, mlxsw
In-Reply-To: <20170902214929.2890-1-jiri@resnulli.us>
From: Petr Machata <petrm@mellanox.com>
To implement IP-in-IP decapsulation, Spectrum uses LPM entries of type
IP2ME with tunnel validity bit and tunnel pointer set. The necessary
register fields are already available, so add a function to pack the
RALUE as appropriate.
Signed-off-by: Petr Machata <petrm@mellanox.com>
Reviewed-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
---
drivers/net/ethernet/mellanox/mlxsw/reg.h | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index bf936b6..24296cf 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -5054,6 +5054,15 @@ mlxsw_reg_ralue_act_ip2me_pack(char *payload)
MLXSW_REG_RALUE_ACTION_TYPE_IP2ME);
}
+static inline void
+mlxsw_reg_ralue_act_ip2me_tun_pack(char *payload, u32 tunnel_ptr)
+{
+ mlxsw_reg_ralue_action_type_set(payload,
+ MLXSW_REG_RALUE_ACTION_TYPE_IP2ME);
+ mlxsw_reg_ralue_ip2me_v_set(payload, 1);
+ mlxsw_reg_ralue_ip2me_tunnel_ptr_set(payload, tunnel_ptr);
+}
+
/* RAUHT - Router Algorithmic LPM Unicast Host Table Register
* ----------------------------------------------------------
* The RAUHT register is used to configure and query the Unicast Host table in
--
2.9.3
^ permalink raw reply related
* [patch net-next v2 05/21] mlxsw: reg: Add Routing Tunnel Decap Properties Register
From: Jiri Pirko @ 2017-09-02 21:49 UTC (permalink / raw)
To: netdev; +Cc: davem, petrm, idosch, mlxsw
In-Reply-To: <20170902214929.2890-1-jiri@resnulli.us>
From: Petr Machata <petrm@mellanox.com>
The RTDP register is used for configuring the tunnel decap properties of
NVE and IPinIP.
Signed-off-by: Petr Machata <petrm@mellanox.com>
Reviewed-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
---
drivers/net/ethernet/mellanox/mlxsw/reg.h | 129 ++++++++++++++++++++++++++++++
1 file changed, 129 insertions(+)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index 24296cf..a6eb96f 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -5,6 +5,7 @@
* Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
* Copyright (c) 2015-2017 Jiri Pirko <jiri@mellanox.com>
* Copyright (c) 2016 Yotam Gigi <yotamg@mellanox.com>
+ * Copyright (c) 2017 Petr Machata <petrm@mellanox.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -5463,6 +5464,133 @@ static inline void mlxsw_reg_rauhtd_ent_ipv6_unpack(char *payload,
mlxsw_reg_rauhtd_ipv6_ent_dip_memcpy_from(payload, rec_index, p_dip);
}
+/* RTDP - Routing Tunnel Decap Properties Register
+ * -----------------------------------------------
+ * The RTDP register is used for configuring the tunnel decap properties of NVE
+ * and IPinIP.
+ */
+#define MLXSW_REG_RTDP_ID 0x8020
+#define MLXSW_REG_RTDP_LEN 0x44
+
+MLXSW_REG_DEFINE(rtdp, MLXSW_REG_RTDP_ID, MLXSW_REG_RTDP_LEN);
+
+enum mlxsw_reg_rtdp_type {
+ MLXSW_REG_RTDP_TYPE_NVE,
+ MLXSW_REG_RTDP_TYPE_IPIP,
+};
+
+/* reg_rtdp_type
+ * Type of the RTDP entry as per enum mlxsw_reg_rtdp_type.
+ * Access: RW
+ */
+MLXSW_ITEM32(reg, rtdp, type, 0x00, 28, 4);
+
+/* reg_rtdp_tunnel_index
+ * Index to the Decap entry.
+ * For Spectrum, Index to KVD Linear.
+ * Access: Index
+ */
+MLXSW_ITEM32(reg, rtdp, tunnel_index, 0x00, 0, 24);
+
+/* IPinIP */
+
+/* reg_rtdp_ipip_irif
+ * Ingress Router Interface for the overlay router
+ * Access: RW
+ */
+MLXSW_ITEM32(reg, rtdp, ipip_irif, 0x04, 16, 16);
+
+enum mlxsw_reg_rtdp_ipip_sip_check {
+ /* No sip checks. */
+ MLXSW_REG_RTDP_IPIP_SIP_CHECK_NO,
+ /* Filter packet if underlay is not IPv4 or if underlay SIP does not
+ * equal ipv4_usip.
+ */
+ MLXSW_REG_RTDP_IPIP_SIP_CHECK_FILTER_IPV4,
+ /* Filter packet if underlay is not IPv6 or if underlay SIP does not
+ * equal ipv6_usip.
+ */
+ MLXSW_REG_RTDP_IPIP_SIP_CHECK_FILTER_IPV6 = 3,
+};
+
+/* reg_rtdp_ipip_sip_check
+ * SIP check to perform. If decapsulation failed due to these configurations
+ * then trap_id is IPIP_DECAP_ERROR.
+ * Access: RW
+ */
+MLXSW_ITEM32(reg, rtdp, ipip_sip_check, 0x04, 0, 3);
+
+/* If set, allow decapsulation of IPinIP (without GRE). */
+#define MLXSW_REG_RTDP_IPIP_TYPE_CHECK_ALLOW_IPIP BIT(0)
+/* If set, allow decapsulation of IPinGREinIP without a key. */
+#define MLXSW_REG_RTDP_IPIP_TYPE_CHECK_ALLOW_GRE BIT(1)
+/* If set, allow decapsulation of IPinGREinIP with a key. */
+#define MLXSW_REG_RTDP_IPIP_TYPE_CHECK_ALLOW_GRE_KEY BIT(2)
+
+/* reg_rtdp_ipip_type_check
+ * Flags as per MLXSW_REG_RTDP_IPIP_TYPE_CHECK_*. If decapsulation failed due to
+ * these configurations then trap_id is IPIP_DECAP_ERROR.
+ * Access: RW
+ */
+MLXSW_ITEM32(reg, rtdp, ipip_type_check, 0x08, 24, 3);
+
+/* reg_rtdp_ipip_gre_key_check
+ * Whether GRE key should be checked. When check is enabled:
+ * - A packet received as IPinIP (without GRE) will always pass.
+ * - A packet received as IPinGREinIP without a key will not pass the check.
+ * - A packet received as IPinGREinIP with a key will pass the check only if the
+ * key in the packet is equal to expected_gre_key.
+ * If decapsulation failed due to GRE key then trap_id is IPIP_DECAP_ERROR.
+ * Access: RW
+ */
+MLXSW_ITEM32(reg, rtdp, ipip_gre_key_check, 0x08, 23, 1);
+
+/* reg_rtdp_ipip_ipv4_usip
+ * Underlay IPv4 address for ipv4 source address check.
+ * Reserved when sip_check is not '1'.
+ * Access: RW
+ */
+MLXSW_ITEM32(reg, rtdp, ipip_ipv4_usip, 0x0C, 0, 32);
+
+/* reg_rtdp_ipip_ipv6_usip_ptr
+ * This field is valid when sip_check is "sipv6 check explicitly". This is a
+ * pointer to the IPv6 DIP which is configured by RIPS. For Spectrum, the index
+ * is to the KVD linear.
+ * Reserved when sip_check is not MLXSW_REG_RTDP_IPIP_SIP_CHECK_FILTER_IPV6.
+ * Access: RW
+ */
+MLXSW_ITEM32(reg, rtdp, ipip_ipv6_usip_ptr, 0x10, 0, 24);
+
+/* reg_rtdp_ipip_expected_gre_key
+ * GRE key for checking.
+ * Reserved when gre_key_check is '0'.
+ * Access: RW
+ */
+MLXSW_ITEM32(reg, rtdp, ipip_expected_gre_key, 0x14, 0, 32);
+
+static inline void mlxsw_reg_rtdp_pack(char *payload,
+ enum mlxsw_reg_rtdp_type type,
+ u32 tunnel_index)
+{
+ MLXSW_REG_ZERO(rtdp, payload);
+ mlxsw_reg_rtdp_type_set(payload, type);
+ mlxsw_reg_rtdp_tunnel_index_set(payload, tunnel_index);
+}
+
+static inline void
+mlxsw_reg_rtdp_ipip4_pack(char *payload, u16 irif,
+ enum mlxsw_reg_rtdp_ipip_sip_check sip_check,
+ unsigned int type_check, bool gre_key_check,
+ u32 ipv4_usip, u32 expected_gre_key)
+{
+ mlxsw_reg_rtdp_ipip_irif_set(payload, irif);
+ mlxsw_reg_rtdp_ipip_sip_check_set(payload, sip_check);
+ mlxsw_reg_rtdp_ipip_type_check_set(payload, type_check);
+ mlxsw_reg_rtdp_ipip_gre_key_check_set(payload, gre_key_check);
+ mlxsw_reg_rtdp_ipip_ipv4_usip_set(payload, ipv4_usip);
+ mlxsw_reg_rtdp_ipip_expected_gre_key_set(payload, expected_gre_key);
+}
+
/* MFCR - Management Fan Control Register
* --------------------------------------
* This register controls the settings of the Fan Speed PWM mechanism.
@@ -6724,6 +6852,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
MLXSW_REG(rgcr),
MLXSW_REG(ritr),
MLXSW_REG(ratr),
+ MLXSW_REG(rtdp),
MLXSW_REG(ricnt),
MLXSW_REG(ralta),
MLXSW_REG(ralst),
--
2.9.3
^ permalink raw reply related
* [patch net-next v2 06/21] mlxsw: reg: Extract mlxsw_reg_ritr_mac_pack()
From: Jiri Pirko @ 2017-09-02 21:49 UTC (permalink / raw)
To: netdev; +Cc: davem, petrm, idosch, mlxsw
In-Reply-To: <20170902214929.2890-1-jiri@resnulli.us>
From: Petr Machata <petrm@mellanox.com>
Unlike other interface types, loopback RIFs do not have MAC address. So
drop the corresponding argument from mlxsw_reg_ritr_pack() and move it
to a new function. Call that from callers of mlxsw_reg_ritr_pack.
Signed-off-by: Petr Machata <petrm@mellanox.com>
Reviewed-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
---
drivers/net/ethernet/mellanox/mlxsw/reg.h | 7 +++++--
drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c | 7 ++++---
2 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index a6eb96f..d80cf9b 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -4263,8 +4263,7 @@ static inline void mlxsw_reg_ritr_sp_if_pack(char *payload, bool lag,
static inline void mlxsw_reg_ritr_pack(char *payload, bool enable,
enum mlxsw_reg_ritr_if_type type,
- u16 rif, u16 vr_id, u16 mtu,
- const char *mac)
+ u16 rif, u16 vr_id, u16 mtu)
{
bool op = enable ? MLXSW_REG_RITR_RIF_CREATE : MLXSW_REG_RITR_RIF_DEL;
@@ -4280,6 +4279,10 @@ static inline void mlxsw_reg_ritr_pack(char *payload, bool enable,
mlxsw_reg_ritr_lb_en_set(payload, 1);
mlxsw_reg_ritr_virtual_router_set(payload, vr_id);
mlxsw_reg_ritr_mtu_set(payload, mtu);
+}
+
+static inline void mlxsw_reg_ritr_mac_pack(char *payload, const char *mac)
+{
mlxsw_reg_ritr_if_mac_memcpy_to(payload, mac);
}
diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c
index de15eac..3ddfbe3 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c
@@ -4955,8 +4955,8 @@ static int mlxsw_sp_rif_subport_op(struct mlxsw_sp_rif *rif, bool enable)
rif_subport = mlxsw_sp_rif_subport_rif(rif);
mlxsw_reg_ritr_pack(ritr_pl, enable, MLXSW_REG_RITR_SP_IF,
- rif->rif_index, rif->vr_id, rif->dev->mtu,
- rif->dev->dev_addr);
+ rif->rif_index, rif->vr_id, rif->dev->mtu);
+ mlxsw_reg_ritr_mac_pack(ritr_pl, rif->dev->dev_addr);
mlxsw_reg_ritr_sp_if_pack(ritr_pl, rif_subport->lag,
rif_subport->lag ? rif_subport->lag_id :
rif_subport->system_port,
@@ -4998,7 +4998,8 @@ static int mlxsw_sp_rif_vlan_fid_op(struct mlxsw_sp_rif *rif,
char ritr_pl[MLXSW_REG_RITR_LEN];
mlxsw_reg_ritr_pack(ritr_pl, enable, type, rif->rif_index, rif->vr_id,
- rif->dev->mtu, rif->dev->dev_addr);
+ rif->dev->mtu);
+ mlxsw_reg_ritr_mac_pack(ritr_pl, rif->dev->dev_addr);
mlxsw_reg_ritr_fid_set(ritr_pl, type, vid_fid);
return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
--
2.9.3
^ permalink raw reply related
* [patch net-next v2 07/21] mlxsw: reg: Give mlxsw_reg_ratr_pack a type parameter
From: Jiri Pirko @ 2017-09-02 21:49 UTC (permalink / raw)
To: netdev; +Cc: davem, petrm, idosch, mlxsw
In-Reply-To: <20170902214929.2890-1-jiri@resnulli.us>
From: Petr Machata <petrm@mellanox.com>
To support IPIP, the driver needs to be able to construct an IPIP
adjacency. Change mlxsw_reg_ratr_pack to take an adjacency type as an
argument. Adjust the one existing caller.
Signed-off-by: Petr Machata <petrm@mellanox.com>
Reviewed-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
---
drivers/net/ethernet/mellanox/mlxsw/reg.h | 2 ++
drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c | 3 ++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index d80cf9b..cc27c5d 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -4483,11 +4483,13 @@ MLXSW_ITEM32(reg, ratr, ipip_ipv6_ptr, 0x1C, 0, 24);
static inline void
mlxsw_reg_ratr_pack(char *payload,
enum mlxsw_reg_ratr_op op, bool valid,
+ enum mlxsw_reg_ratr_type type,
u32 adjacency_index, u16 egress_rif)
{
MLXSW_REG_ZERO(ratr, payload);
mlxsw_reg_ratr_op_set(payload, op);
mlxsw_reg_ratr_v_set(payload, valid);
+ mlxsw_reg_ratr_type_set(payload, type);
mlxsw_reg_ratr_adjacency_index_low_set(payload, adjacency_index);
mlxsw_reg_ratr_adjacency_index_high_set(payload, adjacency_index >> 16);
mlxsw_reg_ratr_egress_router_interface_set(payload, egress_rif);
diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c
index 3ddfbe3..4e47d45 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c
@@ -1928,7 +1928,8 @@ static int mlxsw_sp_nexthop_mac_update(struct mlxsw_sp *mlxsw_sp, u32 adj_index,
char ratr_pl[MLXSW_REG_RATR_LEN];
mlxsw_reg_ratr_pack(ratr_pl, MLXSW_REG_RATR_OP_WRITE_WRITE_ENTRY,
- true, adj_index, neigh_entry->rif);
+ true, MLXSW_REG_RATR_TYPE_ETHERNET,
+ adj_index, neigh_entry->rif);
mlxsw_reg_ratr_eth_entry_pack(ratr_pl, neigh_entry->ha);
return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ratr), ratr_pl);
}
--
2.9.3
^ permalink raw reply related
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