* Re: [RFC perf,bpf 1/5] perf, bpf: Introduce PERF_RECORD_BPF_EVENT
From: Peter Zijlstra @ 2018-11-07 8:40 UTC (permalink / raw)
To: Song Liu; +Cc: netdev, linux-kernel, kernel-team, ast, daniel, acme
In-Reply-To: <20181106205246.567448-2-songliubraving@fb.com>
On Tue, Nov 06, 2018 at 12:52:42PM -0800, Song Liu wrote:
> For better performance analysis of BPF programs, this patch introduces
> PERF_RECORD_BPF_EVENT, a new perf_event_type that exposes BPF program
> load/unload information to user space.
>
> /*
> * Record different types of bpf events:
> * enum perf_bpf_event_type {
> * PERF_BPF_EVENT_UNKNOWN = 0,
> * PERF_BPF_EVENT_PROG_LOAD = 1,
> * PERF_BPF_EVENT_PROG_UNLOAD = 2,
> * };
> *
> * struct {
> * struct perf_event_header header;
> * u16 type;
> * u16 flags;
> * u32 id; // prog_id or map_id
> * };
> */
> PERF_RECORD_BPF_EVENT = 17,
>
> PERF_RECORD_BPF_EVENT contains minimal information about the BPF program.
> Perf utility (or other user space tools) should listen to this event and
> fetch more details about the event via BPF syscalls
> (BPF_PROG_GET_FD_BY_ID, BPF_OBJ_GET_INFO_BY_FD, etc.).
Why !? You're failing to explain why it cannot provide the full
information there.
^ permalink raw reply
* [PATCH net-next 0/3] net: systemport: Unmap queues upon DSA unregister event
From: Florian Fainelli @ 2018-11-06 23:15 UTC (permalink / raw)
To: netdev; +Cc: davem, andrew, vivien.didelot, Florian Fainelli
Hi all,
This patch series fixes the unbinding/binding of the bcm_sf2 switch
driver along with bcmsysport which monitors the switch port queues.
Because the driver was not processing the DSA_PORT_UNREGISTER event, we
would not be unmapping switch port/queues, which could cause incorrect
decisions to be made by the HW (e.g: queue always back-pressured).
Florian Fainelli (3):
net: dsa: bcm_sf2: Turn on PHY to allow successful registration
net: systemport: Simplify queue mapping logic
net: systemport: Unmap queues upon DSA unregister event
drivers/net/dsa/bcm_sf2.c | 4 ++
drivers/net/ethernet/broadcom/bcmsysport.c | 71 ++++++++++++++++++----
drivers/net/ethernet/broadcom/bcmsysport.h | 1 -
3 files changed, 62 insertions(+), 14 deletions(-)
--
2.17.1
^ permalink raw reply
* [PATCH net-next 1/3] net: dsa: bcm_sf2: Turn on PHY to allow successful registration
From: Florian Fainelli @ 2018-11-06 23:15 UTC (permalink / raw)
To: netdev; +Cc: davem, andrew, vivien.didelot, Florian Fainelli
In-Reply-To: <20181106231518.16314-1-f.fainelli@gmail.com>
We are binding to the PHY using the SF2 slave MDIO bus that we create,
binding involves reading the PHY's MII_PHYSID1/2 which won't be possible
if the PHY is turned off. Temporarily turn it on/off for the bus probing
to succeeed. This fixes unbind/bind problems where the port connecting
to that PHY would be in error since it could not connect to it.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/net/dsa/bcm_sf2.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/net/dsa/bcm_sf2.c b/drivers/net/dsa/bcm_sf2.c
index 2eb68769562c..2c664aac1e7b 100644
--- a/drivers/net/dsa/bcm_sf2.c
+++ b/drivers/net/dsa/bcm_sf2.c
@@ -1090,12 +1090,16 @@ static int bcm_sf2_sw_probe(struct platform_device *pdev)
return ret;
}
+ bcm_sf2_gphy_enable_set(priv->dev->ds, true);
+
ret = bcm_sf2_mdio_register(ds);
if (ret) {
pr_err("failed to register MDIO bus\n");
return ret;
}
+ bcm_sf2_gphy_enable_set(priv->dev->ds, false);
+
ret = bcm_sf2_cfp_rst(priv);
if (ret) {
pr_err("failed to reset CFP\n");
--
2.17.1
^ permalink raw reply related
* [PATCH net-next 2/3] net: systemport: Simplify queue mapping logic
From: Florian Fainelli @ 2018-11-06 23:15 UTC (permalink / raw)
To: netdev; +Cc: davem, andrew, vivien.didelot, Florian Fainelli
In-Reply-To: <20181106231518.16314-1-f.fainelli@gmail.com>
The use of a bitmap speeds up the finding of the first available queue
to which we could start establishing the mapping for, but we still have
to loop over all slave network devices to set them up. Simplify the
logic to have a single loop, and use the fact that a correctly
configured ring has inspect set to true. This will make things simpler
to unwind during device unregistration.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/net/ethernet/broadcom/bcmsysport.c | 17 +++++++++--------
drivers/net/ethernet/broadcom/bcmsysport.h | 1 -
2 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/net/ethernet/broadcom/bcmsysport.c b/drivers/net/ethernet/broadcom/bcmsysport.c
index 0e2d99c737e3..f620c647bb86 100644
--- a/drivers/net/ethernet/broadcom/bcmsysport.c
+++ b/drivers/net/ethernet/broadcom/bcmsysport.c
@@ -2312,7 +2312,7 @@ static int bcm_sysport_map_queues(struct notifier_block *nb,
struct bcm_sysport_priv *priv;
struct net_device *slave_dev;
unsigned int num_tx_queues;
- unsigned int q, start, port;
+ unsigned int q, qp, port;
struct net_device *dev;
priv = container_of(nb, struct bcm_sysport_priv, dsa_notifier);
@@ -2351,20 +2351,21 @@ static int bcm_sysport_map_queues(struct notifier_block *nb,
priv->per_port_num_tx_queues = num_tx_queues;
- start = find_first_zero_bit(&priv->queue_bitmap, dev->num_tx_queues);
- for (q = 0; q < num_tx_queues; q++) {
- ring = &priv->tx_rings[q + start];
+ for (q = 0, qp = 0; q < dev->num_tx_queues && qp < num_tx_queues;
+ q++) {
+ ring = &priv->tx_rings[q];
+
+ if (ring->inspect)
+ continue;
/* Just remember the mapping actual programming done
* during bcm_sysport_init_tx_ring
*/
- ring->switch_queue = q;
+ ring->switch_queue = qp;
ring->switch_port = port;
ring->inspect = true;
priv->ring_map[q + port * num_tx_queues] = ring;
-
- /* Set all queues as being used now */
- set_bit(q + start, &priv->queue_bitmap);
+ qp++;
}
return 0;
diff --git a/drivers/net/ethernet/broadcom/bcmsysport.h b/drivers/net/ethernet/broadcom/bcmsysport.h
index a7a230884a87..94d64b203098 100644
--- a/drivers/net/ethernet/broadcom/bcmsysport.h
+++ b/drivers/net/ethernet/broadcom/bcmsysport.h
@@ -795,7 +795,6 @@ struct bcm_sysport_priv {
/* map information between switch port queues and local queues */
struct notifier_block dsa_notifier;
unsigned int per_port_num_tx_queues;
- unsigned long queue_bitmap;
struct bcm_sysport_tx_ring *ring_map[DSA_MAX_PORTS * 8];
};
--
2.17.1
^ permalink raw reply related
* [PATCH net-next 3/3] net: systemport: Unmap queues upon DSA unregister event
From: Florian Fainelli @ 2018-11-06 23:15 UTC (permalink / raw)
To: netdev; +Cc: davem, andrew, vivien.didelot, Florian Fainelli
In-Reply-To: <20181106231518.16314-1-f.fainelli@gmail.com>
Binding and unbinding the switch driver which creates the DSA slave
network devices for which we set-up inspection would lead to
undesireable effects since we were not clearing the port/queue mapping
to the SYSTEMPORT TX queue.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/net/ethernet/broadcom/bcmsysport.c | 56 +++++++++++++++++++---
1 file changed, 50 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/broadcom/bcmsysport.c b/drivers/net/ethernet/broadcom/bcmsysport.c
index f620c647bb86..f8f0a027b3ae 100644
--- a/drivers/net/ethernet/broadcom/bcmsysport.c
+++ b/drivers/net/ethernet/broadcom/bcmsysport.c
@@ -2371,17 +2371,61 @@ static int bcm_sysport_map_queues(struct notifier_block *nb,
return 0;
}
+static int bcm_sysport_unmap_queues(struct notifier_block *nb,
+ struct dsa_notifier_register_info *info)
+{
+ struct bcm_sysport_tx_ring *ring;
+ struct bcm_sysport_priv *priv;
+ struct net_device *slave_dev;
+ unsigned int num_tx_queues;
+ struct net_device *dev;
+ unsigned int q, port;
+
+ priv = container_of(nb, struct bcm_sysport_priv, dsa_notifier);
+ if (priv->netdev != info->master)
+ return 0;
+
+ dev = info->master;
+
+ if (dev->netdev_ops != &bcm_sysport_netdev_ops)
+ return 0;
+
+ port = info->port_number;
+ slave_dev = info->info.dev;
+
+ num_tx_queues = slave_dev->real_num_tx_queues;
+
+ for (q = 0; q < dev->num_tx_queues; q++) {
+ ring = &priv->tx_rings[q];
+
+ if (ring->switch_port != port)
+ continue;
+
+ if (!ring->inspect)
+ continue;
+
+ ring->inspect = false;
+ priv->ring_map[q + port * num_tx_queues] = NULL;
+ }
+
+ return 0;
+}
+
static int bcm_sysport_dsa_notifier(struct notifier_block *nb,
unsigned long event, void *ptr)
{
- struct dsa_notifier_register_info *info;
+ int ret = NOTIFY_DONE;
- if (event != DSA_PORT_REGISTER)
- return NOTIFY_DONE;
-
- info = ptr;
+ switch (event) {
+ case DSA_PORT_REGISTER:
+ ret = bcm_sysport_map_queues(nb, ptr);
+ break;
+ case DSA_PORT_UNREGISTER:
+ ret = bcm_sysport_unmap_queues(nb, ptr);
+ break;
+ }
- return notifier_from_errno(bcm_sysport_map_queues(nb, info));
+ return notifier_from_errno(ret);
}
#define REV_FMT "v%2x.%02x"
--
2.17.1
^ permalink raw reply related
* Re: [PATCH net-next 00/11] ICMP error handling for UDP tunnels
From: David Miller @ 2018-11-06 23:24 UTC (permalink / raw)
To: sbrivio; +Cc: sd, lucien.xin, netdev
In-Reply-To: <cover.1541533786.git.sbrivio@redhat.com>
From: Stefano Brivio <sbrivio@redhat.com>
Date: Tue, 6 Nov 2018 22:38:56 +0100
> This series introduces ICMP error handling for UDP tunnels and
> encapsulations and related selftests. We need to handle ICMP errors to
> support PMTU discovery and route redirection -- this support is entirely
> missing right now:
>
> - patch 1/11 adds a socket lookup for UDP tunnels that use, by design,
> the same destination port on both endpoints -- i.e. VxLAN and GENEVE
> - patches 2/11 to 7/11 are specific to VxLAN and GENEVE
> - patches 8/11 and 9/11 add infrastructure for lookup of encapsulations
> where sent packets cannot be matched via receiving socket lookup, i.e.
> FoU and GUE
> - patches 10/11 and 11/11 are specific to FoU and GUE
I like this series, especially the testcases.
But I have a minor coding style issue or two I'd like you
to fixup before I apply this.
I'll reply to individual patches as needed.
^ permalink raw reply
* Re: [PATCH net-next 01/11] udp: Handle ICMP errors for tunnels with same destination port on both endpoints
From: David Miller @ 2018-11-06 23:25 UTC (permalink / raw)
To: sbrivio; +Cc: sd, lucien.xin, netdev
In-Reply-To: <9f1e659e3745bbc8f29a9debb9bb8c0d8918fa24.1541533786.git.sbrivio@redhat.com>
From: Stefano Brivio <sbrivio@redhat.com>
Date: Tue, 6 Nov 2018 22:38:57 +0100
> + /* Network header needs to point to the outer IPv4 header inside ICMP */
> + skb_reset_network_header(skb);
> + iph = ip_hdr(skb);
> + /* Transport header needs to point to the UDP header */
> + skb_set_transport_header(skb, iph->ihl << 2);
Please put an empty line before the second comment.
^ permalink raw reply
* Re: [PATCH net-next 09/11] udp: Support for error handlers of tunnels with arbitrary destination port
From: David Miller @ 2018-11-06 23:26 UTC (permalink / raw)
To: sbrivio; +Cc: sd, lucien.xin, netdev
In-Reply-To: <d4649d12308c6d51f36a809e63514a39c75564af.1541533786.git.sbrivio@redhat.com>
From: Stefano Brivio <sbrivio@redhat.com>
Date: Tue, 6 Nov 2018 22:39:05 +0100
> diff --git a/include/net/ip6_tunnel.h b/include/net/ip6_tunnel.h
> index 236e40ba06bf..7855966b4a19 100644
> --- a/include/net/ip6_tunnel.h
> +++ b/include/net/ip6_tunnel.h
> @@ -69,6 +69,8 @@ struct ip6_tnl_encap_ops {
> size_t (*encap_hlen)(struct ip_tunnel_encap *e);
> int (*build_header)(struct sk_buff *skb, struct ip_tunnel_encap *e,
> u8 *protocol, struct flowi6 *fl6);
> + int (*err_handler)(struct sk_buff *, struct inet6_skb_parm *opt,
> + u8 type, u8 code, int offset, __be32 info);
> };
Please give names to all of the arguments in this new method.
...
> diff --git a/include/net/ip_tunnels.h b/include/net/ip_tunnels.h
> index b0d022ff6ea1..5980659312e5 100644
> --- a/include/net/ip_tunnels.h
> +++ b/include/net/ip_tunnels.h
> @@ -311,6 +311,7 @@ struct ip_tunnel_encap_ops {
> size_t (*encap_hlen)(struct ip_tunnel_encap *e);
> int (*build_header)(struct sk_buff *skb, struct ip_tunnel_encap *e,
> u8 *protocol, struct flowi4 *fl4);
> + int (*err_handler)(struct sk_buff *, u32);
Likewise.
^ permalink raw reply
* [PATCH RFC net-next 0/3] net: phy: sfp: Warn when using generic PHY driver
From: Florian Fainelli @ 2018-11-06 23:29 UTC (permalink / raw)
To: netdev; +Cc: andrew, rmk+kernel, davem, Florian Fainelli
Hi all,
This patch series allows warning an user that the generic PHY driver(s)
are used when a SFP incorporates a PHY (e.g: 1000BaseT SFP) which is
likely not going to work at all.
Let me know if you would want to do that differently.
Florian Fainelli (3):
net: phy: Add helpers to determine if PHY driver is generic
net: phy: sfp: Issue warning when using Generic PHY driver(s)
net: phy: Default MARVELL_PHY to the value of SFP
drivers/net/phy/Kconfig | 1 +
drivers/net/phy/phy_device.c | 34 ++++++++++++++++++++++++++++++++--
drivers/net/phy/sfp.c | 3 +++
include/linux/phy.h | 3 +++
4 files changed, 39 insertions(+), 2 deletions(-)
--
2.17.1
^ permalink raw reply
* [PATCH RFC net-next 1/3] net: phy: Add helpers to determine if PHY driver is generic
From: Florian Fainelli @ 2018-11-06 23:29 UTC (permalink / raw)
To: netdev; +Cc: andrew, rmk+kernel, davem, Florian Fainelli
In-Reply-To: <20181106232913.17216-1-f.fainelli@gmail.com>
We are already checking in phy_detach() that the PHY driver is of
generic kind (1G or 10G) and we are going to make use of that in the SFP
layer as well for 1000BaseT SFP modules, so expose helper functions to
return that information.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/net/phy/phy_device.c | 34 ++++++++++++++++++++++++++++++++--
include/linux/phy.h | 3 +++
2 files changed, 35 insertions(+), 2 deletions(-)
diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c
index ab33d1777132..15de7a3263bf 100644
--- a/drivers/net/phy/phy_device.c
+++ b/drivers/net/phy/phy_device.c
@@ -1262,6 +1262,36 @@ struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
}
EXPORT_SYMBOL(phy_attach);
+static bool phy_driver_is_genphy_kind(struct phy_device *phydev,
+ struct device_driver *driver)
+{
+ struct device *d = &phydev->mdio.dev;
+ bool ret = false;
+
+ if (!phydev->drv)
+ return ret;
+
+ get_device(d);
+ ret = d->driver == driver;
+ put_device(d);
+
+ return ret;
+}
+
+bool phy_driver_is_genphy(struct phy_device *phydev)
+{
+ return phy_driver_is_genphy_kind(phydev,
+ &genphy_driver.mdiodrv.driver);
+}
+EXPORT_SYMBOL_GPL(phy_driver_is_genphy);
+
+bool phy_driver_is_genphy_10g(struct phy_device *phydev)
+{
+ return phy_driver_is_genphy_kind(phydev,
+ &genphy_10g_driver.mdiodrv.driver);
+}
+EXPORT_SYMBOL_GPL(phy_driver_is_genphy_10g);
+
/**
* phy_detach - detach a PHY device from its network device
* @phydev: target phy_device struct
@@ -1293,8 +1323,8 @@ void phy_detach(struct phy_device *phydev)
* from the generic driver so that there's a chance a
* real driver could be loaded
*/
- if (phydev->mdio.dev.driver == &genphy_10g_driver.mdiodrv.driver ||
- phydev->mdio.dev.driver == &genphy_driver.mdiodrv.driver)
+ if (phy_driver_is_genphy(phydev) ||
+ phy_driver_is_genphy_10g(phydev))
device_release_driver(&phydev->mdio.dev);
/*
diff --git a/include/linux/phy.h b/include/linux/phy.h
index 3ea87f774a76..84a6c7efef60 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -1192,4 +1192,7 @@ module_exit(phy_module_exit)
#define module_phy_driver(__phy_drivers) \
phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
+bool phy_driver_is_genphy(struct phy_device *phydev);
+bool phy_driver_is_genphy_10g(struct phy_device *phydev);
+
#endif /* __PHY_H */
--
2.17.1
^ permalink raw reply related
* [PATCH RFC net-next 2/3] net: phy: sfp: Issue warning when using Generic PHY driver(s)
From: Florian Fainelli @ 2018-11-06 23:29 UTC (permalink / raw)
To: netdev; +Cc: andrew, rmk+kernel, davem, Florian Fainelli
In-Reply-To: <20181106232913.17216-1-f.fainelli@gmail.com>
1000BaseT SFP modules typically include an Ethernet PHY device, and
while the Generic PHY driver will be able to bind to it, it usually will
not work at all without a specialized PHY driver. Issue a warning in
that case to help toubleshoot things.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/net/phy/sfp.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/net/phy/sfp.c b/drivers/net/phy/sfp.c
index fd8bb998ae52..228205d8ce84 100644
--- a/drivers/net/phy/sfp.c
+++ b/drivers/net/phy/sfp.c
@@ -1203,6 +1203,9 @@ static void sfp_sm_probe_phy(struct sfp *sfp)
}
sfp->mod_phy = phy;
+ if (phy_driver_is_genphy(phy) || phy_driver_is_genphy_10g(phy))
+ dev_warn(sfp->dev, "Using Generic PHY driver with a SFP!\n");
+
phy_start(phy);
}
--
2.17.1
^ permalink raw reply related
* [PATCH RFC net-next 3/3] net: phy: Default MARVELL_PHY to the value of SFP
From: Florian Fainelli @ 2018-11-06 23:29 UTC (permalink / raw)
To: netdev; +Cc: andrew, rmk+kernel, davem, Florian Fainelli
In-Reply-To: <20181106232913.17216-1-f.fainelli@gmail.com>
Marvell PHYs are typically found in 1000BaseT SFP modules, so give a
chance for users to get the correct PHY driver when using SFP modules.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/net/phy/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 3d187cd50eb0..cf7d44ba20c5 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -350,6 +350,7 @@ config LXT_PHY
config MARVELL_PHY
tristate "Marvell PHYs"
+ default SFP
---help---
Currently has a driver for the 88E1011S
--
2.17.1
^ permalink raw reply related
* Re: [PATCH RFC net-next 0/3] net: phy: sfp: Warn when using generic PHY driver
From: David Miller @ 2018-11-06 23:38 UTC (permalink / raw)
To: f.fainelli; +Cc: netdev, andrew, rmk+kernel
In-Reply-To: <20181106232913.17216-1-f.fainelli@gmail.com>
From: Florian Fainelli <f.fainelli@gmail.com>
Date: Tue, 6 Nov 2018 15:29:10 -0800
> This patch series allows warning an user that the generic PHY driver(s)
> are used when a SFP incorporates a PHY (e.g: 1000BaseT SFP) which is
> likely not going to work at all.
>
> Let me know if you would want to do that differently.
Is there ever a possibility that the generic PHY driver could work
in an SFP situation?
If not, yes emit the message but also fail the load and registry too
perhaps?
^ permalink raw reply
* Re: [PATCH net-next 0/3] net: systemport: Unmap queues upon DSA unregister event
From: David Miller @ 2018-11-06 23:40 UTC (permalink / raw)
To: f.fainelli; +Cc: netdev, andrew, vivien.didelot
In-Reply-To: <20181106231518.16314-1-f.fainelli@gmail.com>
From: Florian Fainelli <f.fainelli@gmail.com>
Date: Tue, 6 Nov 2018 15:15:15 -0800
> This patch series fixes the unbinding/binding of the bcm_sf2 switch
> driver along with bcmsysport which monitors the switch port queues.
> Because the driver was not processing the DSA_PORT_UNREGISTER event, we
> would not be unmapping switch port/queues, which could cause incorrect
> decisions to be made by the HW (e.g: queue always back-pressured).
Series applied, thanks Florian.
^ permalink raw reply
* Re: [PATCH RFC net-next 0/3] net: phy: sfp: Warn when using generic PHY driver
From: Florian Fainelli @ 2018-11-06 23:42 UTC (permalink / raw)
To: David Miller; +Cc: netdev, andrew, rmk+kernel
In-Reply-To: <20181106.153844.1612363235041286689.davem@davemloft.net>
On 11/6/18 3:38 PM, David Miller wrote:
> From: Florian Fainelli <f.fainelli@gmail.com>
> Date: Tue, 6 Nov 2018 15:29:10 -0800
>
>> This patch series allows warning an user that the generic PHY driver(s)
>> are used when a SFP incorporates a PHY (e.g: 1000BaseT SFP) which is
>> likely not going to work at all.
>>
>> Let me know if you would want to do that differently.
>
> Is there ever a possibility that the generic PHY driver could work
> in an SFP situation?
Given the PHY has to operate in SGMII mode, I doubt it could work
without a specialized driver, Andrew, Russell, would you concur?
>
> If not, yes emit the message but also fail the load and registry too
> perhaps?
>
I was not sure this would be acceptable, but it is definitively an easy
change.
--
Florian
^ permalink raw reply
* Re: [PATCH RFC net-next 0/3] net: phy: sfp: Warn when using generic PHY driver
From: Russell King - ARM Linux @ 2018-11-07 0:03 UTC (permalink / raw)
To: David Miller; +Cc: f.fainelli, netdev, andrew
In-Reply-To: <20181106.153844.1612363235041286689.davem@davemloft.net>
On Tue, Nov 06, 2018 at 03:38:44PM -0800, David Miller wrote:
> From: Florian Fainelli <f.fainelli@gmail.com>
> Date: Tue, 6 Nov 2018 15:29:10 -0800
>
> > This patch series allows warning an user that the generic PHY driver(s)
> > are used when a SFP incorporates a PHY (e.g: 1000BaseT SFP) which is
> > likely not going to work at all.
> >
> > Let me know if you would want to do that differently.
>
> Is there ever a possibility that the generic PHY driver could work
> in an SFP situation?
I don't yet see the reason for Florian's patch series - all the Marvell
88e1111 based modules I have, or have come across in information from
manufacturers self-configure themselves and don't really need the
Marvell 1G PHY driver.
For example, the Source Photonics were offering a range of 1GbaseT
modules with the 88e1111 programmed in different modes, but published
instructions for the register accesses to configure them differently
(eg, SGMII vs 1000base-X interface facing the MAC). Depending on
the module part number determines which mode the PHY has been
programmed to come up in.
So in theory, you don't need any PHY driver for these modules - but
it's useful to have a functional PHY driver to be able to read out
the negotiated flow control results.
I'd like more information from Florian about the reasoning behind
this patch series before it's merged.
--
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line in suburbia: sync at 12.1Mbps down 622kbps up
According to speedtest.net: 11.9Mbps down 500kbps up
^ permalink raw reply
* Re: [PATCH RFC net-next 0/3] net: phy: sfp: Warn when using generic PHY driver
From: Florian Fainelli @ 2018-11-07 0:09 UTC (permalink / raw)
To: Russell King - ARM Linux, David Miller; +Cc: netdev, andrew
In-Reply-To: <20181107000322.GP30658@n2100.armlinux.org.uk>
On 11/6/18 4:03 PM, Russell King - ARM Linux wrote:
> On Tue, Nov 06, 2018 at 03:38:44PM -0800, David Miller wrote:
>> From: Florian Fainelli <f.fainelli@gmail.com>
>> Date: Tue, 6 Nov 2018 15:29:10 -0800
>>
>>> This patch series allows warning an user that the generic PHY driver(s)
>>> are used when a SFP incorporates a PHY (e.g: 1000BaseT SFP) which is
>>> likely not going to work at all.
>>>
>>> Let me know if you would want to do that differently.
>>
>> Is there ever a possibility that the generic PHY driver could work
>> in an SFP situation?
>
> I don't yet see the reason for Florian's patch series - all the Marvell
> 88e1111 based modules I have, or have come across in information from
> manufacturers self-configure themselves and don't really need the
> Marvell 1G PHY driver.
>
> For example, the Source Photonics were offering a range of 1GbaseT
> modules with the 88e1111 programmed in different modes, but published
> instructions for the register accesses to configure them differently
> (eg, SGMII vs 1000base-X interface facing the MAC). Depending on
> the module part number determines which mode the PHY has been
> programmed to come up in.
>
> So in theory, you don't need any PHY driver for these modules - but
> it's useful to have a functional PHY driver to be able to read out
> the negotiated flow control results.
>
> I'd like more information from Florian about the reasoning behind
> this patch series before it's merged.
>
The module that I am using [1] would not work, as in , no link up being
reported without turning on the Marvell PHY driver:
https://www.amazon.com/dp/B01LW2P72V/ref=twister_B07F3WQJQX?_encoding=UTF8&psc=1
this module uses a 88E1111 PHY as well (OUI: 0x01410cc2).
--
Florian
^ permalink raw reply
* Re: [RFC perf,bpf 5/5] perf util: generate bpf_prog_info_event for short living bpf programs
From: David Ahern @ 2018-11-07 0:23 UTC (permalink / raw)
To: Alexei Starovoitov, David Miller
Cc: Song Liu, netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
Kernel Team, ast@kernel.org, daniel@iogearbox.net,
peterz@infradead.org, acme@kernel.org
In-Reply-To: <39fe6abc-5c3e-bac3-0c0b-cf68bea23ab0@fb.com>
On 11/6/18 5:13 PM, Alexei Starovoitov wrote:
> On 11/6/18 3:36 PM, David Miller wrote:
>> From: Alexei Starovoitov <ast@fb.com>
>> Date: Tue, 6 Nov 2018 23:29:07 +0000
>>
>>> I think concerns with perf overhead from collecting bpf events
>>> are unfounded.
>>> I would prefer for this flag to be on by default.
>>
>> I will sit in userspace looping over bpf load/unload and see how the
>> person trying to monitor something else with perf feels about that.
>>
>> Really, it is inappropriate to turn this on by default, I completely
>> agree with David Ahern.
>>
>> It's hard enough, _AS IS_, for me to fight back all of the bloat that
>> is in perf right now and get it back to being able to handle simple
>> full workloads without dropping events..
>
> It's a separate perf thread and separate event with its own epoll.
> I don't see how it can affect main event collection.
> Let's put it this way. If it does affect somehow, then yes,
> it should not be on. If it is not, there is no downside to keep it on.
> Typical user expects to type 'perf record' and see everything that
> is happening on the system. Right now short lived bpf programs
> will not be seen. How user suppose to even know when to use the flag?
The default is profiling where perf record collects task events and
periodic samples. So for the default record/report, the bpf load /
unload events are not relevant.
> The only option is to always pass the flag 'just in case'
> which is unnecessary burden.
People who care about an event enable the event collection of the event.
^ permalink raw reply
* Re: [PATCH bpf-next] bpf_load: add map name to load_maps error message
From: Song Liu @ 2018-11-07 0:26 UTC (permalink / raw)
To: John Fastabend
Cc: shannon.nelson, Alexei Starovoitov, Daniel Borkmann, Networking,
shannon.lee.nelson
In-Reply-To: <ad307fb7-0ea3-3929-1dfe-38dbf281e206@gmail.com>
On Mon, Oct 29, 2018 at 3:12 PM John Fastabend <john.fastabend@gmail.com> wrote:
>
> On 10/29/2018 02:14 PM, Shannon Nelson wrote:
> > To help when debugging bpf/xdp load issues, have the load_map()
> > error message include the number and name of the map that
> > failed.
> >
> > Signed-off-by: Shannon Nelson <shannon.nelson@oracle.com>
> > ---
> > samples/bpf/bpf_load.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/samples/bpf/bpf_load.c b/samples/bpf/bpf_load.c
> > index 89161c9..5de0357 100644
> > --- a/samples/bpf/bpf_load.c
> > +++ b/samples/bpf/bpf_load.c
> > @@ -282,8 +282,8 @@ static int load_maps(struct bpf_map_data *maps, int nr_maps,
> > numa_node);
> > }
> > if (map_fd[i] < 0) {
> > - printf("failed to create a map: %d %s\n",
> > - errno, strerror(errno));
> > + printf("failed to create map %d (%s): %d %s\n",
> > + i, maps[i].name, errno, strerror(errno));
> > return 1;
> > }
> > maps[i].fd = map_fd[i];
> >
>
> LGTM
>
> Acked-by: John Fastabend <john.fastabend@gmail.com>
Acked-by: Song Liu <songliubraving@fb.com>
^ permalink raw reply
* Re: [PATCH v2 1/2] mm/page_alloc: free order-0 pages through PCP in page_frag_free()
From: Tariq Toukan @ 2018-11-07 9:59 UTC (permalink / raw)
To: Aaron Lu, linux-mm@kvack.org, linux-kernel@vger.kernel.org,
netdev@vger.kernel.org
Cc: Andrew Morton, Paweł Staszewski, Jesper Dangaard Brouer,
Eric Dumazet, Tariq Toukan, Ilias Apalodimas, Yoel Caspersen,
Mel Gorman, Saeed Mahameed, Michal Hocko, Vlastimil Babka,
Dave Hansen, Alexander Duyck
In-Reply-To: <20181106052833.GC6203@intel.com>
On 06/11/2018 7:28 AM, Aaron Lu wrote:
> page_frag_free() calls __free_pages_ok() to free the page back to
> Buddy. This is OK for high order page, but for order-0 pages, it
> misses the optimization opportunity of using Per-Cpu-Pages and can
> cause zone lock contention when called frequently.
>
> Paweł Staszewski recently shared his result of 'how Linux kernel
> handles normal traffic'[1] and from perf data, Jesper Dangaard Brouer
> found the lock contention comes from page allocator:
>
> mlx5e_poll_tx_cq
> |
> --16.34%--napi_consume_skb
> |
> |--12.65%--__free_pages_ok
> | |
> | --11.86%--free_one_page
> | |
> | |--10.10%--queued_spin_lock_slowpath
> | |
> | --0.65%--_raw_spin_lock
> |
> |--1.55%--page_frag_free
> |
> --1.44%--skb_release_data
>
> Jesper explained how it happened: mlx5 driver RX-page recycle
> mechanism is not effective in this workload and pages have to go
> through the page allocator. The lock contention happens during
> mlx5 DMA TX completion cycle. And the page allocator cannot keep
> up at these speeds.[2]
>
> I thought that __free_pages_ok() are mostly freeing high order
> pages and thought this is an lock contention for high order pages
> but Jesper explained in detail that __free_pages_ok() here are
> actually freeing order-0 pages because mlx5 is using order-0 pages
> to satisfy its page pool allocation request.[3]
>
Thanks for your patch!
Acked-by: Tariq Toukan <tariqt@mellanox.com>
> The free path as pointed out by Jesper is:
> skb_free_head()
> -> skb_free_frag()
> -> page_frag_free()
> And the pages being freed on this path are order-0 pages.
>
> Fix this by doing similar things as in __page_frag_cache_drain() -
> send the being freed page to PCP if it's an order-0 page, or
> directly to Buddy if it is a high order page.
>
> With this change, Paweł hasn't noticed lock contention yet in
> his workload and Jesper has noticed a 7% performance improvement
> using a micro benchmark and lock contention is gone. Ilias' test
> on a 'low' speed 1Gbit interface on an cortex-a53 shows ~11%
> performance boost testing with 64byte packets and __free_pages_ok()
> disappeared from perf top.
>
> [1]: https://www.spinics.net/lists/netdev/msg531362.html
> [2]: https://www.spinics.net/lists/netdev/msg531421.html
> [3]: https://www.spinics.net/lists/netdev/msg531556.html
> Reported-by: Paweł Staszewski <pstaszewski@itcare.pl>
> Analysed-by: Jesper Dangaard Brouer <brouer@redhat.com>
> Acked-by: Vlastimil Babka <vbabka@suse.cz>
> Acked-by: Mel Gorman <mgorman@techsingularity.net>
> Acked-by: Jesper Dangaard Brouer <brouer@redhat.com>
> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
> Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
> Acked-by: Alexander Duyck <alexander.h.duyck@linux.intel.com>
> Signed-off-by: Aaron Lu <aaron.lu@intel.com>
> ---
> v2: only changelog changes:
> - remove the duplicated skb_free_frag() as pointed by Jesper;
> - add Ilias' test result;
> - add people's ack/test tag.
>
> mm/page_alloc.c | 10 ++++++++--
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/mm/page_alloc.c b/mm/page_alloc.c
> index ae31839874b8..91a9a6af41a2 100644
> --- a/mm/page_alloc.c
> +++ b/mm/page_alloc.c
> @@ -4555,8 +4555,14 @@ void page_frag_free(void *addr)
> {
> struct page *page = virt_to_head_page(addr);
>
> - if (unlikely(put_page_testzero(page)))
> - __free_pages_ok(page, compound_order(page));
> + if (unlikely(put_page_testzero(page))) {
> + unsigned int order = compound_order(page);
> +
> + if (order == 0)
> + free_unref_page(page);
> + else
> + __free_pages_ok(page, order);
> + }
> }
> EXPORT_SYMBOL(page_frag_free);
>
>
^ permalink raw reply
* [RFC PATCH 04/12] soc: qcom: ipa: immediate commands
From: Alex Elder @ 2018-11-07 0:32 UTC (permalink / raw)
To: davem, arnd, bjorn.andersson, ilias.apalodimas
Cc: netdev, devicetree, linux-arm-msm, linux-soc, linux-arm-kernel,
linux-kernel, syadagir, mjavid, robh+dt, mark.rutland
In-Reply-To: <20181107003250.5832-1-elder@linaro.org>
This patch contains (mostly) code implementing "immediate commands."
(The source files are still named "ipahal" for historical reasons.)
One channel (APPS CMD_PROD) is used for sending commands *to* the
IPA itself, rather than passing data through it. These immediate
commands are issued to the IPA using the normal GSI queueing
mechanism. And each command's completion is handled using the
normal GSI transfer completion mechanisms.
In addition to immediate commands, the "IPA HAL" includes code for
interpreting status packets that are supplied to the IPA on consumer
channels.
Signed-off-by: Alex Elder <elder@linaro.org>
---
drivers/net/ipa/ipahal.c | 541 +++++++++++++++++++++++++++++++++++++++
drivers/net/ipa/ipahal.h | 253 ++++++++++++++++++
2 files changed, 794 insertions(+)
create mode 100644 drivers/net/ipa/ipahal.c
create mode 100644 drivers/net/ipa/ipahal.h
diff --git a/drivers/net/ipa/ipahal.c b/drivers/net/ipa/ipahal.c
new file mode 100644
index 000000000000..de00bcd54d4f
--- /dev/null
+++ b/drivers/net/ipa/ipahal.c
@@ -0,0 +1,541 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
+ * Copyright (C) 2018 Linaro Ltd.
+ */
+
+#include <linux/types.h>
+#include <linux/slab.h>
+#include <asm/unaligned.h>
+
+#include "ipahal.h"
+#include "ipa_i.h" /* ipa_err() */
+#include "ipa_dma.h"
+
+/**
+ * DOC: IPA Immediate Commands
+ *
+ * The APPS_CMD_PROD channel is used to issue immediate commands to
+ * the IPA. An immediate command is generally used to request the
+ * IPA do something other than data transfer.
+ *
+ * An immediate command is represented by a GSI transfer element.
+ * Each immediate command has a well-defined format, with a known
+ * length. The transfer element's length field can therefore be
+ * used to hold a command's opcode. The "payload" of an immediate
+ * command contains additional information required for the command.
+ * It resides in DRAM and is referred to using the DMA memory data
+ * pointer (the same one used to refer to the data in a "normal"
+ * transfer).
+ *
+ * Immediate commands are issued to the IPA through the APPS_CMD_PROD
+ * channel using the normal GSI queueing mechanism. And each command's
+ * completion is handled using the normal GSI transfer completion
+ * mechanisms.
+ */
+
+/**
+ * struct ipahal_context - HAL global context data
+ * @empty_fltrt_tbl: Empty table to be used for table initialization
+ */
+static struct ipahal_context {
+ struct ipa_dma_mem empty_fltrt_tbl;
+} ipahal_ctx_struct;
+static struct ipahal_context *ipahal_ctx = &ipahal_ctx_struct;
+
+/* enum ipa_pipeline_clear_option - Values for pipeline clear waiting options
+ * @IPAHAL_HPS_CLEAR: Wait for HPS clear. All queues except high priority queue
+ * shall not be serviced until HPS is clear of packets or immediate commands.
+ * The high priority Rx queue / Q6ZIP group shall still be serviced normally.
+ *
+ * @IPAHAL_SRC_GRP_CLEAR: Wait for originating source group to be clear
+ * (for no packet contexts allocated to the originating source group).
+ * The source group / Rx queue shall not be serviced until all previously
+ * allocated packet contexts are released. All other source groups/queues shall
+ * be serviced normally.
+ *
+ * @IPAHAL_FULL_PIPELINE_CLEAR: Wait for full pipeline to be clear.
+ * All groups / Rx queues shall not be serviced until IPA pipeline is fully
+ * clear. This should be used for debug only.
+ *
+ * The values assigned to these are assumed by the REGISTER_WRITE
+ * (struct ipa_imm_cmd_hw_register_write) and the DMA_SHARED_MEM
+ * (struct ipa_imm_cmd_hw_dma_shared_mem) immediate commands for
+ * IPA version 3 hardware. They are also used to modify the opcode
+ * used to implement these commands for IPA version 4 hardware.
+ */
+enum ipahal_pipeline_clear_option {
+ IPAHAL_HPS_CLEAR = 0,
+ IPAHAL_SRC_GRP_CLEAR = 1,
+ IPAHAL_FULL_PIPELINE_CLEAR = 2,
+};
+
+/* Immediate commands H/W structures */
+
+/* struct ipa_imm_cmd_hw_ip_fltrt_init - IP_V*_FILTER_INIT/IP_V*_ROUTING_INIT
+ * command payload in H/W format.
+ * Inits IPv4/v6 routing or filter block.
+ * @hash_rules_addr: Addr in system mem where hashable flt/rt rules starts
+ * @hash_rules_size: Size in bytes of the hashable tbl to cpy to local mem
+ * @hash_local_addr: Addr in shared mem where hashable flt/rt tbl should
+ * be copied to
+ * @nhash_rules_size: Size in bytes of the non-hashable tbl to cpy to local mem
+ * @nhash_local_addr: Addr in shared mem where non-hashable flt/rt tbl should
+ * be copied to
+ * @rsvd: reserved
+ * @nhash_rules_addr: Addr in sys mem where non-hashable flt/rt tbl starts
+ */
+struct ipa_imm_cmd_hw_ip_fltrt_init {
+ u64 hash_rules_addr;
+ u64 hash_rules_size : 12,
+ hash_local_addr : 16,
+ nhash_rules_size : 12,
+ nhash_local_addr : 16,
+ rsvd : 8;
+ u64 nhash_rules_addr;
+};
+
+/* struct ipa_imm_cmd_hw_hdr_init_local - HDR_INIT_LOCAL command payload
+ * in H/W format.
+ * Inits hdr table within local mem with the hdrs and their length.
+ * @hdr_table_addr: Word address in sys mem where the table starts (SRC)
+ * @size_hdr_table: Size of the above (in bytes)
+ * @hdr_addr: header address in IPA sram (used as DST for memory copy)
+ * @rsvd: reserved
+ */
+struct ipa_imm_cmd_hw_hdr_init_local {
+ u64 hdr_table_addr;
+ u32 size_hdr_table : 12,
+ hdr_addr : 16,
+ rsvd : 4;
+};
+
+/* struct ipa_imm_cmd_hw_dma_shared_mem - DMA_SHARED_MEM command payload
+ * in H/W format.
+ * Perform mem copy into or out of the SW area of IPA local mem
+ * @sw_rsvd: Ignored by H/W. My be used by S/W
+ * @size: Size in bytes of data to copy. Expected size is up to 2K bytes
+ * @local_addr: Address in IPA local memory
+ * @direction: Read or write?
+ * 0: IPA write, Write to local address from system address
+ * 1: IPA read, Read from local address to system address
+ * @skip_pipeline_clear: 0 to wait until IPA pipeline is clear. 1 don't wait
+ * @pipeline_clear_options: options for pipeline to clear
+ * 0: HPS - no pkt inside HPS (not grp specific)
+ * 1: source group - The immediate cmd src grp does npt use any pkt ctxs
+ * 2: Wait until no pkt reside inside IPA pipeline
+ * 3: reserved
+ * @rsvd: reserved - should be set to zero
+ * @system_addr: Address in system memory
+ */
+struct ipa_imm_cmd_hw_dma_shared_mem {
+ u16 sw_rsvd;
+ u16 size;
+ u16 local_addr;
+ u16 direction : 1,
+ skip_pipeline_clear : 1,
+ pipeline_clear_options : 2,
+ rsvd : 12;
+ u64 system_addr;
+};
+
+/* struct ipa_imm_cmd_hw_dma_task_32b_addr -
+ * IPA_DMA_TASK_32B_ADDR command payload in H/W format.
+ * Used by clients using 32bit addresses. Used to perform DMA operation on
+ * multiple descriptors.
+ * The Opcode is dynamic, where it holds the number of buffer to process
+ * @sw_rsvd: Ignored by H/W. My be used by S/W
+ * @cmplt: Complete flag: When asserted IPA will interrupt SW when the entire
+ * DMA related data was completely xfered to its destination.
+ * @eof: Enf Of Frame flag: When asserted IPA will assert the EOT to the
+ * dest client. This is used used for aggr sequence
+ * @flsh: Flush flag: When asserted, pkt will go through the IPA blocks but
+ * will not be xfered to dest client but rather will be discarded
+ * @lock: Lock endpoint flag: When asserted, IPA will stop processing
+ * descriptors from other EPs in the same src grp (RX queue)
+ * @unlock: Unlock endpoint flag: When asserted, IPA will stop exclusively
+ * servicing current EP out of the src EPs of the grp (RX queue)
+ * @size1: Size of buffer1 data
+ * @addr1: Pointer to buffer1 data
+ * @packet_size: Total packet size. If a pkt send using multiple DMA_TASKs,
+ * only the first one needs to have this field set. It will be ignored
+ * in subsequent DMA_TASKs until the packet ends (EOT). First DMA_TASK
+ * must contain this field (2 or more buffers) or EOT.
+ */
+struct ipa_imm_cmd_hw_dma_task_32b_addr {
+ u16 sw_rsvd : 11,
+ cmplt : 1,
+ eof : 1,
+ flsh : 1,
+ lock : 1,
+ unlock : 1;
+ u16 size1;
+ u32 addr1;
+ u16 packet_size;
+ u16 rsvd1;
+ u32 rsvd2;
+};
+
+/* IPA Status packet H/W structures and info */
+
+/* struct ipa_status_pkt_hw - IPA status packet payload in H/W format.
+ * This structure describes the status packet H/W structure for the
+ * following statuses: IPA_STATUS_PACKET, IPA_STATUS_DROPPED_PACKET,
+ * IPA_STATUS_SUSPENDED_PACKET.
+ * Other statuses types has different status packet structure.
+ * @status_opcode: The Type of the status (Opcode).
+ * @exception: (not bitmask) - the first exception that took place.
+ * In case of exception, src endp and pkt len are always valid.
+ * @status_mask: Bit mask specifying on which H/W blocks the pkt was processed.
+ * @pkt_len: Pkt payload len including hdr, include retained hdr if used. Does
+ * not include padding or checksum trailer len.
+ * @endp_src_idx: Source end point index.
+ * @rsvd1: reserved
+ * @endp_dest_idx: Destination end point index.
+ * Not valid in case of exception
+ * @rsvd2: reserved
+ * @metadata: meta data value used by packet
+ * @flt_local: Filter table location flag: Does matching flt rule belongs to
+ * flt tbl that resides in lcl memory? (if not, then system mem)
+ * @flt_hash: Filter hash hit flag: Does matching flt rule was in hash tbl?
+ * @flt_global: Global filter rule flag: Does matching flt rule belongs to
+ * the global flt tbl? (if not, then the per endp tables)
+ * @flt_ret_hdr: Retain header in filter rule flag: Does matching flt rule
+ * specifies to retain header?
+ * @flt_rule_id: The ID of the matching filter rule. This info can be combined
+ * with endp_src_idx to locate the exact rule. ID=0x3ff reserved to specify
+ * flt miss. In case of miss, all flt info to be ignored
+ * @rt_local: Route table location flag: Does matching rt rule belongs to
+ * rt tbl that resides in lcl memory? (if not, then system mem)
+ * @rt_hash: Route hash hit flag: Does matching rt rule was in hash tbl?
+ * @ucp: UC Processing flag.
+ * @rt_tbl_idx: Index of rt tbl that contains the rule on which was a match
+ * @rt_rule_id: The ID of the matching rt rule. This info can be combined
+ * with rt_tbl_idx to locate the exact rule. ID=0x3ff reserved to specify
+ * rt miss. In case of miss, all rt info to be ignored
+ * @nat_hit: NAT hit flag: Was their NAT hit?
+ * @nat_entry_idx: Index of the NAT entry used of NAT processing
+ * @nat_type: Defines the type of the NAT operation (ignored for now)
+ * @tag_info: S/W defined value provided via immediate command
+ * @seq_num: Per source endp unique packet sequence number
+ * @time_of_day_ctr: running counter from IPA clock
+ * @hdr_local: Header table location flag: In header insertion, was the header
+ * taken from the table resides in local memory? (If no, then system mem)
+ * @hdr_offset: Offset of used header in the header table
+ * @frag_hit: Frag hit flag: Was their frag rule hit in H/W frag table?
+ * @frag_rule: Frag rule index in H/W frag table in case of frag hit
+ * @hw_specific: H/W specific reserved value
+ */
+#define IPA_RULE_ID_BITS 10 /* See ipahal_is_rule_miss_id() */
+struct ipa_pkt_status_hw {
+ u8 status_opcode;
+ u8 exception;
+ u16 status_mask;
+ u16 pkt_len;
+ u8 endp_src_idx : 5,
+ rsvd1 : 3;
+ u8 endp_dest_idx : 5,
+ rsvd2 : 3;
+ u32 metadata;
+ u16 flt_local : 1,
+ flt_hash : 1,
+ flt_global : 1,
+ flt_ret_hdr : 1,
+ flt_rule_id : IPA_RULE_ID_BITS,
+ rt_local : 1,
+ rt_hash : 1;
+ u16 ucp : 1,
+ rt_tbl_idx : 5,
+ rt_rule_id : IPA_RULE_ID_BITS;
+ u64 nat_hit : 1,
+ nat_entry_idx : 13,
+ nat_type : 2,
+ tag_info : 48;
+ u32 seq_num : 8,
+ time_of_day_ctr : 24;
+ u16 hdr_local : 1,
+ hdr_offset : 10,
+ frag_hit : 1,
+ frag_rule : 4;
+ u16 hw_specific;
+};
+
+void *ipahal_dma_shared_mem_write_pyld(struct ipa_dma_mem *mem, u32 offset)
+{
+ struct ipa_imm_cmd_hw_dma_shared_mem *data;
+
+ ipa_assert(mem->size < 1 << 16); /* size is 16 bits wide */
+ ipa_assert(offset < 1 << 16); /* local_addr is 16 bits wide */
+
+ data = kzalloc(sizeof(*data), GFP_KERNEL);
+ if (!data)
+ return NULL;
+
+ data->size = mem->size;
+ data->local_addr = offset;
+ data->direction = 0; /* 0 = write to IPA; 1 = read from IPA */
+ data->skip_pipeline_clear = 0;
+ data->pipeline_clear_options = IPAHAL_HPS_CLEAR;
+ data->system_addr = mem->phys;
+
+ return data;
+}
+
+void *ipahal_hdr_init_local_pyld(struct ipa_dma_mem *mem, u32 offset)
+{
+ struct ipa_imm_cmd_hw_hdr_init_local *data;
+
+ ipa_assert(mem->size < 1 << 12); /* size_hdr_table is 12 bits wide */
+ ipa_assert(offset < 1 << 16); /* hdr_addr is 16 bits wide */
+
+ data = kzalloc(sizeof(*data), GFP_KERNEL);
+ if (!data)
+ return NULL;
+
+ data->hdr_table_addr = mem->phys;
+ data->size_hdr_table = mem->size;
+ data->hdr_addr = offset;
+
+ return data;
+}
+
+static void *fltrt_init_common(struct ipa_dma_mem *mem, u32 hash_offset,
+ u32 nhash_offset)
+{
+ struct ipa_imm_cmd_hw_ip_fltrt_init *data;
+
+ data = kzalloc(sizeof(*data), GFP_KERNEL);
+ if (!data)
+ return NULL;
+
+ data->hash_rules_addr = (u64)mem->phys;
+ data->hash_rules_size = (u32)mem->size;
+ data->hash_local_addr = hash_offset;
+ data->nhash_rules_addr = (u64)mem->phys;
+ data->nhash_rules_size = (u32)mem->size;
+ data->nhash_local_addr = nhash_offset;
+
+ return data;
+}
+
+void *ipahal_ip_v4_routing_init_pyld(struct ipa_dma_mem *mem, u32 hash_offset,
+ u32 nhash_offset)
+{
+ return fltrt_init_common(mem, hash_offset, nhash_offset);
+}
+
+void *ipahal_ip_v6_routing_init_pyld(struct ipa_dma_mem *mem, u32 hash_offset,
+ u32 nhash_offset)
+{
+ return fltrt_init_common(mem, hash_offset, nhash_offset);
+}
+
+void *ipahal_ip_v4_filter_init_pyld(struct ipa_dma_mem *mem, u32 hash_offset,
+ u32 nhash_offset)
+{
+ return fltrt_init_common(mem, hash_offset, nhash_offset);
+}
+
+void *ipahal_ip_v6_filter_init_pyld(struct ipa_dma_mem *mem, u32 hash_offset,
+ u32 nhash_offset)
+{
+ return fltrt_init_common(mem, hash_offset, nhash_offset);
+}
+
+void *ipahal_dma_task_32b_addr_pyld(struct ipa_dma_mem *mem)
+{
+ struct ipa_imm_cmd_hw_dma_task_32b_addr *data;
+
+ /* size1 and packet_size are both 16 bits wide */
+ ipa_assert(mem->size < 1 << 16);
+
+ data = kzalloc(sizeof(*data), GFP_KERNEL);
+ if (!data)
+ return NULL;
+
+ data->cmplt = 0;
+ data->eof = 0;
+ data->flsh = 1;
+ data->lock = 0;
+ data->unlock = 0;
+ data->size1 = mem->size;
+ data->addr1 = mem->phys;
+ data->packet_size = mem->size;
+
+ return data;
+}
+
+void ipahal_payload_free(void *payload)
+{
+ kfree(payload);
+}
+
+/* IPA Packet Status Logic */
+
+/* Maps an exception type returned in a ipa_pkt_status_hw structure
+ * to the ipahal_pkt_status_exception value that represents it in
+ * the exception field of a ipahal_pkt_status structure. Returns
+ * IPAHAL_PKT_STATUS_EXCEPTION_MAX for an unrecognized value.
+ */
+static enum ipahal_pkt_status_exception
+exception_map(u8 exception, bool is_ipv6)
+{
+ switch (exception) {
+ case 0x00: return IPAHAL_PKT_STATUS_EXCEPTION_NONE;
+ case 0x01: return IPAHAL_PKT_STATUS_EXCEPTION_DEAGGR;
+ case 0x04: return IPAHAL_PKT_STATUS_EXCEPTION_IPTYPE;
+ case 0x08: return IPAHAL_PKT_STATUS_EXCEPTION_PACKET_LENGTH;
+ case 0x10: return IPAHAL_PKT_STATUS_EXCEPTION_FRAG_RULE_MISS;
+ case 0x20: return IPAHAL_PKT_STATUS_EXCEPTION_SW_FILT;
+ case 0x40: return is_ipv6 ? IPAHAL_PKT_STATUS_EXCEPTION_IPV6CT
+ : IPAHAL_PKT_STATUS_EXCEPTION_NAT;
+ default: return IPAHAL_PKT_STATUS_EXCEPTION_MAX;
+ }
+}
+
+/* ipahal_pkt_status_get_size() - Get H/W size of packet status */
+u32 ipahal_pkt_status_get_size(void)
+{
+ return sizeof(struct ipa_pkt_status_hw);
+}
+
+/* ipahal_pkt_status_parse() - Parse Packet Status payload to abstracted form
+ * @unparsed_status: Pointer to H/W format of the packet status as read from H/W
+ * @status: Pointer to pre-allocated buffer where the parsed info will be stored
+ */
+void ipahal_pkt_status_parse(const void *unparsed_status,
+ struct ipahal_pkt_status *status)
+{
+ const struct ipa_pkt_status_hw *hw_status = unparsed_status;
+ bool is_ipv6;
+
+ status->status_opcode =
+ (enum ipahal_pkt_status_opcode)hw_status->status_opcode;
+ is_ipv6 = hw_status->status_mask & BIT(7) ? false : true;
+ /* If hardware status values change we may have to re-map this */
+ status->status_mask =
+ (enum ipahal_pkt_status_mask)hw_status->status_mask;
+ status->exception = exception_map(hw_status->exception, is_ipv6);
+ status->pkt_len = hw_status->pkt_len;
+ status->endp_src_idx = hw_status->endp_src_idx;
+ status->endp_dest_idx = hw_status->endp_dest_idx;
+ status->metadata = hw_status->metadata;
+ status->rt_miss = ipahal_is_rule_miss_id(hw_status->rt_rule_id);
+}
+
+int ipahal_init(void)
+{
+ struct ipa_dma_mem *mem = &ipahal_ctx->empty_fltrt_tbl;
+
+ /* Set up an empty filter/route table entry in system
+ * memory. This will be used, for example, to delete a
+ * route safely.
+ */
+ if (ipa_dma_alloc(mem, IPA_HW_TBL_WIDTH, GFP_KERNEL)) {
+ ipa_err("error allocating empty filter/route table\n");
+ return -ENOMEM;
+ }
+
+ return 0;
+}
+
+void ipahal_exit(void)
+{
+ ipa_dma_free(&ipahal_ctx->empty_fltrt_tbl);
+}
+
+/* Does the given rule ID represent a routing or filter rule miss?
+ * A rule miss is indicated as an all-1's value in the rt_rule_id
+ * or flt_rule_id field of the ipahal_pkt_status structure.
+ */
+bool ipahal_is_rule_miss_id(u32 id)
+{
+ BUILD_BUG_ON(IPA_RULE_ID_BITS < 2);
+
+ return id == (1U << IPA_RULE_ID_BITS) - 1;
+}
+
+/**
+ * ipahal_rt_generate_empty_img() - Generate empty route table header
+ * @route_count: Number of table entries
+ * @mem: DMA memory object representing the header structure
+ *
+ * Allocates and fills an "empty" route table header having the given
+ * number of entries. Each entry in the table contains the DMA address
+ * of a routing entry.
+ *
+ * This function initializes all entries to point at the preallocated
+ * empty routing entry in system RAM.
+ *
+ * Return: 0 if successful, or a negative error code otherwise
+ */
+int ipahal_rt_generate_empty_img(u32 route_count, struct ipa_dma_mem *mem)
+{
+ u64 addr;
+ int i;
+
+ BUILD_BUG_ON(!IPA_HW_TBL_HDR_WIDTH);
+
+ if (ipa_dma_alloc(mem, route_count * IPA_HW_TBL_HDR_WIDTH, GFP_KERNEL))
+ return -ENOMEM;
+
+ addr = (u64)ipahal_ctx->empty_fltrt_tbl.phys;
+ for (i = 0; i < route_count; i++)
+ put_unaligned(addr, mem->virt + i * IPA_HW_TBL_HDR_WIDTH);
+
+ return 0;
+}
+
+/**
+ * ipahal_flt_generate_empty_img() - Generate empty filter table header
+ * @filter_bitmap: Bitmap representing which endpoints support filtering
+ * @mem: DMA memory object representing the header structure
+ *
+ * Allocates and fills an "empty" filter table header based on the
+ * given filter bitmap.
+ *
+ * The first slot in a filter table header is a 64-bit bitmap whose
+ * set bits define which endpoints support filtering. Following
+ * this, each set bit in the mask has the DMA address of the filter
+ * used for the corresponding endpoint.
+ *
+ * This function initializes all endpoints that support filtering to
+ * point at the preallocated empty filter in system RAM.
+ *
+ * Note: the (software) bitmap here uses bit 0 to represent
+ * endpoint 0, bit 1 for endpoint 1, and so on. This is different
+ * from the hardware (which uses bit 1 to represent filter 0, etc.).
+ *
+ * Return: 0 if successful, or a negative error code
+ */
+int ipahal_flt_generate_empty_img(u64 filter_bitmap, struct ipa_dma_mem *mem)
+{
+ u32 filter_count = hweight32(filter_bitmap) + 1;
+ u64 addr;
+ int i;
+
+ ipa_assert(filter_bitmap);
+
+ if (ipa_dma_alloc(mem, filter_count * IPA_HW_TBL_HDR_WIDTH, GFP_KERNEL))
+ return -ENOMEM;
+
+ /* Save the endpoint bitmap in the first slot of the table.
+ * Convert it from software to hardware representation by
+ * shifting it left one position.
+ * XXX Does bit position 0 represent global? At IPA3, global
+ * XXX configuration is possible but not used.
+ */
+ put_unaligned(filter_bitmap << 1, mem->virt);
+
+ /* Point every entry in the table at the empty filter */
+ addr = (u64)ipahal_ctx->empty_fltrt_tbl.phys;
+ for (i = 1; i < filter_count; i++)
+ put_unaligned(addr, mem->virt + i * IPA_HW_TBL_HDR_WIDTH);
+
+ return 0;
+}
+
+void ipahal_free_empty_img(struct ipa_dma_mem *mem)
+{
+ ipa_dma_free(mem);
+}
diff --git a/drivers/net/ipa/ipahal.h b/drivers/net/ipa/ipahal.h
new file mode 100644
index 000000000000..940254940d90
--- /dev/null
+++ b/drivers/net/ipa/ipahal.h
@@ -0,0 +1,253 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
+ * Copyright (C) 2018 Linaro Ltd.
+ */
+#ifndef _IPAHAL_H_
+#define _IPAHAL_H_
+
+#include <linux/types.h>
+
+#include "ipa_dma.h"
+
+/* The IPA implements offloaded packet filtering and routing
+ * capabilities. This is managed by programming IPA-resident
+ * tables of rules that define the processing that should be
+ * performed by the IPA and the conditions under which they
+ * should be applied. Aspects of these rules are constrained
+ * by things like table entry sizes and alignment requirements;
+ * all of these are in units of bytes. These definitions are
+ * subject to some constraints:
+ * - IPA_HW_TBL_WIDTH must be non-zero
+ * - IPA_HW_TBL_SYSADDR_ALIGN must be a non-zero power of 2
+ * - IPA_HW_TBL_HDR_WIDTH must be non-zero
+ *
+ * Values could differ for different versions of IPA hardware.
+ * These values are for v3.5.1, found in the SDM845.
+ */
+#define IPA_HW_TBL_WIDTH 8
+#define IPA_HW_TBL_SYSADDR_ALIGN 128
+#define IPA_HW_TBL_HDR_WIDTH 8
+
+/**
+ * ipahal_dma_shared_mem_write_pyld() - Write to shared memory command payload
+ *
+ * Return a pointer to the payload for a DMA shared memory write immediate
+ * command, or null if one can't be allocated. Result is dynamically
+ * allocated, and caller must ensure it gets released by providing it to
+ * ipahal_destroy_imm_cmd() when it is no longer needed.
+ *
+ * Return: Pointer to the immediate command payload, or NULL
+ */
+void *ipahal_dma_shared_mem_write_pyld(struct ipa_dma_mem *mem, u32 offset);
+
+/**
+ * ipahal_hdr_init_local_pyld() - Header initialization command payload
+ * mem: DMA buffer containing data for initialization
+ * offset: Where in location IPA local memory to write
+ *
+ * Return a pointer to the payload for a header init local immediate
+ * command, or null if one can't be allocated. Caller must ensure result
+ * gets released by providing it to ipahal_destroy_imm_cmd().
+ *
+ * Return: Pointer to the immediate command payload, or NULL
+ */
+void *ipahal_hdr_init_local_pyld(struct ipa_dma_mem *mem, u32 offset);
+
+/**
+ * ipahal_ip_v4_routing_init_pyld() - IPv4 routing table initialization payload
+ * mem: The IPv4 routing table data to be written
+ * hash_offset: The location in IPA memory for a hashed routing table
+ * nhash_offset: The location in IPA memory for a non-hashed routing table
+ *
+ * Return a pointer to the payload for an IPv4 routing init immediate
+ * command, or null if one can't be allocated. Caller must ensure result
+ * gets released by providing it to ipahal_destroy_imm_cmd().
+ *
+ * Return: Pointer to the immediate command payload, or NULL
+ */
+void *ipahal_ip_v4_routing_init_pyld(struct ipa_dma_mem *mem,
+ u32 hash_offset, u32 nhash_offset);
+
+/**
+ * ipahal_ip_v6_routing_init_pyld() - IPv6 routing table initialization payload
+ * mem: The IPv6 routing table data to be written
+ * hash_offset: The location in IPA memory for a hashed routing table
+ * nhash_offset: The location in IPA memory for a non-hashed routing table
+ *
+ * Return a pointer to the payload for an IPv4 routing init immediate
+ * command, or null if one can't be allocated. Caller must ensure result
+ * gets released by providing it to ipahal_destroy_imm_cmd().
+ *
+ * Return: Pointer to the immediate command payload, or NULL
+ */
+void *ipahal_ip_v6_routing_init_pyld(struct ipa_dma_mem *mem,
+ u32 hash_offset, u32 nhash_offset);
+
+/**
+ * ipahal_ip_v4_filter_init_pyld() - IPv4 filter table initialization payload
+ * mem: The IPv4 filter table data to be written
+ * hash_offset: The location in IPA memory for a hashed filter table
+ * nhash_offset: The location in IPA memory for a non-hashed filter table
+ *
+ * Return a pointer to the payload for an IPv4 filter init immediate
+ * command, or null if one can't be allocated. Caller must ensure result
+ * gets released by providing it to ipahal_destroy_imm_cmd().
+ *
+ * Return: Pointer to the immediate command payload, or NULL
+ */
+void *ipahal_ip_v4_filter_init_pyld(struct ipa_dma_mem *mem,
+ u32 hash_offset, u32 nhash_offset);
+
+/**
+ * ipahal_ip_v6_filter_init_pyld() - IPv6 filter table initialization payload
+ * mem: The IPv6 filter table data to be written
+ * hash_offset: The location in IPA memory for a hashed filter table
+ * nhash_offset: The location in IPA memory for a non-hashed filter table
+ *
+ * Return a pointer to the payload for an IPv4 filter init immediate
+ * command, or null if one can't be allocated. Caller must ensure result
+ * gets released by providing it to ipahal_destroy_imm_cmd().
+ *
+ * Return: Pointer to the immediate command payload, or NULL
+ */
+void *ipahal_ip_v6_filter_init_pyld(struct ipa_dma_mem *mem,
+ u32 hash_offset, u32 nhash_offset);
+
+/**
+ * ipahal_dma_task_32b_addr_pyld() - 32-bit DMA task command payload
+ * mem: DMA memory involved in the task
+ *
+ * Return a pointer to the payload for DMA task 32-bit address immediate
+ * command, or null if one can't be allocated. Caller must ensure result
+ * gets released by providing it to ipahal_destroy_imm_cmd().
+ */
+void *ipahal_dma_task_32b_addr_pyld(struct ipa_dma_mem *mem);
+
+/**
+ * ipahal_payload_free() - Release an allocated immediate command payload
+ * @payload: Payload to be released
+ */
+void ipahal_payload_free(void *payload);
+
+/**
+ * enum ipahal_pkt_status_opcode - Packet Status Opcode
+ * @IPAHAL_STATUS_OPCODE_PACKET_2ND_PASS: Packet Status generated as part of
+ * IPA second processing pass for a packet (i.e. IPA XLAT processing for
+ * the translated packet).
+ *
+ * The values assigned here are assumed by ipa_pkt_status_parse()
+ * to match values returned in the status_opcode field of a
+ * ipa_pkt_status_hw structure inserted by the IPA in received
+ * buffer.
+ */
+enum ipahal_pkt_status_opcode {
+ IPAHAL_PKT_STATUS_OPCODE_PACKET = 0x01,
+ IPAHAL_PKT_STATUS_OPCODE_NEW_FRAG_RULE = 0x02,
+ IPAHAL_PKT_STATUS_OPCODE_DROPPED_PACKET = 0x04,
+ IPAHAL_PKT_STATUS_OPCODE_SUSPENDED_PACKET = 0x08,
+ IPAHAL_PKT_STATUS_OPCODE_LOG = 0x10,
+ IPAHAL_PKT_STATUS_OPCODE_DCMP = 0x20,
+ IPAHAL_PKT_STATUS_OPCODE_PACKET_2ND_PASS = 0x40,
+};
+
+/**
+ * enum ipahal_pkt_status_exception - Packet Status exception type
+ * @IPAHAL_PKT_STATUS_EXCEPTION_PACKET_LENGTH: formerly IHL exception.
+ *
+ * Note: IPTYPE, PACKET_LENGTH and PACKET_THRESHOLD exceptions means that
+ * partial / no IP processing took place and corresponding Status Mask
+ * fields should be ignored. Flt and rt info is not valid.
+ *
+ * NOTE:: Any change to this enum, need to change to
+ * ipahal_pkt_status_exception_to_str array as well.
+ */
+enum ipahal_pkt_status_exception {
+ IPAHAL_PKT_STATUS_EXCEPTION_NONE = 0,
+ IPAHAL_PKT_STATUS_EXCEPTION_DEAGGR,
+ IPAHAL_PKT_STATUS_EXCEPTION_IPTYPE,
+ IPAHAL_PKT_STATUS_EXCEPTION_PACKET_LENGTH,
+ IPAHAL_PKT_STATUS_EXCEPTION_PACKET_THRESHOLD,
+ IPAHAL_PKT_STATUS_EXCEPTION_FRAG_RULE_MISS,
+ IPAHAL_PKT_STATUS_EXCEPTION_SW_FILT,
+ /* NAT and IPv6CT have the same value at HW.
+ * NAT for IPv4 and IPv6CT for IPv6 exceptions
+ */
+ IPAHAL_PKT_STATUS_EXCEPTION_NAT,
+ IPAHAL_PKT_STATUS_EXCEPTION_IPV6CT,
+ IPAHAL_PKT_STATUS_EXCEPTION_MAX,
+};
+
+/**
+ * enum ipahal_pkt_status_mask - Packet Status bitmask values of
+ * the contained flags. This bitmask indicates flags on the properties of
+ * the packet as well as IPA processing it may had.
+ * @TAG_VALID: Flag specifying if TAG and TAG info valid?
+ * @CKSUM_PROCESS: CSUM block processing flag: Was pkt processed by csum block?
+ * If so, csum trailer exists
+ */
+enum ipahal_pkt_status_mask {
+ /* Other values are defined but are not specifically handled yet. */
+ IPAHAL_PKT_STATUS_MASK_CKSUM_PROCESS = 0x0100,
+};
+
+/**
+ * struct ipahal_pkt_status - IPA status packet abstracted payload.
+ * @status_opcode: The type of status (Opcode).
+ * @exception: The first exception that took place.
+ * In case of exception, endp_src_idx and pkt_len are always valid.
+ * @status_mask: Bit mask for flags on several properties on the packet
+ * and processing it may passed at IPA.
+ * @pkt_len: Pkt pyld len including hdr and retained hdr if used. Does
+ * not include padding or checksum trailer len.
+ * @endp_src_idx: Source end point index.
+ * @endp_dest_idx: Destination end point index.
+ * Not valid in case of exception
+ * @metadata: meta data value used by packet
+ * @rt_miss: Routing miss flag: Was their a routing rule miss?
+ *
+ * This structure describes the status packet fields for the following
+ * status values: IPA_STATUS_PACKET, IPA_STATUS_DROPPED_PACKET,
+ * IPA_STATUS_SUSPENDED_PACKET. Other status types have different status
+ * packet structure. Note that the hardware supplies additional status
+ * information that is currently unused.
+ */
+struct ipahal_pkt_status {
+ enum ipahal_pkt_status_opcode status_opcode;
+ enum ipahal_pkt_status_exception exception;
+ enum ipahal_pkt_status_mask status_mask;
+ u32 pkt_len;
+ u8 endp_src_idx;
+ u8 endp_dest_idx;
+ u32 metadata;
+ bool rt_miss;
+};
+
+/**
+ * ipahal_pkt_status_get_size() - Get size of a hardware packet status
+ */
+u32 ipahal_pkt_status_get_size(void);
+
+/* ipahal_pkt_status_parse() - Parse packet status payload
+ * @unparsed_status: Packet status read from hardware
+ * @status: Buffer to hold parsed status information
+ */
+void ipahal_pkt_status_parse(const void *unparsed_status,
+ struct ipahal_pkt_status *status);
+
+int ipahal_init(void);
+void ipahal_exit(void);
+
+/* Does the given ID represent rule miss? */
+bool ipahal_is_rule_miss_id(u32 id);
+
+int ipahal_rt_generate_empty_img(u32 route_count, struct ipa_dma_mem *mem);
+int ipahal_flt_generate_empty_img(u64 ep_bitmap, struct ipa_dma_mem *mem);
+
+/**
+ * ipahal_free_empty_img() - Free empty filter or route image
+ * @mem: DMA memory containing filter/route data
+ */
+void ipahal_free_empty_img(struct ipa_dma_mem *mem);
+
+#endif /* _IPAHAL_H_ */
--
2.17.1
^ permalink raw reply related
* [RFC PATCH 05/12] soc: qcom: ipa: IPA interrupts and the microcontroller
From: Alex Elder @ 2018-11-07 0:32 UTC (permalink / raw)
To: davem, arnd, bjorn.andersson, ilias.apalodimas
Cc: netdev, devicetree, linux-arm-msm, linux-soc, linux-arm-kernel,
linux-kernel, syadagir, mjavid, robh+dt, mark.rutland
In-Reply-To: <20181107003250.5832-1-elder@linaro.org>
The IPA has an interrupt line distinct from the interrupt used by
the GSI code. Whereas GSI interrupts are generally related to
channel events (like transfer completions), IPA interrupts are
related to other events related to the IPA. When the IPA IRQ fires,
an IPA interrupt status register indicates which IPA interrupt
events are being signaled. IPA interrupts can be masked
independently, and can also be endependently enabled or disabled.
The IPA has an embedded microcontroller that can be used for
additional processing of messages passing through the IPA. This
feature is generally not used by the current code.
Currently only three IPA interrupts are used: one to trigger a
resume when in a suspended state; and two that allow the embedded
microcontroller to signal events.
Signed-off-by: Alex Elder <elder@linaro.org>
---
drivers/net/ipa/ipa_interrupts.c | 307 ++++++++++++++++++++++++++++
drivers/net/ipa/ipa_uc.c | 336 +++++++++++++++++++++++++++++++
2 files changed, 643 insertions(+)
create mode 100644 drivers/net/ipa/ipa_interrupts.c
create mode 100644 drivers/net/ipa/ipa_uc.c
diff --git a/drivers/net/ipa/ipa_interrupts.c b/drivers/net/ipa/ipa_interrupts.c
new file mode 100644
index 000000000000..75cd81a1eab0
--- /dev/null
+++ b/drivers/net/ipa/ipa_interrupts.c
@@ -0,0 +1,307 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
+ * Copyright (C) 2018 Linaro Ltd.
+ */
+
+/*
+ * DOC: IPA Interrupts
+ *
+ * The IPA has an interrupt line distinct from the interrupt used
+ * by the GSI code. Whereas GSI interrupts are generally related
+ * to channel events (like transfer completions), IPA interrupts are
+ * related to other events related to the IPA. Some of the IPA
+ * interrupts come from a microcontroller embedded in the IPA.
+ * Each IPA interrupt type can be both masked and acknowledged
+ * independent of the others,
+ *
+ * So two of the IPA interrupts are initiated by the microcontroller.
+ * A third can be generated to signal the need for a wakeup/resume
+ * when the IPA has been suspended. The modem can cause this event
+ * to occur (for example, for an incoming call). There are other IPA
+ * events defined, but at this time only these three are supported.
+ */
+
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/workqueue.h>
+
+#include "ipa_i.h"
+#include "ipa_reg.h"
+
+struct ipa_interrupt_info {
+ ipa_irq_handler_t handler;
+ enum ipa_irq_type interrupt;
+};
+
+#define IPA_IRQ_NUM_MAX 32 /* Number of IRQ bits in IPA interrupt mask */
+static struct ipa_interrupt_info ipa_interrupt_info[IPA_IRQ_NUM_MAX];
+
+static struct workqueue_struct *ipa_interrupt_wq;
+
+static void enable_tx_suspend_work_func(struct work_struct *work);
+static DECLARE_DELAYED_WORK(tx_suspend_work, enable_tx_suspend_work_func);
+
+static const int ipa_irq_mapping[] = {
+ [IPA_INVALID_IRQ] = -1,
+ [IPA_UC_IRQ_0] = 2,
+ [IPA_UC_IRQ_1] = 3,
+ [IPA_TX_SUSPEND_IRQ] = 14,
+};
+
+/* IPA interrupt handlers are called in contexts that can block */
+static void ipa_interrupt_work_func(struct work_struct *work);
+static DECLARE_WORK(ipa_interrupt_work, ipa_interrupt_work_func);
+
+/* Workaround disables TX_SUSPEND interrupt for this long */
+#define DISABLE_TX_SUSPEND_INTR_DELAY msecs_to_jiffies(5)
+
+/* Disable the IPA TX_SUSPEND interrupt, and arrange for it to be
+ * re-enabled again in 5 milliseconds.
+ *
+ * This is part of a hardware bug workaround.
+ */
+static void ipa_tx_suspend_interrupt_wa(void)
+{
+ u32 val;
+
+ val = ipa_read_reg_n(IPA_IRQ_EN_EE_N, IPA_EE_AP);
+ val &= ~BIT(ipa_irq_mapping[IPA_TX_SUSPEND_IRQ]);
+ ipa_write_reg_n(IPA_IRQ_EN_EE_N, IPA_EE_AP, val);
+
+ queue_delayed_work(ipa_interrupt_wq, &tx_suspend_work,
+ DISABLE_TX_SUSPEND_INTR_DELAY);
+}
+
+static void ipa_handle_interrupt(int irq_num)
+{
+ struct ipa_interrupt_info *intr_info = &ipa_interrupt_info[irq_num];
+ u32 endpoints = 0; /* Only TX_SUSPEND uses its interrupt_data */
+
+ if (!intr_info->handler)
+ return;
+
+ if (intr_info->interrupt == IPA_TX_SUSPEND_IRQ) {
+ /* Disable the suspend interrupt temporarily */
+ ipa_tx_suspend_interrupt_wa();
+
+ /* Get and clear mask of endpoints signaling TX_SUSPEND */
+ endpoints = ipa_read_reg_n(IPA_IRQ_SUSPEND_INFO_EE_N,
+ IPA_EE_AP);
+ ipa_write_reg_n(IPA_SUSPEND_IRQ_CLR_EE_N, IPA_EE_AP, endpoints);
+ }
+
+ intr_info->handler(intr_info->interrupt, endpoints);
+}
+
+static inline bool is_uc_irq(int irq_num)
+{
+ enum ipa_irq_type interrupt = ipa_interrupt_info[irq_num].interrupt;
+
+ return interrupt != IPA_UC_IRQ_0 && interrupt != IPA_UC_IRQ_1;
+}
+
+static void ipa_process_interrupts(void)
+{
+ while (true) {
+ u32 ipa_intr_mask;
+ u32 imask; /* one set bit */
+
+ /* Determine which interrupts have fired, then examine only
+ * those that are enabled. Note that a suspend interrupt
+ * bug forces us to re-read the enabled mask every time to
+ * avoid an endless loop.
+ */
+ ipa_intr_mask = ipa_read_reg_n(IPA_IRQ_STTS_EE_N, IPA_EE_AP);
+ ipa_intr_mask &= ipa_read_reg_n(IPA_IRQ_EN_EE_N, IPA_EE_AP);
+
+ if (!ipa_intr_mask)
+ break;
+
+ do {
+ int i = __ffs(ipa_intr_mask);
+ bool uc_irq = is_uc_irq(i);
+
+ imask = BIT(i);
+
+ /* Clear uC interrupt before processing to avoid
+ * clearing unhandled interrupts
+ */
+ if (uc_irq)
+ ipa_write_reg_n(IPA_IRQ_CLR_EE_N, IPA_EE_AP,
+ imask);
+
+ ipa_handle_interrupt(i);
+
+ /* Clear non-uC interrupt after processing
+ * to avoid clearing interrupt data
+ */
+ if (!uc_irq)
+ ipa_write_reg_n(IPA_IRQ_CLR_EE_N, IPA_EE_AP,
+ imask);
+ } while ((ipa_intr_mask ^= imask));
+ }
+}
+
+static void ipa_interrupt_work_func(struct work_struct *work)
+{
+ ipa_client_add();
+
+ ipa_process_interrupts();
+
+ ipa_client_remove();
+}
+
+static irqreturn_t ipa_isr(int irq, void *ctxt)
+{
+ /* Schedule handling (if not already scheduled) */
+ queue_work(ipa_interrupt_wq, &ipa_interrupt_work);
+
+ return IRQ_HANDLED;
+}
+
+/* Re-enable the IPA TX_SUSPEND interrupt after having been disabled
+ * for a moment by ipa_tx_suspend_interrupt_wa(). This is part of a
+ * workaround for a hardware bug.
+ */
+static void enable_tx_suspend_work_func(struct work_struct *work)
+{
+ u32 val;
+
+ ipa_client_add();
+
+ val = ipa_read_reg_n(IPA_IRQ_EN_EE_N, IPA_EE_AP);
+ val |= BIT(ipa_irq_mapping[IPA_TX_SUSPEND_IRQ]);
+ ipa_write_reg_n(IPA_IRQ_EN_EE_N, IPA_EE_AP, val);
+
+ ipa_process_interrupts();
+
+ ipa_client_remove();
+}
+
+/* Register SUSPEND_IRQ_EN_EE_N_ADDR for L2 interrupt. */
+static void tx_suspend_enable(void)
+{
+ enum ipa_client_type client;
+ u32 val = ~0;
+
+ /* Compute the mask to use (bits set for all non-modem endpoints) */
+ for (client = 0; client < IPA_CLIENT_MAX; client++)
+ if (ipa_modem_consumer(client) || ipa_modem_producer(client))
+ val &= ~BIT(ipa_client_ep_id(client));
+
+ ipa_write_reg_n(IPA_SUSPEND_IRQ_EN_EE_N, IPA_EE_AP, val);
+}
+
+/* Unregister SUSPEND_IRQ_EN_EE_N_ADDR for L2 interrupt. */
+static void tx_suspend_disable(void)
+{
+ ipa_write_reg_n(IPA_SUSPEND_IRQ_EN_EE_N, IPA_EE_AP, 0);
+}
+
+/**
+ * ipa_add_interrupt_handler() - Adds handler for an IPA interrupt
+ * @interrupt: IPA interrupt type
+ * @handler: The handler for that interrupt
+ *
+ * Adds handler to an IPA interrupt type and enable it. IPA interrupt
+ * handlers are allowed to block (they aren't run in interrupt context).
+ */
+void ipa_add_interrupt_handler(enum ipa_irq_type interrupt,
+ ipa_irq_handler_t handler)
+{
+ int irq_num = ipa_irq_mapping[interrupt];
+ struct ipa_interrupt_info *intr_info;
+ u32 val;
+
+ intr_info = &ipa_interrupt_info[irq_num];
+ intr_info->handler = handler;
+ intr_info->interrupt = interrupt;
+
+ /* Enable the IPA interrupt */
+ val = ipa_read_reg_n(IPA_IRQ_EN_EE_N, IPA_EE_AP);
+ val |= BIT(irq_num);
+ ipa_write_reg_n(IPA_IRQ_EN_EE_N, IPA_EE_AP, val);
+
+ if (interrupt == IPA_TX_SUSPEND_IRQ)
+ tx_suspend_enable();
+}
+
+/**
+ * ipa_remove_interrupt_handler() - Removes handler for an IPA interrupt type
+ * @interrupt: IPA interrupt type
+ *
+ * Remove an IPA interrupt handler and disable it.
+ */
+void ipa_remove_interrupt_handler(enum ipa_irq_type interrupt)
+{
+ int irq_num = ipa_irq_mapping[interrupt];
+ struct ipa_interrupt_info *intr_info;
+ u32 val;
+
+ intr_info = &ipa_interrupt_info[irq_num];
+ intr_info->handler = NULL;
+ intr_info->interrupt = IPA_INVALID_IRQ;
+
+ if (interrupt == IPA_TX_SUSPEND_IRQ)
+ tx_suspend_disable();
+
+ /* Disable the interrupt */
+ val = ipa_read_reg_n(IPA_IRQ_EN_EE_N, IPA_EE_AP);
+ val &= ~BIT(irq_num);
+ ipa_write_reg_n(IPA_IRQ_EN_EE_N, IPA_EE_AP, val);
+}
+
+/**
+ * ipa_interrupts_init() - Initialize the IPA interrupts framework
+ */
+int ipa_interrupts_init(void)
+{
+ int ret;
+
+ ret = request_irq(ipa_ctx->ipa_irq, ipa_isr, IRQF_TRIGGER_RISING,
+ "ipa", ipa_ctx->dev);
+ if (ret)
+ return ret;
+
+ ipa_interrupt_wq = alloc_ordered_workqueue("ipa_interrupt_wq", 0);
+ if (ipa_interrupt_wq)
+ return 0;
+
+ free_irq(ipa_ctx->ipa_irq, ipa_ctx->dev);
+
+ return -ENOMEM;
+}
+
+/**
+ * ipa_suspend_active_aggr_wa() - Emulate suspend interrupt
+ * @ep_id: Endpoint on which to emulate a suspend
+ *
+ * Emulate suspend IRQ to unsuspend a client suspended with an open
+ * aggregation frame. This is to work around a hardware issue
+ * where an IRQ is not generated as it should be when this occurs.
+ */
+void ipa_suspend_active_aggr_wa(u32 ep_id)
+{
+ struct ipa_reg_aggr_force_close force_close;
+ struct ipa_interrupt_info *intr_info;
+ u32 clnt_mask;
+ int irq_num;
+
+ irq_num = ipa_irq_mapping[IPA_TX_SUSPEND_IRQ];
+ intr_info = &ipa_interrupt_info[irq_num];
+ clnt_mask = BIT(ep_id);
+
+ /* Nothing to do if the endpoint doesn't have aggregation open */
+ if (!(ipa_read_reg(IPA_STATE_AGGR_ACTIVE) & clnt_mask))
+ return;
+
+ /* Force close aggregation */
+ ipa_reg_aggr_force_close(&force_close, clnt_mask);
+ ipa_write_reg_fields(IPA_AGGR_FORCE_CLOSE, &force_close);
+
+ /* Simulate suspend IRQ */
+ ipa_assert(!in_interrupt());
+ if (intr_info->handler)
+ intr_info->handler(intr_info->interrupt, clnt_mask);
+}
diff --git a/drivers/net/ipa/ipa_uc.c b/drivers/net/ipa/ipa_uc.c
new file mode 100644
index 000000000000..2065e53f3601
--- /dev/null
+++ b/drivers/net/ipa/ipa_uc.c
@@ -0,0 +1,336 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
+ * Copyright (C) 2018 Linaro Ltd.
+ */
+
+#include <linux/types.h>
+#include <linux/delay.h>
+
+#include "ipa_i.h"
+
+/**
+ * DOC: The IPA Embedded Microcontroller
+ *
+ * The IPA incorporates an embedded microcontroller that is able to
+ * do some additional handling/offloading of network activity. The
+ * current code makes essentially no use of the microcontroller.
+ * Despite not being used, the microcontroller still requires some
+ * initialization, and it needs to be notified in the event the AP
+ * crashes. The IPA embedded microcontroller represents another IPA
+ * execution environment (in addition to the AP subsystem and
+ * modem).
+ */
+
+/* Supports hardware interface version 0x2000 */
+
+#define IPA_RAM_UC_SMEM_SIZE 128 /* Size of shared memory area */
+
+/* Delay to allow a the microcontroller to save state when crashing */
+#define IPA_SEND_DELAY 100 /* microseconds */
+
+/*
+ * The IPA has an embedded microcontroller that is capable of doing
+ * more general-purpose processing, for example for handling certain
+ * exceptional conditions. When it has completed its boot sequence
+ * it signals the AP with an interrupt. At this time we don't use
+ * any of the microcontroller capabilities, but we do handle the
+ * "ready" interrupt. We also notify it (by sending it a special
+ * command) in the event of a crash.
+ *
+ * A 128 byte block of structured memory within the IPA SRAM is used
+ * to communicate between the AP and the microcontroller embedded in
+ * the IPA.
+ *
+ * To send a command to the microcontroller, the AP fills in the
+ * command opcode and command parameter fields in this area, then
+ * writes a register to signal to the microcontroller the command is
+ * available. When the microcontroller has executed the command, it
+ * writes response data to this shared area, then issues a response
+ * interrupt (micrcontroller IRQ 1) to the AP. The response
+ * includes a "response operation" that indicates the completion,
+ * along with a "response parameter" which encodes the original
+ * command and the command's status (result).
+ *
+ * The shared area is also used to communicate events asynchronously
+ * from the microcontroller to the AP. Events are signaled using
+ * the event interrupt (micrcontroller IRQ 0). The microcontroller
+ * fills in an "event operation" and "event parameter" before
+ * triggering the interrupt.
+ *
+ * Some additional information is also found in this shared area,
+ * but is currently unused by the IPA driver.
+ *
+ * All other space in the shared area is reserved, and must not be
+ * read or written by the AP.
+ */
+
+/** struct ipa_uc_shared_area - AP/microcontroller shared memory area
+ *
+ * @command: command code (AP->microcontroller)
+ * @command_param: low 32 bits of command parameter (AP->microcontroller)
+ * @command_param_hi: high 32 bits of command parameter (AP->microcontroller)
+ *
+ * @response: response code (microcontroller->AP)
+ * @response_param: response parameter (microcontroller->AP)
+ *
+ * @event: event code (microcontroller->AP)
+ * @event_param: event parameter (microcontroller->AP)
+ *
+ * @first_error_address: address of first error-source on SNOC
+ * @hw_state: state of hardware (including error type information)
+ * @warning_counter: counter of non-fatal hardware errors
+ * @interface_version: hardware-reported interface version
+ */
+struct ipa_uc_shared_area {
+ u32 command : 8; /* enum ipa_uc_command */
+ /* 3 reserved bytes */
+ u32 command_param;
+ u32 command_param_hi;
+
+ u32 response : 8; /* enum ipa_uc_response */
+ /* 3 reserved bytes */
+ u32 response_param;
+
+ u32 event : 8; /* enum ipa_uc_event */
+ /* 3 reserved bytes */
+ u32 event_param;
+
+ u32 first_error_address;
+ u32 hw_state : 8,
+ warning_counter : 8,
+ reserved : 16;
+ u32 interface_version : 16;
+ /* 2 reserved bytes */
+};
+
+/** struct ipa_uc_ctx - IPA microcontroller context
+ *
+ * @uc_loaded: whether microcontroller has been loaded
+ * @shared: pointer to AP/microcontroller shared memory area
+ */
+struct ipa_uc_ctx {
+ bool uc_loaded;
+ struct ipa_uc_shared_area *shared;
+} ipa_uc_ctx;
+
+/*
+ * Microcontroller event codes, error codes, commands, and responses
+ * to commands all encode both a "code" and a "feature" in their
+ * 8-bit numeric value. The top 3 bits represent the feature, and
+ * the bottom 5 bits represent the code. A "common" feature uses
+ * feature code 0, and at this time we only deal with common
+ * features. Because of this we can just ignore the feature bits
+ * and define the values of symbols in the following enumerated
+ * types by just their code values.
+ */
+
+/** enum ipa_uc_event - common cpu events (microcontroller->AP)
+ *
+ * @IPA_UC_EVENT_NO_OP: no event present
+ * @IPA_UC_EVENT_ERROR: system error has been detected
+ * @IPA_UC_EVENT_LOG_INFO: logging information available
+ */
+enum ipa_uc_event {
+ IPA_UC_EVENT_NO_OP = 0,
+ IPA_UC_EVENT_ERROR = 1,
+ IPA_UC_EVENT_LOG_INFO = 2,
+};
+
+/** enum ipa_uc_error - common error types (microcontroller->AP)
+ *
+ * @IPA_UC_ERROR_NONE: no error
+ * @IPA_UC_ERROR_INVALID_DOORBELL: invalid data read from doorbell
+ * @IPA_UC_ERROR_DMA: unexpected DMA error
+ * @IPA_UC_ERROR_FATAL_SYSTEM: microcontroller has crashed and requires reset
+ * @IPA_UC_ERROR_INVALID_OPCODE: invalid opcode sent
+ * @IPA_UC_ERROR_INVALID_PARAMS: invalid params for the requested command
+ * @IPA_UC_ERROR_CONS_DISABLE_CMD_GSI_STOP: consumer endpoint stop failure
+ * @IPA_UC_ERROR_PROD_DISABLE_CMD_GSI_STOP: producer endpoint stop failure
+ * @IPA_UC_ERROR_CH_NOT_EMPTY: micrcontroller GSI channel is not empty
+ */
+enum ipa_uc_error {
+ IPA_UC_ERROR_NONE = 0,
+ IPA_UC_ERROR_INVALID_DOORBELL = 1,
+ IPA_UC_ERROR_DMA = 2,
+ IPA_UC_ERROR_FATAL_SYSTEM = 3,
+ IPA_UC_ERROR_INVALID_OPCODE = 4,
+ IPA_UC_ERROR_INVALID_PARAMS = 5,
+ IPA_UC_ERROR_CONS_DISABLE_CMD_GSI_STOP = 6,
+ IPA_UC_ERROR_PROD_DISABLE_CMD_GSI_STOP = 7,
+ IPA_UC_ERROR_CH_NOT_EMPTY = 8,
+};
+
+/** enum ipa_uc_command - commands from the AP to the microcontroller
+ *
+ * @IPA_UC_COMMAND_NO_OP: no operation
+ * @IPA_UC_COMMAND_UPDATE_FLAGS: request to re-read configuration flags
+ * @IPA_UC_COMMAND_DEBUG_RUN_TEST: request to run hardware test
+ * @IPA_UC_COMMAND_DEBUG_GET_INFO: request to read internal debug information
+ * @IPA_UC_COMMAND_ERR_FATAL: AP system crash notification
+ * @IPA_UC_COMMAND_CLK_GATE: request hardware to enter clock gated state
+ * @IPA_UC_COMMAND_CLK_UNGATE: request hardware to enter clock ungated state
+ * @IPA_UC_COMMAND_MEMCPY: request hardware to perform memcpy
+ * @IPA_UC_COMMAND_RESET_PIPE: request endpoint reset
+ * @IPA_UC_COMMAND_REG_WRITE: request a register be written
+ * @IPA_UC_COMMAND_GSI_CH_EMPTY: request to determine whether channel is empty
+ */
+enum ipa_uc_command {
+ IPA_UC_COMMAND_NO_OP = 0,
+ IPA_UC_COMMAND_UPDATE_FLAGS = 1,
+ IPA_UC_COMMAND_DEBUG_RUN_TEST = 2,
+ IPA_UC_COMMAND_DEBUG_GET_INFO = 3,
+ IPA_UC_COMMAND_ERR_FATAL = 4,
+ IPA_UC_COMMAND_CLK_GATE = 5,
+ IPA_UC_COMMAND_CLK_UNGATE = 6,
+ IPA_UC_COMMAND_MEMCPY = 7,
+ IPA_UC_COMMAND_RESET_PIPE = 8,
+ IPA_UC_COMMAND_REG_WRITE = 9,
+ IPA_UC_COMMAND_GSI_CH_EMPTY = 10,
+};
+
+/** enum ipa_uc_response - common hardware response codes
+ *
+ * @IPA_UC_RESPONSE_NO_OP: no operation
+ * @IPA_UC_RESPONSE_INIT_COMPLETED: microcontroller ready
+ * @IPA_UC_RESPONSE_CMD_COMPLETED: AP-issued command has completed
+ * @IPA_UC_RESPONSE_DEBUG_GET_INFO: get debug info
+ */
+enum ipa_uc_response {
+ IPA_UC_RESPONSE_NO_OP = 0,
+ IPA_UC_RESPONSE_INIT_COMPLETED = 1,
+ IPA_UC_RESPONSE_CMD_COMPLETED = 2,
+ IPA_UC_RESPONSE_DEBUG_GET_INFO = 3,
+};
+
+/** union ipa_uc_event_data - microcontroller->AP event data
+ *
+ * @error_type: ipa_uc_error error type value
+ * @raw32b: 32-bit register value (used when reading)
+ */
+union ipa_uc_event_data {
+ u8 error_type; /* enum ipa_uc_error */
+ u32 raw32b;
+} __packed;
+
+/** union ipa_uc_response_data - response to AP command
+ *
+ * @command: the AP issued command this is responding to
+ * @status: 0 for success indication, otherwise failure
+ * @raw32b: 32-bit register value (used when reading)
+ */
+union ipa_uc_response_data {
+ struct ipa_uc_response_param {
+ u8 command; /* enum ipa_uc_command */
+ u8 status; /* enum ipa_uc_error */
+ } params;
+ u32 raw32b;
+} __packed;
+
+/** ipa_uc_loaded() - tell whether the microcontroller has been loaded
+ *
+ * Returns true if the microcontroller is loaded, false otherwise
+ */
+bool ipa_uc_loaded(void)
+{
+ return ipa_uc_ctx.uc_loaded;
+}
+
+static void
+ipa_uc_event_handler(enum ipa_irq_type interrupt, u32 interrupt_data)
+{
+ struct ipa_uc_shared_area *shared = ipa_uc_ctx.shared;
+ union ipa_uc_event_data event_param;
+ u8 event;
+
+ event = shared->event;
+ event_param.raw32b = shared->event_param;
+
+ /* General handling */
+ if (event == IPA_UC_EVENT_ERROR) {
+ ipa_err("uC error type 0x%02x timestamp 0x%08x\n",
+ event_param.error_type, ipa_read_reg(IPA_TAG_TIMER));
+ ipa_bug();
+ } else {
+ ipa_err("unsupported uC event opcode=%u\n", event);
+ }
+}
+
+static void
+ipa_uc_response_hdlr(enum ipa_irq_type interrupt, u32 interrupt_data)
+{
+ struct ipa_uc_shared_area *shared = ipa_uc_ctx.shared;
+ union ipa_uc_response_data response_data;
+ u8 response;
+
+ response = shared->response;
+
+ /* An INIT_COMPLETED response message is sent to the AP by
+ * the microcontroller when it is operational. Other than
+ * this, the AP should only receive responses from the
+ * microntroller when it has sent it a request message.
+ */
+ if (response == IPA_UC_RESPONSE_INIT_COMPLETED) {
+ /* The proxy vote is held until uC is loaded to ensure that
+ * IPA_HW_2_CPU_RESPONSE_INIT_COMPLETED is received.
+ */
+ ipa_proxy_clk_unvote();
+ ipa_uc_ctx.uc_loaded = true;
+ } else if (response == IPA_UC_RESPONSE_CMD_COMPLETED) {
+ response_data.raw32b = shared->response_param;
+ ipa_err("uC command response code %u status %u\n",
+ response_data.params.command,
+ response_data.params.status);
+ } else {
+ ipa_err("Unsupported uC rsp opcode = %u\n", response);
+ }
+}
+
+/** ipa_uc_init() - Initialize the microcontroller
+ *
+ * Returns pointer to microcontroller context on success, NULL otherwise
+ */
+struct ipa_uc_ctx *ipa_uc_init(phys_addr_t phys_addr)
+{
+ phys_addr += ipa_reg_n_offset(IPA_SRAM_DIRECT_ACCESS_N, 0);
+ ipa_uc_ctx.shared = ioremap(phys_addr, IPA_RAM_UC_SMEM_SIZE);
+ if (!ipa_uc_ctx.shared)
+ return NULL;
+
+ ipa_add_interrupt_handler(IPA_UC_IRQ_0, ipa_uc_event_handler);
+ ipa_add_interrupt_handler(IPA_UC_IRQ_1, ipa_uc_response_hdlr);
+
+ return &ipa_uc_ctx;
+}
+
+/* Send a command to the microcontroller */
+static void send_uc_command(u32 command, u32 command_param)
+{
+ struct ipa_uc_shared_area *shared = ipa_uc_ctx.shared;
+
+ shared->command = command;
+ shared->command_param = command_param;
+ shared->command_param_hi = 0;
+ shared->response = 0;
+ shared->response_param = 0;
+
+ wmb(); /* ensure write to shared memory is done before triggering uc */
+
+ ipa_write_reg_n(IPA_IRQ_EE_UC_N, IPA_EE_AP, 0x1);
+}
+
+void ipa_uc_panic_notifier(void)
+{
+ if (!ipa_uc_ctx.uc_loaded)
+ return;
+
+ if (!ipa_client_add_additional())
+ return;
+
+ send_uc_command(IPA_UC_COMMAND_ERR_FATAL, 0);
+
+ /* give uc enough time to save state */
+ udelay(IPA_SEND_DELAY);
+
+ ipa_client_remove();
+}
--
2.17.1
^ permalink raw reply related
* [RFC PATCH 06/12] soc: qcom: ipa: QMI modem communication
From: Alex Elder @ 2018-11-07 0:32 UTC (permalink / raw)
To: davem, arnd, bjorn.andersson, ilias.apalodimas
Cc: netdev, devicetree, linux-arm-msm, linux-soc, linux-arm-kernel,
linux-kernel, syadagir, mjavid, robh+dt, mark.rutland
In-Reply-To: <20181107003250.5832-1-elder@linaro.org>
QMI is a mechanism that allows entities on the AP to communicate and
coordinate with peer entities on a modem. Each peer can create an
endpoint for communicating with the other. QMI defines a way for
the format of messages sent between endpoints to be described, and
uses a service to route and deliver these messages.
For IPA, QMI is used to synchronize the startup sequence of the IPA
drivers resident on the AP and modem. The documentation in
"ipa_qmi.c" below provides more detail about the message interchange
involved. The IPA QMI code is divided into the "main" code that
implements message handling and synchronization, and the message
code that defines the structure and layout of the messages used.
Signed-off-by: Alex Elder <elder@linaro.org>
---
drivers/net/ipa/ipa_qmi.c | 406 +++++++++++++++++++++++
drivers/net/ipa/ipa_qmi.h | 12 +
drivers/net/ipa/ipa_qmi_msg.c | 587 ++++++++++++++++++++++++++++++++++
drivers/net/ipa/ipa_qmi_msg.h | 233 ++++++++++++++
4 files changed, 1238 insertions(+)
create mode 100644 drivers/net/ipa/ipa_qmi.c
create mode 100644 drivers/net/ipa/ipa_qmi.h
create mode 100644 drivers/net/ipa/ipa_qmi_msg.c
create mode 100644 drivers/net/ipa/ipa_qmi_msg.h
diff --git a/drivers/net/ipa/ipa_qmi.c b/drivers/net/ipa/ipa_qmi.c
new file mode 100644
index 000000000000..a19cfc4043d3
--- /dev/null
+++ b/drivers/net/ipa/ipa_qmi.c
@@ -0,0 +1,406 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/* Copyright (c) 2013-2018, The Linux Foundation. All rights reserved.
+ * Copyright (C) 2018 Linaro Ltd.
+ */
+
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/slab.h>
+#include <linux/qrtr.h>
+#include <linux/soc/qcom/qmi.h>
+
+#include "ipa_qmi_msg.h"
+
+#include "ipa_i.h" /* ipa_err() */
+
+#define QMI_INIT_DRIVER_TIMEOUT 60000 /* A minute in milliseconds */
+
+static bool ipa_qmi_initialized;
+
+/* The AP and modem perform a "handshake" at initialization time to
+ * ensure each side knows the other side is ready. Two pairs of QMI
+ * handles (endpoints) are used for this; one provides service on
+ * the modem for AP requests, and the other is on the AP to service
+ * modem requests (and to supply an indication from the AP).
+ *
+ * The QMI service on the modem expects to receive an INIT_DRIVER
+ * request from the AP, which contains parameters used by the
+ * modem during initialization. The AP sends this request as soon
+ * as it is knows the service is available. The modem responds to
+ * this request immediately.
+ *
+ * When the modem learns the AP service is available, it is able
+ * to communicate its status to the AP. The modem uses this to
+ * tell the AP when it is ready to receive an indication, sending
+ * an INDICATION_REGISTER request to the handle served by the AP.
+ * This is separate from the modem driver initialization.
+ *
+ * When the modem has completed the driver initialization requested
+ * by the AP, it sends a DRIVER_INIT_COMPLETE request to the AP.
+ * This request could arrive at the AP either before or after the
+ * INDICATION_REGISTER request.
+ *
+ * The final step in the handshake occurs after the AP has received
+ * both requests from the modem. The AP completes the handshake by
+ * sending an INIT_COMPLETE_IND indication message to the modem.
+ */
+
+#define IPA_HOST_SERVICE_SVC_ID 0x31
+#define IPA_HOST_SVC_VERS 1
+#define IPA_HOST_SERVICE_INS_ID 1
+
+#define IPA_MODEM_SERVICE_SVC_ID 0x31
+#define IPA_MODEM_SERVICE_INS_ID 2
+#define IPA_MODEM_SVC_VERS 1
+
+/* Used to send an INIT_DRIVER request to the modem */
+static struct qmi_handle client_handle;
+
+/* Requests from the modem arrive on the server handle to tell us
+ * when it is prepared to receive an INIT_COMPLETE indication, and
+ * when its driver initialization is complete. The AP sends the
+ * indication after it has received and responded to both requests.
+ */
+static struct qmi_handle server_handle;
+
+/* These track state during the handshake */
+static bool indication_register_received;
+static bool init_driver_response_received;
+
+/* Send an INIT_COMPLETE_IND indication message to the modem */
+static int ipa_send_master_driver_init_complete_ind(struct qmi_handle *qmi,
+ struct sockaddr_qrtr *sq)
+{
+ struct ipa_init_complete_ind ind = { };
+
+ ind.status.result = QMI_RESULT_SUCCESS_V01;
+ ind.status.error = QMI_ERR_NONE_V01;
+
+ return qmi_send_indication(qmi, sq, IPA_QMI_INIT_COMPLETE_IND,
+ IPA_QMI_INIT_COMPLETE_IND_SZ,
+ ipa_init_complete_ind_ei, &ind);
+}
+
+/* This function is called to determine whether to complete the
+ * handshake by sending an INIT_COMPLETE_IND indication message to
+ * the modem. The "init_driver" parameter is false when we've
+ * received an INDICATION_REGISTER request message from the modem,
+ * or true when we've received the response from the INIT_DRIVER
+ * request message we send. If this function decides the message
+ * should be sent, it calls ipa_send_master_driver_init_complete_ind()
+ * to send it.
+ */
+static void ipa_handshake_complete(struct qmi_handle *qmi,
+ struct sockaddr_qrtr *sq, bool init_driver)
+{
+ bool send_it;
+ int ret;
+
+ if (init_driver) {
+ init_driver_response_received = true;
+ send_it = indication_register_received;
+ } else {
+ indication_register_received = true;
+ send_it = init_driver_response_received;
+ }
+ if (!send_it)
+ return;
+
+ ret = ipa_send_master_driver_init_complete_ind(qmi, sq);
+ if (ret)
+ ipa_err("error %d sending init complete indication\n", ret);
+}
+
+/* Callback function to handle an INDICATION_REGISTER request message
+ * from the modem. This informs the AP that the modem is now ready to
+ * receive the INIT_COMPLETE_IND indication message.
+ */
+static void ipa_indication_register_fn(struct qmi_handle *qmi,
+ struct sockaddr_qrtr *sq,
+ struct qmi_txn *txn,
+ const void *decoded)
+{
+ struct ipa_indication_register_rsp rsp = { };
+ int ret;
+
+ rsp.rsp.result = QMI_RESULT_SUCCESS_V01;
+ rsp.rsp.error = QMI_ERR_NONE_V01;
+
+ ret = qmi_send_response(qmi, sq, txn, IPA_QMI_INDICATION_REGISTER,
+ IPA_QMI_INDICATION_REGISTER_RSP_SZ,
+ ipa_indication_register_rsp_ei, &rsp);
+ if (ret)
+ ipa_err("error %d sending response\n", ret);
+ else
+ ipa_handshake_complete(qmi, sq, false);
+}
+
+/* Callback function to handle a DRIVER_INIT_COMPLETE request message
+ * from the modem. This informs the AP that the modem has completed
+ * the initializion of its driver.
+ */
+static void ipa_driver_init_complete_fn(struct qmi_handle *qmi,
+ struct sockaddr_qrtr *sq,
+ struct qmi_txn *txn,
+ const void *decoded)
+{
+ struct ipa_driver_init_complete_rsp rsp = { };
+ int ret;
+
+ rsp.rsp.result = QMI_RESULT_SUCCESS_V01;
+ rsp.rsp.error = QMI_ERR_NONE_V01;
+
+ ret = qmi_send_response(qmi, sq, txn, IPA_QMI_DRIVER_INIT_COMPLETE,
+ IPA_QMI_DRIVER_INIT_COMPLETE_RSP_SZ,
+ ipa_driver_init_complete_rsp_ei, &rsp);
+ if (ret)
+ ipa_err("error %d sending response\n", ret);
+}
+
+/* The server handles two request message types sent by the modem. */
+static struct qmi_msg_handler ipa_server_msg_handlers[] = {
+ {
+ .type = QMI_REQUEST,
+ .msg_id = IPA_QMI_INDICATION_REGISTER,
+ .ei = ipa_indication_register_req_ei,
+ .decoded_size = IPA_QMI_INDICATION_REGISTER_REQ_SZ,
+ .fn = ipa_indication_register_fn,
+ },
+ {
+ .type = QMI_REQUEST,
+ .msg_id = IPA_QMI_DRIVER_INIT_COMPLETE,
+ .ei = ipa_driver_init_complete_req_ei,
+ .decoded_size = IPA_QMI_DRIVER_INIT_COMPLETE_REQ_SZ,
+ .fn = ipa_driver_init_complete_fn,
+ },
+};
+
+/* Callback function to handle an IPA_QMI_INIT_DRIVER response message
+ * from the modem. This only acknowledges that the modem received the
+ * request. The modem will eventually report that it has completed its
+ * modem initialization by sending a IPA_QMI_DRIVER_INIT_COMPLETE request.
+ */
+static void ipa_init_driver_rsp_fn(struct qmi_handle *qmi,
+ struct sockaddr_qrtr *sq,
+ struct qmi_txn *txn,
+ const void *decoded)
+{
+ txn->result = 0; /* IPA_QMI_INIT_DRIVER request was successful */
+ complete(&txn->completion);
+
+ ipa_handshake_complete(qmi, sq, true);
+}
+
+/* The client handles one response message type sent by the modem. */
+static struct qmi_msg_handler ipa_client_msg_handlers[] = {
+ {
+ .type = QMI_RESPONSE,
+ .msg_id = IPA_QMI_INIT_DRIVER,
+ .ei = ipa_init_modem_driver_rsp_ei,
+ .decoded_size = IPA_QMI_INIT_DRIVER_RSP_SZ,
+ .fn = ipa_init_driver_rsp_fn,
+ },
+};
+
+/* Return a pointer to an init modem driver request structure, which
+ * contains configuration parameters for the modem. The modem may
+ * be started multiple times, but generally these parameters don't
+ * change so we can reuse the request structure once it's initialized.
+ * The only exception is the skip_uc_load field, which will be set
+ * only after the microcontroller has reported it has completed its
+ * initialization.
+ */
+static const struct ipa_init_modem_driver_req *init_modem_driver_req(void)
+{
+ static struct ipa_init_modem_driver_req req;
+ u32 base;
+
+ /* This is not the first boot if the microcontroller is loaded */
+ req.skip_uc_load = ipa_uc_loaded() ? 1 : 0;
+ req.skip_uc_load_valid = true;
+
+ /* We only have to initialize most of it once */
+ if (req.platform_type_valid)
+ return &req;
+
+ /* All offsets are relative to the start of IPA shared memory */
+ base = (u32)ipa_ctx->smem_offset;
+
+ req.platform_type_valid = true;
+ req.platform_type = IPA_QMI_PLATFORM_TYPE_MSM_ANDROID;
+
+ req.hdr_tbl_info_valid = IPA_MEM_MODEM_HDR_SIZE ? 1 : 0;
+ req.hdr_tbl_info.start = base + IPA_MEM_MODEM_HDR_OFST;
+ req.hdr_tbl_info.end = req.hdr_tbl_info.start +
+ IPA_MEM_MODEM_HDR_SIZE - 1;
+
+ req.v4_route_tbl_info_valid = true;
+ req.v4_route_tbl_info.start = base + IPA_MEM_V4_RT_NHASH_OFST;
+ req.v4_route_tbl_info.count = IPA_MEM_MODEM_RT_COUNT;
+
+ req.v6_route_tbl_info_valid = true;
+ req.v6_route_tbl_info.start = base + IPA_MEM_V6_RT_NHASH_OFST;
+ req.v6_route_tbl_info.count = IPA_MEM_MODEM_RT_COUNT;
+
+ req.v4_filter_tbl_start_valid = true;
+ req.v4_filter_tbl_start = base + IPA_MEM_V4_FLT_NHASH_OFST;
+
+ req.v6_filter_tbl_start_valid = true;
+ req.v6_filter_tbl_start = base + IPA_MEM_V6_FLT_NHASH_OFST;
+
+ req.modem_mem_info_valid = IPA_MEM_MODEM_SIZE ? 1 : 0;
+ req.modem_mem_info.start = base + IPA_MEM_MODEM_OFST;
+ req.modem_mem_info.size = IPA_MEM_MODEM_SIZE;
+
+ req.ctrl_comm_dest_end_pt_valid = true;
+ req.ctrl_comm_dest_end_pt = ipa_client_ep_id(IPA_CLIENT_APPS_WAN_CONS);
+
+ req.hdr_proc_ctx_tbl_info_valid =
+ IPA_MEM_MODEM_HDR_PROC_CTX_SIZE ? 1 : 0;
+ req.hdr_proc_ctx_tbl_info.start =
+ base + IPA_MEM_MODEM_HDR_PROC_CTX_OFST;
+ req.hdr_proc_ctx_tbl_info.end = req.hdr_proc_ctx_tbl_info.start +
+ IPA_MEM_MODEM_HDR_PROC_CTX_SIZE - 1;
+
+ req.v4_hash_route_tbl_info_valid = true;
+ req.v4_hash_route_tbl_info.start = base + IPA_MEM_V4_RT_HASH_OFST;
+ req.v4_hash_route_tbl_info.count = IPA_MEM_MODEM_RT_COUNT;
+
+ req.v6_hash_route_tbl_info_valid = true;
+ req.v6_hash_route_tbl_info.start = base + IPA_MEM_V6_RT_HASH_OFST;
+ req.v6_hash_route_tbl_info.count = IPA_MEM_MODEM_RT_COUNT;
+
+ req.v4_hash_filter_tbl_start_valid = true;
+ req.v4_hash_filter_tbl_start = base + IPA_MEM_V4_FLT_HASH_OFST;
+
+ req.v6_hash_filter_tbl_start_valid = true;
+ req.v6_hash_filter_tbl_start = base + IPA_MEM_V6_FLT_HASH_OFST;
+
+ return &req;
+}
+
+/* The modem service we requested is now available via the client
+ * handle. Send an INIT_DRIVER request to the modem.
+ */
+static int
+ipa_client_new_server(struct qmi_handle *qmi, struct qmi_service *svc)
+{
+ const struct ipa_init_modem_driver_req *req = init_modem_driver_req();
+ struct sockaddr_qrtr sq;
+ struct qmi_txn *txn;
+ int ret;
+
+ txn = kzalloc(sizeof(*txn), GFP_KERNEL);
+ if (!txn)
+ return -ENOMEM;
+
+ ret = qmi_txn_init(qmi, txn, NULL, NULL);
+ if (ret) {
+ kfree(txn);
+ return ret;
+ }
+
+ sq.sq_family = AF_QIPCRTR;
+ sq.sq_node = svc->node;
+ sq.sq_port = svc->port;
+
+ ret = qmi_send_request(qmi, &sq, txn, IPA_QMI_INIT_DRIVER,
+ IPA_QMI_INIT_DRIVER_REQ_SZ,
+ ipa_init_modem_driver_req_ei, req);
+ if (!ret)
+ ret = qmi_txn_wait(txn, MAX_SCHEDULE_TIMEOUT);
+ if (ret)
+ qmi_txn_cancel(txn);
+ kfree(txn);
+
+ return ret;
+}
+
+/* The only callback we supply for the client handle is notification
+ * that the service on the modem has become available.
+ */
+static struct qmi_ops ipa_client_ops = {
+ .new_server = ipa_client_new_server,
+};
+
+static int ipa_qmi_initialize(void)
+{
+ int ret;
+
+ /* The only handle operation that might be interesting for the
+ * server would be del_client, to find out when the modem side
+ * client has disappeared. But other than reporting the event,
+ * we wouldn't do anything about that. So we just pass a null
+ * pointer for its handle operations. All the real work is
+ * done by the message handlers.
+ */
+ ret = qmi_handle_init(&server_handle, IPA_QMI_SERVER_MAX_RCV_SZ,
+ NULL, ipa_server_msg_handlers);
+ if (ret < 0)
+ return ret;
+
+ ret = qmi_add_server(&server_handle, IPA_HOST_SERVICE_SVC_ID,
+ IPA_HOST_SVC_VERS, IPA_HOST_SERVICE_INS_ID);
+ if (ret < 0)
+ goto err_release_server_handle;
+
+ /* The client handle is only used for sending an INIT_DRIVER
+ * request to the modem, and receiving its response message.
+ */
+ ret = qmi_handle_init(&client_handle, IPA_QMI_CLIENT_MAX_RCV_SZ,
+ &ipa_client_ops, ipa_client_msg_handlers);
+ if (ret < 0)
+ goto err_release_server_handle;
+
+ ret = qmi_add_lookup(&client_handle, IPA_MODEM_SERVICE_SVC_ID,
+ IPA_MODEM_SVC_VERS, IPA_MODEM_SERVICE_INS_ID);
+ if (ret < 0)
+ goto err_release_client_handle;
+
+ ipa_qmi_initialized = true;
+
+ return 0;
+
+err_release_client_handle:
+ /* Releasing the handle also removes registered lookups */
+ qmi_handle_release(&client_handle);
+ memset(&client_handle, 0, sizeof(client_handle));
+err_release_server_handle:
+ /* Releasing the handle also removes registered services */
+ qmi_handle_release(&server_handle);
+ memset(&server_handle, 0, sizeof(server_handle));
+
+ return ret;
+}
+
+/* This is called by the rmnet probe routine. The rmnet driver can
+ * be unregistered after it has been initialized as a result of a
+ * subsystem shutdown; it can later be registered again if a
+ * subsystem restart occurs. This function can therefore be called
+ * more than once.
+ */
+int ipa_qmi_init(void)
+{
+ init_driver_response_received = false;
+ indication_register_received = false;
+
+ if (!ipa_qmi_initialized)
+ return ipa_qmi_initialize();
+
+ return 0;
+}
+
+void ipa_qmi_exit(void)
+{
+ if (!ipa_qmi_initialized)
+ return;
+
+ qmi_handle_release(&client_handle);
+ memset(&client_handle, 0, sizeof(client_handle));
+
+ qmi_handle_release(&server_handle);
+ memset(&server_handle, 0, sizeof(server_handle));
+
+ ipa_qmi_initialized = false;
+}
diff --git a/drivers/net/ipa/ipa_qmi.h b/drivers/net/ipa/ipa_qmi.h
new file mode 100644
index 000000000000..3c03ff5c0454
--- /dev/null
+++ b/drivers/net/ipa/ipa_qmi.h
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ * Copyright (C) 2018 Linaro Ltd.
+ */
+#ifndef _IPA_QMI_H_
+#define _IPA_QMI_H_
+
+int ipa_qmi_init(void);
+void ipa_qmi_exit(void);
+
+#endif /* !_IPA_QMI_H_ */
diff --git a/drivers/net/ipa/ipa_qmi_msg.c b/drivers/net/ipa/ipa_qmi_msg.c
new file mode 100644
index 000000000000..c5347c63ef41
--- /dev/null
+++ b/drivers/net/ipa/ipa_qmi_msg.c
@@ -0,0 +1,587 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ * Copyright (C) 2018 Linaro Ltd.
+ */
+#include <linux/stddef.h>
+#include <linux/soc/qcom/qmi.h>
+
+#include "ipa_qmi_msg.h"
+
+#ifndef sizeof_field
+#define sizeof_field(TYPE, MEMBER) sizeof(((TYPE *)0)->MEMBER)
+#endif /* !sizeof_field */
+
+/* QMI message structure definition for struct ipa_indication_register_req */
+struct qmi_elem_info ipa_indication_register_req_ei[] = {
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_indication_register_req,
+ master_driver_init_complete_valid),
+ .tlv_type = 0x10,
+ .offset = offsetof(struct ipa_indication_register_req,
+ master_driver_init_complete_valid),
+ },
+ {
+ .data_type = QMI_UNSIGNED_1_BYTE,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_indication_register_req,
+ master_driver_init_complete),
+ .tlv_type = 0x10,
+ .offset = offsetof(struct ipa_indication_register_req,
+ master_driver_init_complete),
+ },
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_indication_register_req,
+ data_usage_quota_reached_valid),
+ .tlv_type = 0x11,
+ .offset = offsetof(struct ipa_indication_register_req,
+ data_usage_quota_reached_valid),
+ },
+ {
+ .data_type = QMI_UNSIGNED_1_BYTE,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_indication_register_req,
+ data_usage_quota_reached),
+ .tlv_type = 0x11,
+ .offset = offsetof(struct ipa_indication_register_req,
+ data_usage_quota_reached),
+ },
+ {
+ .data_type = QMI_EOTI,
+ },
+};
+
+/* QMI message structure definition for struct ipa_indication_register_rsp */
+struct qmi_elem_info ipa_indication_register_rsp_ei[] = {
+ {
+ .data_type = QMI_STRUCT,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_indication_register_rsp,
+ rsp),
+ .tlv_type = 0x02,
+ .offset = offsetof(struct ipa_indication_register_rsp,
+ rsp),
+ .ei_array = qmi_response_type_v01_ei,
+ },
+ {
+ .data_type = QMI_EOTI,
+ },
+};
+
+/* QMI message structure definition for struct ipa_driver_init_complete_req */
+struct qmi_elem_info ipa_driver_init_complete_req_ei[] = {
+ {
+ .data_type = QMI_UNSIGNED_1_BYTE,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_driver_init_complete_req,
+ status),
+ .tlv_type = 0x01,
+ .offset = offsetof(struct ipa_driver_init_complete_req,
+ status),
+ },
+ {
+ .data_type = QMI_EOTI,
+ },
+};
+
+/* QMI message structure definition for struct ipa_driver_init_complete_rsp */
+struct qmi_elem_info ipa_driver_init_complete_rsp_ei[] = {
+ {
+ .data_type = QMI_STRUCT,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_driver_init_complete_rsp,
+ rsp),
+ .tlv_type = 0x02,
+ .elem_size = offsetof(struct ipa_driver_init_complete_rsp,
+ rsp),
+ .ei_array = qmi_response_type_v01_ei,
+ },
+ {
+ .data_type = QMI_EOTI,
+ },
+};
+
+/* QMI message structure definition for struct ipa_init_complete_ind */
+struct qmi_elem_info ipa_init_complete_ind_ei[] = {
+ {
+ .data_type = QMI_STRUCT,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_complete_ind,
+ status),
+ .tlv_type = 0x02,
+ .elem_size = offsetof(struct ipa_init_complete_ind,
+ status),
+ .ei_array = qmi_response_type_v01_ei,
+ },
+ {
+ .data_type = QMI_EOTI,
+ },
+};
+
+/* QMI message structure definition for struct ipa_mem_bounds */
+struct qmi_elem_info ipa_mem_bounds_ei[] = {
+ {
+ .data_type = QMI_UNSIGNED_4_BYTE,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_mem_bounds, start),
+ .offset = offsetof(struct ipa_mem_bounds, start),
+ },
+ {
+ .data_type = QMI_UNSIGNED_4_BYTE,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_mem_bounds, end),
+ .offset = offsetof(struct ipa_mem_bounds, end),
+ },
+ {
+ .data_type = QMI_EOTI,
+ },
+};
+
+/* QMI message structure definition for struct ipa_mem_array */
+struct qmi_elem_info ipa_mem_array_ei[] = {
+ {
+ .data_type = QMI_UNSIGNED_4_BYTE,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_mem_array, start),
+ .offset = offsetof(struct ipa_mem_array, start),
+ },
+ {
+ .data_type = QMI_UNSIGNED_4_BYTE,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_mem_array, count),
+ .offset = offsetof(struct ipa_mem_array, count),
+ },
+ {
+ .data_type = QMI_EOTI,
+ },
+};
+
+/* QMI message structure definition for struct ipa_mem_range */
+struct qmi_elem_info ipa_mem_range_ei[] = {
+ {
+ .data_type = QMI_UNSIGNED_4_BYTE,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_mem_range, start),
+ .offset = offsetof(struct ipa_mem_range, start),
+ },
+ {
+ .data_type = QMI_UNSIGNED_4_BYTE,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_mem_range, size),
+ .offset = offsetof(struct ipa_mem_range, size),
+ },
+ {
+ .data_type = QMI_EOTI,
+ },
+};
+
+/* QMI message structure definition for struct ipa_init_modem_driver_req */
+struct qmi_elem_info ipa_init_modem_driver_req_ei[] = {
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ platform_type_valid),
+ .tlv_type = 0x10,
+ .elem_size = offsetof(struct ipa_init_modem_driver_req,
+ platform_type_valid),
+ },
+ {
+ .data_type = QMI_SIGNED_4_BYTE_ENUM,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ platform_type),
+ .tlv_type = 0x10,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ platform_type),
+ },
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ hdr_tbl_info_valid),
+ .tlv_type = 0x11,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ hdr_tbl_info_valid),
+ },
+ {
+ .data_type = QMI_STRUCT,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ hdr_tbl_info),
+ .tlv_type = 0x11,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ hdr_tbl_info),
+ .ei_array = ipa_mem_bounds_ei,
+ },
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ v4_route_tbl_info_valid),
+ .tlv_type = 0x12,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ v4_route_tbl_info_valid),
+ },
+ {
+ .data_type = QMI_STRUCT,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ v4_route_tbl_info),
+ .tlv_type = 0x12,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ v4_route_tbl_info),
+ .ei_array = ipa_mem_array_ei,
+ },
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ v6_route_tbl_info_valid),
+ .tlv_type = 0x13,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ v6_route_tbl_info_valid),
+ },
+ {
+ .data_type = QMI_STRUCT,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ v6_route_tbl_info),
+ .tlv_type = 0x13,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ v6_route_tbl_info),
+ .ei_array = ipa_mem_array_ei,
+ },
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ v4_filter_tbl_start_valid),
+ .tlv_type = 0x14,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ v4_filter_tbl_start_valid),
+ },
+ {
+ .data_type = QMI_UNSIGNED_4_BYTE,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ v4_filter_tbl_start),
+ .tlv_type = 0x14,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ v4_filter_tbl_start),
+ },
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ v6_filter_tbl_start_valid),
+ .tlv_type = 0x15,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ v6_filter_tbl_start_valid),
+ },
+ {
+ .data_type = QMI_UNSIGNED_4_BYTE,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ v6_filter_tbl_start),
+ .tlv_type = 0x15,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ v6_filter_tbl_start),
+ },
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ modem_mem_info_valid),
+ .tlv_type = 0x16,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ modem_mem_info_valid),
+ },
+ {
+ .data_type = QMI_STRUCT,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ modem_mem_info),
+ .tlv_type = 0x16,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ modem_mem_info),
+ .ei_array = ipa_mem_range_ei,
+ },
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ ctrl_comm_dest_end_pt_valid),
+ .tlv_type = 0x17,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ ctrl_comm_dest_end_pt_valid),
+ },
+ {
+ .data_type = QMI_UNSIGNED_4_BYTE,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ ctrl_comm_dest_end_pt),
+ .tlv_type = 0x17,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ ctrl_comm_dest_end_pt),
+ },
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ skip_uc_load_valid),
+ .tlv_type = 0x18,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ skip_uc_load_valid),
+ },
+ {
+ .data_type = QMI_UNSIGNED_1_BYTE,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ skip_uc_load),
+ .tlv_type = 0x18,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ skip_uc_load),
+ },
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ hdr_proc_ctx_tbl_info_valid),
+ .tlv_type = 0x19,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ hdr_proc_ctx_tbl_info_valid),
+ },
+ {
+ .data_type = QMI_STRUCT,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ hdr_proc_ctx_tbl_info),
+ .tlv_type = 0x19,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ hdr_proc_ctx_tbl_info),
+ .ei_array = ipa_mem_bounds_ei,
+ },
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ zip_tbl_info_valid),
+ .tlv_type = 0x1a,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ zip_tbl_info_valid),
+ },
+ {
+ .data_type = QMI_STRUCT,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ zip_tbl_info),
+ .tlv_type = 0x1a,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ zip_tbl_info),
+ .ei_array = ipa_mem_bounds_ei,
+ },
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ v4_hash_route_tbl_info_valid),
+ .tlv_type = 0x1b,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ v4_hash_route_tbl_info_valid),
+ },
+ {
+ .data_type = QMI_STRUCT,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ v4_hash_route_tbl_info),
+ .tlv_type = 0x1b,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ v4_hash_route_tbl_info),
+ .ei_array = ipa_mem_array_ei,
+ },
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ v6_hash_route_tbl_info_valid),
+ .tlv_type = 0x1c,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ v6_hash_route_tbl_info_valid),
+ },
+ {
+ .data_type = QMI_STRUCT,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ v6_hash_route_tbl_info),
+ .tlv_type = 0x1c,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ v6_hash_route_tbl_info),
+ .ei_array = ipa_mem_array_ei,
+ },
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ v4_hash_filter_tbl_start_valid),
+ .tlv_type = 0x1d,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ v4_hash_filter_tbl_start_valid),
+ },
+ {
+ .data_type = QMI_UNSIGNED_4_BYTE,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ v4_hash_filter_tbl_start),
+ .tlv_type = 0x1d,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ v4_hash_filter_tbl_start),
+ },
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ v6_hash_filter_tbl_start_valid),
+ .tlv_type = 0x1e,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ v6_hash_filter_tbl_start_valid),
+ },
+ {
+ .data_type = QMI_UNSIGNED_4_BYTE,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_req,
+ v6_hash_filter_tbl_start),
+ .tlv_type = 0x1e,
+ .offset = offsetof(struct ipa_init_modem_driver_req,
+ v6_hash_filter_tbl_start),
+ },
+ {
+ .data_type = QMI_EOTI,
+ },
+};
+
+/* QMI message structure definition for struct ipa_init_modem_driver_rsp */
+struct qmi_elem_info ipa_init_modem_driver_rsp_ei[] = {
+ {
+ .data_type = QMI_STRUCT,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_rsp,
+ rsp),
+ .tlv_type = 0x02,
+ .offset = offsetof(struct ipa_init_modem_driver_rsp,
+ rsp),
+ .ei_array = qmi_response_type_v01_ei,
+ },
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_rsp,
+ ctrl_comm_dest_end_pt_valid),
+ .tlv_type = 0x10,
+ .offset = offsetof(struct ipa_init_modem_driver_rsp,
+ ctrl_comm_dest_end_pt_valid),
+ },
+ {
+ .data_type = QMI_UNSIGNED_4_BYTE,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_rsp,
+ ctrl_comm_dest_end_pt),
+ .tlv_type = 0x10,
+ .offset = offsetof(struct ipa_init_modem_driver_rsp,
+ ctrl_comm_dest_end_pt),
+ },
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_rsp,
+ default_end_pt_valid),
+ .tlv_type = 0x11,
+ .offset = offsetof(struct ipa_init_modem_driver_rsp,
+ default_end_pt_valid),
+ },
+ {
+ .data_type = QMI_UNSIGNED_4_BYTE,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_rsp,
+ default_end_pt),
+ .tlv_type = 0x11,
+ .offset = offsetof(struct ipa_init_modem_driver_rsp,
+ default_end_pt),
+ },
+ {
+ .data_type = QMI_OPT_FLAG,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_rsp,
+ modem_driver_init_pending_valid),
+ .tlv_type = 0x12,
+ .offset = offsetof(struct ipa_init_modem_driver_rsp,
+ modem_driver_init_pending_valid),
+ },
+ {
+ .data_type = QMI_UNSIGNED_1_BYTE,
+ .elem_len = 1,
+ .elem_size =
+ sizeof_field(struct ipa_init_modem_driver_rsp,
+ modem_driver_init_pending),
+ .tlv_type = 0x12,
+ .offset = offsetof(struct ipa_init_modem_driver_rsp,
+ modem_driver_init_pending),
+ },
+ {
+ .data_type = QMI_EOTI,
+ },
+};
diff --git a/drivers/net/ipa/ipa_qmi_msg.h b/drivers/net/ipa/ipa_qmi_msg.h
new file mode 100644
index 000000000000..009ce65ea114
--- /dev/null
+++ b/drivers/net/ipa/ipa_qmi_msg.h
@@ -0,0 +1,233 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ * Copyright (C) 2018 Linaro Ltd.
+ */
+#ifndef _IPA_QMI_MSG_H_
+#define _IPA_QMI_MSG_H_
+
+/* Request/response/indication QMI message ids used for IPA. Receiving
+ * end issues a response for requests; indications require no response.
+ */
+#define IPA_QMI_INDICATION_REGISTER 0x20 /* modem -> AP request */
+#define IPA_QMI_INIT_DRIVER 0x21 /* AP -> modem request */
+#define IPA_QMI_INIT_COMPLETE_IND 0x22 /* AP -> modem indication */
+#define IPA_QMI_DRIVER_INIT_COMPLETE 0x35 /* modem -> AP request */
+
+/* The maximum size required for message types. These sizes include
+ * the message data, along with type (1 byte) and length (2 byte)
+ * information for each field. The qmi_send_*() interfaces require
+ * the message size to be provided.
+ */
+#define IPA_QMI_INDICATION_REGISTER_REQ_SZ 8 /* -> server handle */
+#define IPA_QMI_INDICATION_REGISTER_RSP_SZ 7 /* <- server handle */
+#define IPA_QMI_INIT_DRIVER_REQ_SZ 134 /* client handle -> */
+#define IPA_QMI_INIT_DRIVER_RSP_SZ 25 /* client handle <- */
+#define IPA_QMI_INIT_COMPLETE_IND_SZ 7 /* server handle -> */
+#define IPA_QMI_DRIVER_INIT_COMPLETE_REQ_SZ 4 /* -> server handle */
+#define IPA_QMI_DRIVER_INIT_COMPLETE_RSP_SZ 7 /* <- server handle */
+
+/* Maximum size of messages we expect the AP to receive (max of above) */
+#define IPA_QMI_SERVER_MAX_RCV_SZ 8
+#define IPA_QMI_CLIENT_MAX_RCV_SZ 25
+
+/* Request message for the IPA_QMI_INDICATION_REGISTER request */
+struct ipa_indication_register_req {
+ u8 master_driver_init_complete_valid;
+ u8 master_driver_init_complete;
+ u8 data_usage_quota_reached_valid;
+ u8 data_usage_quota_reached;
+};
+
+/* The response to a IPA_QMI_INDICATION_REGISTER request consists only of
+ * a standard QMI response.
+ */
+struct ipa_indication_register_rsp {
+ struct qmi_response_type_v01 rsp;
+};
+
+/* Request message for the IPA_QMI_DRIVER_INIT_COMPLETE request */
+struct ipa_driver_init_complete_req {
+ u8 status;
+};
+
+/* The response to a IPA_QMI_DRIVER_INIT_COMPLETE request consists only
+ * of a standard QMI response.
+ */
+struct ipa_driver_init_complete_rsp {
+ struct qmi_response_type_v01 rsp;
+};
+
+/* The message for the IPA_QMI_INIT_COMPLETE_IND indication consists
+ * only of a standard QMI response.
+ */
+struct ipa_init_complete_ind {
+ struct qmi_response_type_v01 status;
+};
+
+/* The AP tells the modem its platform type. We assume Android. */
+enum ipa_platform_type {
+ IPA_QMI_PLATFORM_TYPE_INVALID = 0, /* Invalid */
+ IPA_QMI_PLATFORM_TYPE_TN = 1, /* Data card */
+ IPA_QMI_PLATFORM_TYPE_LE = 2, /* Data router */
+ IPA_QMI_PLATFORM_TYPE_MSM_ANDROID = 3, /* Android MSM */
+ IPA_QMI_PLATFORM_TYPE_MSM_WINDOWS = 4, /* Windows MSM */
+ IPA_QMI_PLATFORM_TYPE_MSM_QNX_V01 = 5, /* QNX MSM */
+};
+
+/* This defines the start and end offset of a range of memory. Both
+ * fields are offsets relative to the start of IPA shared memory.
+ * The end value is the last addressable byte *within* the range.
+ */
+struct ipa_mem_bounds {
+ u32 start;
+ u32 end;
+};
+
+/* This defines the location and size of an array. The start value
+ * is an offset relative to the start of IPA shared memory. The
+ * size of the array is implied by the number of entries (the entry
+ * size is assumed to be known).
+ */
+struct ipa_mem_array {
+ u32 start;
+ u32 count;
+};
+
+/* This defines the location and size of a range of memory. The
+ * start is an offset relative to the start of IPA shared memory.
+ * This differs from the ipa_mem_bounds structure in that the size
+ * (in bytes) of the memory region is specified rather than the
+ * offset of its last byte.
+ */
+struct ipa_mem_range {
+ u32 start;
+ u32 size;
+};
+
+/* The message for the IPA_QMI_INIT_DRIVER request contains information
+ * from the AP that affects modem initialization.
+ */
+struct ipa_init_modem_driver_req {
+ u8 platform_type_valid;
+ u32 platform_type; /* enum ipa_platform_type */
+
+ /* Modem header table information. This defines the IPA shared
+ * memory in which the modem may insert header table entries.
+ */
+ u8 hdr_tbl_info_valid;
+ struct ipa_mem_bounds hdr_tbl_info;
+
+ /* Routing table information. These define the location and size of
+ * non-hashable IPv4 and IPv6 filter tables. The start values are
+ * offsets relative to the start of IPA shared memory.
+ */
+ u8 v4_route_tbl_info_valid;
+ struct ipa_mem_array v4_route_tbl_info;
+ u8 v6_route_tbl_info_valid;
+ struct ipa_mem_array v6_route_tbl_info;
+
+ /* Filter table information. These define the location and size of
+ * non-hashable IPv4 and IPv6 filter tables. The start values are
+ * offsets relative to the start of IPA shared memory.
+ */
+ u8 v4_filter_tbl_start_valid;
+ u32 v4_filter_tbl_start;
+ u8 v6_filter_tbl_start_valid;
+ u32 v6_filter_tbl_start;
+
+ /* Modem memory information. This defines the location and
+ * size of memory available for the modem to use.
+ */
+ u8 modem_mem_info_valid;
+ struct ipa_mem_range modem_mem_info;
+
+ /* This defines the destination endpoint on the AP to which
+ * the modem driver can send control commands. IPA supports
+ * 20 endpoints, so this must be 19 or less.
+ */
+ u8 ctrl_comm_dest_end_pt_valid;
+ u32 ctrl_comm_dest_end_pt;
+
+ /* This defines whether the modem should load the microcontroller
+ * or not. It is unnecessary to reload it if the modem is being
+ * restarted.
+ *
+ * NOTE: this field is named "is_ssr_bootup" elsewhere.
+ */
+ u8 skip_uc_load_valid;
+ u8 skip_uc_load;
+
+ /* Processing context memory information. This defines the memory in
+ * which the modem may insert header processing context table entries.
+ */
+ u8 hdr_proc_ctx_tbl_info_valid;
+ struct ipa_mem_bounds hdr_proc_ctx_tbl_info;
+
+ /* Compression command memory information. This defines the memory
+ * in which the modem may insert compression/decompression commands.
+ */
+ u8 zip_tbl_info_valid;
+ struct ipa_mem_bounds zip_tbl_info;
+
+ /* Routing table information. These define the location and size
+ * of hashable IPv4 and IPv6 filter tables. The start values are
+ * offsets relative to the start of IPA shared memory.
+ */
+ u8 v4_hash_route_tbl_info_valid;
+ struct ipa_mem_array v4_hash_route_tbl_info;
+ u8 v6_hash_route_tbl_info_valid;
+ struct ipa_mem_array v6_hash_route_tbl_info;
+
+ /* Filter table information. These define the location and size
+ * of hashable IPv4 and IPv6 filter tables. The start values are
+ * offsets relative to the start of IPA shared memory.
+ */
+ u8 v4_hash_filter_tbl_start_valid;
+ u32 v4_hash_filter_tbl_start;
+ u8 v6_hash_filter_tbl_start_valid;
+ u32 v6_hash_filter_tbl_start;
+};
+
+/* The response to a IPA_QMI_INIT_DRIVER request begins with a standard
+ * QMI response, but contains other information as well. Currently we
+ * simply wait for the the INIT_DRIVER transaction to complete and
+ * ignore any other data that might be returned.
+ */
+struct ipa_init_modem_driver_rsp {
+ struct qmi_response_type_v01 rsp;
+
+ /* This defines the destination endpoint on the modem to which
+ * the AP driver can send control commands. IPA supports
+ * 20 endpoints, so this must be 19 or less.
+ */
+ u8 ctrl_comm_dest_end_pt_valid;
+ u32 ctrl_comm_dest_end_pt;
+
+ /* This defines the default endpoint. The AP driver is not
+ * required to configure the hardware with this value. IPA
+ * supports 20 endpoints, so this must be 19 or less.
+ */
+ u8 default_end_pt_valid;
+ u32 default_end_pt;
+
+ /* This defines whether a second handshake is required to complete
+ * initialization.
+ */
+ u8 modem_driver_init_pending_valid;
+ u8 modem_driver_init_pending;
+};
+
+/* Message structure definitions defined in "ipa_qmi_msg.c" */
+extern struct qmi_elem_info ipa_indication_register_req_ei[];
+extern struct qmi_elem_info ipa_indication_register_rsp_ei[];
+extern struct qmi_elem_info ipa_driver_init_complete_req_ei[];
+extern struct qmi_elem_info ipa_driver_init_complete_rsp_ei[];
+extern struct qmi_elem_info ipa_init_complete_ind_ei[];
+extern struct qmi_elem_info ipa_mem_bounds_ei[];
+extern struct qmi_elem_info ipa_mem_array_ei[];
+extern struct qmi_elem_info ipa_mem_range_ei[];
+extern struct qmi_elem_info ipa_init_modem_driver_req_ei[];
+extern struct qmi_elem_info ipa_init_modem_driver_rsp_ei[];
+
+#endif /* !_IPA_QMI_MSG_H_ */
--
2.17.1
^ permalink raw reply related
* [RFC PATCH 08/12] soc: qcom: ipa: utility functions
From: Alex Elder @ 2018-11-07 0:32 UTC (permalink / raw)
To: davem, arnd, bjorn.andersson, ilias.apalodimas
Cc: netdev, devicetree, linux-arm-msm, linux-soc, linux-arm-kernel,
linux-kernel, syadagir, mjavid, robh+dt, mark.rutland
In-Reply-To: <20181107003250.5832-1-elder@linaro.org>
This patch contains "ipa_utils.c", which provides some miscellaneous
supporting code. Included are:
- Endpoint configuration. The IPA hardware has a fixed number of
endpoints (pipes) available. In some cases the AP and modem
must agree on aspects of these. A key example is that they need
to agree what particular endpoints are used for (the modem can't
send messages to the AP command endpoint, for example). There
is a static array that defines these parameters, and this is
found in "ipa_utils.c".
- Resource group configuration. The IPA has a number of internal
resources it uses for its operation. These are configurable,
and it is up to the AP to set these configuration values at
initialization time. There are some static arrays that define
these configuration values. Functions are also defined here
to send those values to hardware.
- Shared memory. The IPA uses a region of shared memory to hold
various data structures. A function ipa_sram_settings_read()
fetches the location and size of this shared memory. (The
individual regions are currently initialized in "ipa_main.c".)
- Endpoint configuration. Each endpoint (or channel) has a number
of configurable properties. Functions found in this file are
used to configure these properties.
- Interconnect handling. The IPA driver depends on the
interconnect framework to request that buses it uses be enabled
when needed.
This is not a complete list, but it covers much of the functionality
found in "ipa_utils.c".
Signed-off-by: Alex Elder <elder@linaro.org>
---
drivers/net/ipa/ipa_utils.c | 1035 +++++++++++++++++++++++++++++++++++
1 file changed, 1035 insertions(+)
create mode 100644 drivers/net/ipa/ipa_utils.c
diff --git a/drivers/net/ipa/ipa_utils.c b/drivers/net/ipa/ipa_utils.c
new file mode 100644
index 000000000000..085b0218779b
--- /dev/null
+++ b/drivers/net/ipa/ipa_utils.c
@@ -0,0 +1,1035 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
+ * Copyright (C) 2018 Linaro Ltd.
+ */
+
+#include <linux/types.h>
+#include <linux/device.h>
+#include <linux/interconnect.h>
+#include <linux/module.h>
+#include <linux/delay.h>
+
+#include "ipa_dma.h"
+#include "ipa_i.h"
+#include "ipahal.h"
+
+/* Interconnect path bandwidths (each times 1000 bytes per second) */
+#define IPA_MEMORY_AVG 80000
+#define IPA_MEMORY_PEAK 600000
+
+#define IPA_IMEM_AVG 80000
+#define IPA_IMEM_PEAK 350000
+
+#define IPA_CONFIG_AVG 40000
+#define IPA_CONFIG_PEAK 40000
+
+#define IPA_BCR_REG_VAL 0x0000003b
+
+#define IPA_GSI_DMA_TASK_TIMEOUT 15 /* milliseconds */
+
+#define IPA_GSI_CHANNEL_STOP_SLEEP_MIN 1000 /* microseconds */
+#define IPA_GSI_CHANNEL_STOP_SLEEP_MAX 2000 /* microseconds */
+
+#define QMB_MASTER_SELECT_DDR 0
+
+enum ipa_rsrc_group {
+ IPA_RSRC_GROUP_LWA_DL, /* currently not used */
+ IPA_RSRC_GROUP_UL_DL,
+ IPA_RSRC_GROUP_MAX,
+};
+
+enum ipa_rsrc_grp_type_src {
+ IPA_RSRC_GRP_TYPE_SRC_PKT_CONTEXTS,
+ IPA_RSRC_GRP_TYPE_SRS_DESCRIPTOR_LISTS,
+ IPA_RSRC_GRP_TYPE_SRC_DESCRIPTOR_BUFF,
+ IPA_RSRC_GRP_TYPE_SRC_HPS_DMARS,
+ IPA_RSRC_GRP_TYPE_SRC_ACK_ENTRIES,
+};
+
+enum ipa_rsrc_grp_type_dst {
+ IPA_RSRC_GRP_TYPE_DST_DATA_SECTORS,
+ IPA_RSRC_GRP_TYPE_DST_DPS_DMARS,
+};
+
+enum ipa_rsrc_grp_type_rx {
+ IPA_RSRC_GRP_TYPE_RX_HPS_CMDQ,
+ IPA_RSRC_GRP_TYPE_RX_MAX
+};
+
+struct rsrc_min_max {
+ u32 min;
+ u32 max;
+};
+
+/* IPA_HW_v3_5_1 */
+static const struct rsrc_min_max ipa_src_rsrc_grp[][IPA_RSRC_GROUP_MAX] = {
+ [IPA_RSRC_GRP_TYPE_SRC_PKT_CONTEXTS] = {
+ [IPA_RSRC_GROUP_LWA_DL] = { .min = 1, .max = 63, },
+ [IPA_RSRC_GROUP_UL_DL] = { .min = 1, .max = 63, },
+ },
+ [IPA_RSRC_GRP_TYPE_SRS_DESCRIPTOR_LISTS] = {
+ [IPA_RSRC_GROUP_LWA_DL] = { .min = 10, .max = 10, },
+ [IPA_RSRC_GROUP_UL_DL] = { .min = 10, .max = 10, },
+ },
+ [IPA_RSRC_GRP_TYPE_SRC_DESCRIPTOR_BUFF] = {
+ [IPA_RSRC_GROUP_LWA_DL] = { .min = 12, .max = 12, },
+ [IPA_RSRC_GROUP_UL_DL] = { .min = 14, .max = 14, },
+ },
+ [IPA_RSRC_GRP_TYPE_SRC_HPS_DMARS] = {
+ [IPA_RSRC_GROUP_LWA_DL] = { .min = 0, .max = 63, },
+ [IPA_RSRC_GROUP_UL_DL] = { .min = 0, .max = 63, },
+ },
+ [IPA_RSRC_GRP_TYPE_SRC_ACK_ENTRIES] = {
+ [IPA_RSRC_GROUP_LWA_DL] = { .min = 14, .max = 14, },
+ [IPA_RSRC_GROUP_UL_DL] = { .min = 20, .max = 20, },
+ },
+};
+
+/* IPA_HW_v3_5_1 */
+static const struct rsrc_min_max ipa_dst_rsrc_grp[][IPA_RSRC_GROUP_MAX] = {
+ [IPA_RSRC_GRP_TYPE_DST_DATA_SECTORS] = {
+ [IPA_RSRC_GROUP_LWA_DL] = { .min = 4, .max = 4, },
+ [IPA_RSRC_GROUP_UL_DL] = { .min = 4, .max = 4, },
+ },
+ [IPA_RSRC_GRP_TYPE_DST_DPS_DMARS] = {
+ [IPA_RSRC_GROUP_LWA_DL] = { .min = 2, .max = 63, },
+ [IPA_RSRC_GROUP_UL_DL] = { .min = 1, .max = 63, },
+ },
+};
+
+/**
+ * struct ipa_gsi_ep_config - GSI endpoint configuration.
+ * @ep_id: IPA endpoint identifier.
+ * @channel_id: GSI channel number used for this endpoint.
+ * @tlv_count: The number of TLV (type-length-value) entries for the channel.
+ * @ee: Execution environment endpoint is associated with.
+ *
+ * Each GSI endpoint has a set of configuration parameters defined within
+ * entries in the ipa_ep_configuration[] array. Its @ep_id field uniquely
+ * defines the endpoint, and @channel_id defines which data channel (ring
+ * buffer) is used for the endpoint.
+ * XXX TLV
+ * XXX ee is never used in the code
+ */
+struct ipa_gsi_ep_config {
+ u32 ep_id;
+ u32 channel_id;
+ u32 tlv_count;
+ u32 ee;
+};
+
+struct ipa_ep_configuration {
+ bool support_flt;
+ enum ipa_seq_type seq_type;
+ struct ipa_gsi_ep_config ipa_gsi_ep_info;
+};
+
+/* IPA_HW_v3_5_1 */
+/* clients not included in the list below are considered as invalid */
+static const struct ipa_ep_configuration ipa_ep_configuration[] = {
+ [IPA_CLIENT_WLAN1_PROD] = {
+ .support_flt = true,
+ .seq_type = IPA_SEQ_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
+ .ipa_gsi_ep_info = {
+ .ep_id = 7,
+ .channel_id = 1,
+ .tlv_count = 8,
+ .ee = IPA_EE_UC,
+ },
+ },
+ [IPA_CLIENT_USB_PROD] = {
+ .support_flt = true,
+ .seq_type = IPA_SEQ_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
+ .ipa_gsi_ep_info = {
+ .ep_id = 0,
+ .channel_id = 0,
+ .tlv_count = 8,
+ .ee = IPA_EE_AP,
+ },
+ },
+ [IPA_CLIENT_APPS_LAN_PROD] = {
+ .support_flt = false,
+ .seq_type = IPA_SEQ_PKT_PROCESS_NO_DEC_UCP,
+ .ipa_gsi_ep_info = {
+ .ep_id = 8,
+ .channel_id = 7,
+ .tlv_count = 8,
+ .ee = IPA_EE_AP,
+ },
+ },
+ [IPA_CLIENT_APPS_WAN_PROD] = {
+ .support_flt = true,
+ .seq_type = IPA_SEQ_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
+ .ipa_gsi_ep_info = {
+ .ep_id = 2,
+ .channel_id = 3,
+ .tlv_count = 16,
+ .ee = IPA_EE_AP,
+ },
+ },
+ [IPA_CLIENT_APPS_CMD_PROD] = {
+ .support_flt = false,
+ .seq_type = IPA_SEQ_DMA_ONLY,
+ .ipa_gsi_ep_info = {
+ .ep_id = 5,
+ .channel_id = 4,
+ .tlv_count = 20,
+ .ee = IPA_EE_AP,
+ },
+ },
+ [IPA_CLIENT_Q6_LAN_PROD] = {
+ .support_flt = true,
+ .seq_type = IPA_SEQ_PKT_PROCESS_NO_DEC_UCP,
+ .ipa_gsi_ep_info = {
+ .ep_id = 3,
+ .channel_id = 0,
+ .tlv_count = 16,
+ .ee = IPA_EE_Q6,
+ },
+ },
+ [IPA_CLIENT_Q6_WAN_PROD] = {
+ .support_flt = true,
+ .seq_type = IPA_SEQ_PKT_PROCESS_NO_DEC_UCP,
+ .ipa_gsi_ep_info = {
+ .ep_id = 6,
+ .channel_id = 4,
+ .tlv_count = 12,
+ .ee = IPA_EE_Q6,
+ },
+ },
+ [IPA_CLIENT_Q6_CMD_PROD] = {
+ .support_flt = false,
+ .seq_type = IPA_SEQ_PKT_PROCESS_NO_DEC_UCP,
+ .ipa_gsi_ep_info = {
+ .ep_id = 4,
+ .channel_id = 1,
+ .tlv_count = 20,
+ .ee = IPA_EE_Q6,
+ },
+ },
+ [IPA_CLIENT_TEST_CONS] = {
+ .support_flt = true,
+ .seq_type = IPA_SEQ_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
+ .ipa_gsi_ep_info = {
+ .ep_id = 14,
+ .channel_id = 5,
+ .tlv_count = 8,
+ .ee = IPA_EE_Q6,
+ },
+ },
+ [IPA_CLIENT_TEST1_CONS] = {
+ .support_flt = true,
+ .seq_type = IPA_SEQ_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
+ .ipa_gsi_ep_info = {
+ .ep_id = 15,
+ .channel_id = 2,
+ .tlv_count = 8,
+ .ee = IPA_EE_UC,
+ },
+ },
+ /* Only for testing */
+ [IPA_CLIENT_TEST_PROD] = {
+ .support_flt = true,
+ .seq_type = IPA_SEQ_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
+ .ipa_gsi_ep_info = {
+ .ep_id = 0,
+ .channel_id = 0,
+ .tlv_count = 8,
+ .ee = IPA_EE_AP,
+ },
+ },
+ [IPA_CLIENT_TEST1_PROD] = {
+ .support_flt = true,
+ .seq_type = IPA_SEQ_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
+ .ipa_gsi_ep_info = {
+ .ep_id = 0,
+ .channel_id = 0,
+ .tlv_count = 8,
+ .ee = IPA_EE_AP,
+ },
+ },
+ [IPA_CLIENT_TEST2_PROD] = {
+ .support_flt = true,
+ .seq_type = IPA_SEQ_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
+ .ipa_gsi_ep_info = {
+ .ep_id = 2,
+ .channel_id = 3,
+ .tlv_count = 16,
+ .ee = IPA_EE_AP,
+ },
+ },
+ [IPA_CLIENT_TEST3_PROD] = {
+ .support_flt = true,
+ .seq_type = IPA_SEQ_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
+ .ipa_gsi_ep_info = {
+ .ep_id = 4,
+ .channel_id = 1,
+ .tlv_count = 20,
+ .ee = IPA_EE_Q6,
+ },
+ },
+ [IPA_CLIENT_TEST4_PROD] = {
+ .support_flt = true,
+ .seq_type = IPA_SEQ_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
+ .ipa_gsi_ep_info = {
+ .ep_id = 1,
+ .channel_id = 0,
+ .tlv_count = 8,
+ .ee = IPA_EE_UC,
+ },
+ },
+ [IPA_CLIENT_WLAN1_CONS] = {
+ .support_flt = false,
+ .seq_type = IPA_SEQ_INVALID,
+ .ipa_gsi_ep_info = {
+ .ep_id = 16,
+ .channel_id = 3,
+ .tlv_count = 8,
+ .ee = IPA_EE_UC,
+ },
+ },
+ [IPA_CLIENT_WLAN2_CONS] = {
+ .support_flt = false,
+ .seq_type = IPA_SEQ_INVALID,
+ .ipa_gsi_ep_info = {
+ .ep_id = 18,
+ .channel_id = 9,
+ .tlv_count = 8,
+ .ee = IPA_EE_AP,
+ },
+ },
+ [IPA_CLIENT_WLAN3_CONS] = {
+ .support_flt = false,
+ .seq_type = IPA_SEQ_INVALID,
+ .ipa_gsi_ep_info = {
+ .ep_id = 19,
+ .channel_id = 10,
+ .tlv_count = 8,
+ .ee = IPA_EE_AP,
+ },
+ },
+ [IPA_CLIENT_USB_CONS] = {
+ .support_flt = false,
+ .seq_type = IPA_SEQ_INVALID,
+ .ipa_gsi_ep_info = {
+ .ep_id = 17,
+ .channel_id = 8,
+ .tlv_count = 8,
+ .ee = IPA_EE_AP,
+ },
+ },
+ [IPA_CLIENT_USB_DPL_CONS] = {
+ .support_flt = false,
+ .seq_type = IPA_SEQ_INVALID,
+ .ipa_gsi_ep_info = {
+ .ep_id = 11,
+ .channel_id = 2,
+ .tlv_count = 4,
+ .ee = IPA_EE_AP,
+ },
+ },
+ [IPA_CLIENT_APPS_LAN_CONS] = {
+ .support_flt = false,
+ .seq_type = IPA_SEQ_INVALID,
+ .ipa_gsi_ep_info = {
+ .ep_id = 9,
+ .channel_id = 5,
+ .tlv_count = 8,
+ .ee = IPA_EE_AP,
+ },
+ },
+ [IPA_CLIENT_APPS_WAN_CONS] = {
+ .support_flt = false,
+ .seq_type = IPA_SEQ_INVALID,
+ .ipa_gsi_ep_info = {
+ .ep_id = 10,
+ .channel_id = 6,
+ .tlv_count = 8,
+ .ee = IPA_EE_AP,
+ },
+ },
+ [IPA_CLIENT_Q6_LAN_CONS] = {
+ .support_flt = false,
+ .seq_type = IPA_SEQ_INVALID,
+ .ipa_gsi_ep_info = {
+ .ep_id = 13,
+ .channel_id = 3,
+ .tlv_count = 8,
+ .ee = IPA_EE_Q6,
+ },
+ },
+ [IPA_CLIENT_Q6_WAN_CONS] = {
+ .support_flt = false,
+ .seq_type = IPA_SEQ_INVALID,
+ .ipa_gsi_ep_info = {
+ .ep_id = 12,
+ .channel_id = 2,
+ .tlv_count = 8,
+ .ee = IPA_EE_Q6,
+ },
+ },
+ /* Only for testing */
+ [IPA_CLIENT_TEST2_CONS] = {
+ .support_flt = false,
+ .seq_type = IPA_SEQ_INVALID,
+ .ipa_gsi_ep_info = {
+ .ep_id = 18,
+ .channel_id = 9,
+ .tlv_count = 8,
+ .ee = IPA_EE_AP,
+ },
+ },
+ [IPA_CLIENT_TEST3_CONS] = {
+ .support_flt = false,
+ .seq_type = IPA_SEQ_INVALID,
+ .ipa_gsi_ep_info = {
+ .ep_id = 19,
+ .channel_id = 10,
+ .tlv_count = 8,
+ .ee = IPA_EE_AP,
+ },
+ },
+ [IPA_CLIENT_TEST4_CONS] = {
+ .support_flt = false,
+ .seq_type = IPA_SEQ_INVALID,
+ .ipa_gsi_ep_info = {
+ .ep_id = 11,
+ .channel_id = 2,
+ .tlv_count = 4,
+ .ee = IPA_EE_AP,
+ },
+ },
+/* Dummy consumer (endpoint 31) is used in L2TP rt rule */
+ [IPA_CLIENT_DUMMY_CONS] = {
+ .support_flt = false,
+ .seq_type = IPA_SEQ_INVALID,
+ .ipa_gsi_ep_info = {
+ .ep_id = 31,
+ .channel_id = 31,
+ .tlv_count = 8,
+ .ee = IPA_EE_AP,
+ },
+ },
+};
+
+/** ipa_client_ep_id() - provide endpoint mapping
+ * @client: client type
+ *
+ * Return value: endpoint mapping
+ */
+u32 ipa_client_ep_id(enum ipa_client_type client)
+{
+ return ipa_ep_configuration[client].ipa_gsi_ep_info.ep_id;
+}
+
+u32 ipa_client_channel_id(enum ipa_client_type client)
+{
+ return ipa_ep_configuration[client].ipa_gsi_ep_info.channel_id;
+}
+
+u32 ipa_client_tlv_count(enum ipa_client_type client)
+{
+ return ipa_ep_configuration[client].ipa_gsi_ep_info.tlv_count;
+}
+
+enum ipa_seq_type ipa_endp_seq_type(u32 ep_id)
+{
+ return ipa_ep_configuration[ipa_ctx->ep[ep_id].client].seq_type;
+}
+
+/** ipa_sram_settings_read() - Read SRAM settings from HW
+ *
+ * Returns: None
+ */
+void ipa_sram_settings_read(void)
+{
+ struct ipa_reg_shared_mem_size mem_size;
+
+ ipa_read_reg_fields(IPA_SHARED_MEM_SIZE, &mem_size);
+
+ /* reg fields are in 8B units */
+ ipa_ctx->smem_offset = mem_size.shared_mem_baddr * 8;
+ ipa_ctx->smem_size = mem_size.shared_mem_size * 8;
+
+ ipa_debug("sram size 0x%x offset 0x%x\n", ipa_ctx->smem_size,
+ ipa_ctx->smem_offset);
+}
+
+/** ipa_init_hw() - initialize HW */
+void ipa_init_hw(void)
+{
+ struct ipa_reg_qsb_max_writes max_writes;
+ struct ipa_reg_qsb_max_reads max_reads;
+
+ /* SDM845 has IPA version 3.5.1 */
+ ipa_write_reg(IPA_BCR, IPA_BCR_REG_VAL);
+
+ ipa_reg_qsb_max_writes(&max_writes, 8, 4);
+ ipa_write_reg_fields(IPA_QSB_MAX_WRITES, &max_writes);
+
+ ipa_reg_qsb_max_reads(&max_reads, 8, 12);
+ ipa_write_reg_fields(IPA_QSB_MAX_READS, &max_reads);
+}
+
+/** ipa_filter_bitmap_init() - Initialize the bitmap
+ * that represents the End-points that supports filtering
+ */
+u32 ipa_filter_bitmap_init(void)
+{
+ enum ipa_client_type client;
+ u32 filter_bitmap = 0;
+ u32 count = 0;
+
+ for (client = 0; client < IPA_CLIENT_MAX ; client++) {
+ const struct ipa_ep_configuration *ep_config;
+
+ ep_config = &ipa_ep_configuration[client];
+ if (!ep_config->support_flt)
+ continue;
+ if (++count > IPA_MEM_FLT_COUNT)
+ return 0; /* Too many filtering endpoints */
+
+ filter_bitmap |= BIT(ep_config->ipa_gsi_ep_info.ep_id);
+ }
+
+ return filter_bitmap;
+}
+
+/* In IPAv3 only endpoints 0-3 can be configured to deaggregation */
+bool ipa_endp_aggr_support(u32 ep_id)
+{
+ return ep_id < 4;
+}
+
+/** ipa_endp_init_hdr_write()
+ *
+ * @ep_id: endpoint whose header config register should be written
+ */
+static void ipa_endp_init_hdr_write(u32 ep_id)
+{
+ struct ipa_ep_context *ep = &ipa_ctx->ep[ep_id];
+
+ ipa_write_reg_n_fields(IPA_ENDP_INIT_HDR_N, ep_id, &ep->init_hdr);
+}
+
+/** ipa_endp_init_hdr_ext_write() - write endpoint extended header register
+ *
+ * @ep_id: endpoint whose register should be written
+ */
+static void
+ipa_endp_init_hdr_ext_write(u32 ep_id)
+{
+ struct ipa_ep_context *ep = &ipa_ctx->ep[ep_id];
+
+ ipa_write_reg_n_fields(IPA_ENDP_INIT_HDR_EXT_N, ep_id,
+ &ep->hdr_ext);
+}
+
+/** ipa_endp_init_aggr_write() write endpoint aggregation register
+ *
+ * @ep_id: endpoint whose aggregation config register should be written
+ */
+static void ipa_endp_init_aggr_write(u32 ep_id)
+{
+ struct ipa_ep_context *ep = &ipa_ctx->ep[ep_id];
+
+ ipa_write_reg_n_fields(IPA_ENDP_INIT_AGGR_N, ep_id, &ep->init_aggr);
+}
+
+/** ipa_endp_init_cfg_write() - write endpoint configuration register
+ *
+ * @ep_id: endpoint whose configuration register should be written
+ */
+static void ipa_endp_init_cfg_write(u32 ep_id)
+{
+ struct ipa_ep_context *ep = &ipa_ctx->ep[ep_id];
+
+ ipa_write_reg_n_fields(IPA_ENDP_INIT_CFG_N, ep_id, &ep->init_cfg);
+}
+
+/** ipa_endp_init_mode_write() - write endpoint mode register
+ *
+ * @ep_id: endpoint whose register should be written
+ */
+static void ipa_endp_init_mode_write(u32 ep_id)
+{
+ struct ipa_ep_context *ep = &ipa_ctx->ep[ep_id];
+
+ ipa_write_reg_n_fields(IPA_ENDP_INIT_MODE_N, ep_id,
+ &ep->init_mode);
+}
+
+/** ipa_endp_init_seq_write() - write endpoint sequencer register
+ *
+ * @ep_id: endpoint whose register should be written
+ */
+static void ipa_endp_init_seq_write(u32 ep_id)
+{
+ struct ipa_ep_context *ep = &ipa_ctx->ep[ep_id];
+
+ ipa_write_reg_n_fields(IPA_ENDP_INIT_SEQ_N, ep_id, &ep->init_seq);
+}
+
+/** ipa_endp_init_deaggr_write() - write endpoint deaggregation register
+ *
+ * @ep_id: endpoint whose register should be written
+ */
+void ipa_endp_init_deaggr_write(u32 ep_id)
+{
+ struct ipa_ep_context *ep = &ipa_ctx->ep[ep_id];
+
+ ipa_write_reg_n_fields(IPA_ENDP_INIT_DEAGGR_N, ep_id,
+ &ep->init_deaggr);
+}
+
+/** ipa_endp_init_hdr_metadata_mask_write() - endpoint metadata mask register
+ *
+ * @ep_id: endpoint whose register should be written
+ */
+static void ipa_endp_init_hdr_metadata_mask_write(u32 ep_id)
+{
+ struct ipa_ep_context *ep = &ipa_ctx->ep[ep_id];
+
+ ipa_write_reg_n_fields(IPA_ENDP_INIT_HDR_METADATA_MASK_N, ep_id,
+ &ep->metadata_mask);
+}
+
+/** ipa_endp_init_hdr_metadata_mask_write() - endpoint metadata mask register
+ *
+ * @ep_id: endpoint whose register should be written
+ */
+static void ipa_endp_status_write(u32 ep_id)
+{
+ struct ipa_ep_context *ep = &ipa_ctx->ep[ep_id];
+
+ ipa_write_reg_n_fields(IPA_ENDP_STATUS_N, ep_id, &ep->status);
+}
+
+/** ipa_cfg_ep - IPA end-point configuration
+ * @ep_id: [in] endpoint id assigned by IPA to client
+ * @dst: [in] destination client handle (ignored for consumer clients)
+ *
+ * This includes nat, IPv6CT, header, mode, aggregation and route settings and
+ * is a one shot API to configure the IPA end-point fully
+ *
+ * Returns: 0 on success, negative on failure
+ *
+ * Note: Should not be called from atomic context
+ */
+void ipa_cfg_ep(u32 ep_id)
+{
+ ipa_endp_init_hdr_write(ep_id);
+ ipa_endp_init_hdr_ext_write(ep_id);
+
+ ipa_endp_init_aggr_write(ep_id);
+ ipa_endp_init_cfg_write(ep_id);
+
+ if (ipa_producer(ipa_ctx->ep[ep_id].client)) {
+ ipa_endp_init_mode_write(ep_id);
+ ipa_endp_init_seq_write(ep_id);
+ ipa_endp_init_deaggr_write(ep_id);
+ } else {
+ ipa_endp_init_hdr_metadata_mask_write(ep_id);
+ }
+
+ ipa_endp_status_write(ep_id);
+}
+
+int ipa_interconnect_init(struct device *dev)
+{
+ struct icc_path *path;
+
+ path = of_icc_get(dev, "memory");
+ if (IS_ERR(path))
+ goto err_return;
+ ipa_ctx->memory_path = path;
+
+ path = of_icc_get(dev, "imem");
+ if (IS_ERR(path))
+ goto err_memory_path_put;
+ ipa_ctx->imem_path = path;
+
+ path = of_icc_get(dev, "config");
+ if (IS_ERR(path))
+ goto err_imem_path_put;
+ ipa_ctx->config_path = path;
+
+ return 0;
+
+err_imem_path_put:
+ icc_put(ipa_ctx->imem_path);
+ ipa_ctx->imem_path = NULL;
+err_memory_path_put:
+ icc_put(ipa_ctx->memory_path);
+ ipa_ctx->memory_path = NULL;
+err_return:
+
+ return PTR_ERR(path);
+}
+
+void ipa_interconnect_exit(void)
+{
+ icc_put(ipa_ctx->config_path);
+ ipa_ctx->config_path = NULL;
+
+ icc_put(ipa_ctx->imem_path);
+ ipa_ctx->imem_path = NULL;
+
+ icc_put(ipa_ctx->memory_path);
+ ipa_ctx->memory_path = NULL;
+}
+
+/* Currently we only use bandwidth level, so just "enable" interconnects */
+int ipa_interconnect_enable(void)
+{
+ int ret;
+
+ ret = icc_set(ipa_ctx->memory_path, IPA_MEMORY_AVG, IPA_MEMORY_PEAK);
+ if (ret)
+ return ret;
+
+ ret = icc_set(ipa_ctx->imem_path, IPA_IMEM_AVG, IPA_IMEM_PEAK);
+ if (ret)
+ goto err_disable_memory_path;
+
+ ret = icc_set(ipa_ctx->config_path, IPA_CONFIG_AVG, IPA_CONFIG_PEAK);
+ if (!ret)
+ return 0; /* Success */
+
+ (void)icc_set(ipa_ctx->imem_path, 0, 0);
+err_disable_memory_path:
+ (void)icc_set(ipa_ctx->memory_path, 0, 0);
+
+ return ret;
+}
+
+/* To disable an interconnect, we just its bandwidth to 0 */
+int ipa_interconnect_disable(void)
+{
+ int ret;
+
+ ret = icc_set(ipa_ctx->memory_path, 0, 0);
+ if (ret)
+ return ret;
+
+ ret = icc_set(ipa_ctx->imem_path, 0, 0);
+ if (ret)
+ goto err_reenable_memory_path;
+
+ ret = icc_set(ipa_ctx->config_path, 0, 0);
+ if (!ret)
+ return 0; /* Success */
+
+ /* Re-enable things in the event of an error */
+ (void)icc_set(ipa_ctx->imem_path, IPA_IMEM_AVG, IPA_IMEM_PEAK);
+err_reenable_memory_path:
+ (void)icc_set(ipa_ctx->memory_path, IPA_MEMORY_AVG, IPA_MEMORY_PEAK);
+
+ return ret;
+}
+
+/** ipa_proxy_clk_unvote() - called to remove IPA clock proxy vote
+ *
+ * Return value: none
+ */
+void ipa_proxy_clk_unvote(void)
+{
+ if (ipa_ctx->modem_clk_vote_valid) {
+ ipa_client_remove();
+ ipa_ctx->modem_clk_vote_valid = false;
+ }
+}
+
+/** ipa_proxy_clk_vote() - called to add IPA clock proxy vote
+ *
+ * Return value: none
+ */
+void ipa_proxy_clk_vote(void)
+{
+ if (!ipa_ctx->modem_clk_vote_valid) {
+ ipa_client_add();
+ ipa_ctx->modem_clk_vote_valid = true;
+ }
+}
+
+u32 ipa_get_ep_count(void)
+{
+ return ipa_read_reg(IPA_ENABLED_PIPES);
+}
+
+/** ipa_is_modem_ep()- Checks if endpoint is owned by the modem
+ *
+ * @ep_id: endpoint identifier
+ * Return value: true if owned by modem, false otherwize
+ */
+bool ipa_is_modem_ep(u32 ep_id)
+{
+ int client_idx;
+
+ for (client_idx = 0; client_idx < IPA_CLIENT_MAX; client_idx++) {
+ if (!ipa_modem_consumer(client_idx) &&
+ !ipa_modem_producer(client_idx))
+ continue;
+ if (ipa_client_ep_id(client_idx) == ep_id)
+ return true;
+ }
+
+ return false;
+}
+
+static void ipa_src_rsrc_grp_init(enum ipa_rsrc_grp_type_src n)
+{
+ struct ipa_reg_rsrc_grp_xy_rsrc_type_n limits;
+ const struct rsrc_min_max *x_limits;
+ const struct rsrc_min_max *y_limits;
+
+ x_limits = &ipa_src_rsrc_grp[n][IPA_RSRC_GROUP_LWA_DL];
+ y_limits = &ipa_src_rsrc_grp[n][IPA_RSRC_GROUP_UL_DL];
+ ipa_reg_rsrc_grp_xy_rsrc_type_n(&limits, x_limits->min, x_limits->max,
+ y_limits->min, y_limits->max);
+
+ ipa_write_reg_n_fields(IPA_SRC_RSRC_GRP_01_RSRC_TYPE_N, n, &limits);
+}
+
+static void ipa_dst_rsrc_grp_init(enum ipa_rsrc_grp_type_dst n)
+{
+ struct ipa_reg_rsrc_grp_xy_rsrc_type_n limits;
+ const struct rsrc_min_max *x_limits;
+ const struct rsrc_min_max *y_limits;
+
+ x_limits = &ipa_dst_rsrc_grp[n][IPA_RSRC_GROUP_LWA_DL];
+ y_limits = &ipa_dst_rsrc_grp[n][IPA_RSRC_GROUP_UL_DL];
+ ipa_reg_rsrc_grp_xy_rsrc_type_n(&limits, x_limits->min, x_limits->max,
+ y_limits->min, y_limits->max);
+
+ ipa_write_reg_n_fields(IPA_DST_RSRC_GRP_01_RSRC_TYPE_N, n, &limits);
+}
+
+void ipa_set_resource_groups_min_max_limits(void)
+{
+ ipa_src_rsrc_grp_init(IPA_RSRC_GRP_TYPE_SRC_PKT_CONTEXTS);
+ ipa_src_rsrc_grp_init(IPA_RSRC_GRP_TYPE_SRS_DESCRIPTOR_LISTS);
+ ipa_src_rsrc_grp_init(IPA_RSRC_GRP_TYPE_SRC_DESCRIPTOR_BUFF);
+ ipa_src_rsrc_grp_init(IPA_RSRC_GRP_TYPE_SRC_HPS_DMARS);
+ ipa_src_rsrc_grp_init(IPA_RSRC_GRP_TYPE_SRC_ACK_ENTRIES);
+
+ ipa_dst_rsrc_grp_init(IPA_RSRC_GRP_TYPE_DST_DATA_SECTORS);
+ ipa_dst_rsrc_grp_init(IPA_RSRC_GRP_TYPE_DST_DPS_DMARS);
+}
+
+static void ipa_gsi_poll_after_suspend(struct ipa_ep_context *ep)
+{
+ ipa_rx_switch_to_poll_mode(ep->sys);
+}
+
+/* Suspend a consumer endpoint */
+static void ipa_ep_cons_suspend(enum ipa_client_type client)
+{
+ struct ipa_reg_endp_init_ctrl init_ctrl;
+ u32 ep_id = ipa_client_ep_id(client);
+
+ ipa_reg_endp_init_ctrl(&init_ctrl, true);
+ ipa_write_reg_n_fields(IPA_ENDP_INIT_CTRL_N, ep_id, &init_ctrl);
+
+ /* Due to a hardware bug, a client suspended with an open
+ * aggregation frame will not generate a SUSPEND IPA interrupt.
+ * We work around this by force-closing the aggregation frame,
+ * then simulating the arrival of such an interrupt.
+ */
+ ipa_suspend_active_aggr_wa(ep_id);
+
+ ipa_gsi_poll_after_suspend(&ipa_ctx->ep[ep_id]);
+}
+
+void ipa_ep_suspend_all(void)
+{
+ ipa_ep_cons_suspend(IPA_CLIENT_APPS_WAN_CONS);
+ ipa_ep_cons_suspend(IPA_CLIENT_APPS_LAN_CONS);
+}
+
+/* Resume a suspended consumer endpoint */
+static void ipa_ep_cons_resume(enum ipa_client_type client)
+{
+ struct ipa_reg_endp_init_ctrl init_ctrl;
+ struct ipa_ep_context *ep;
+ u32 ep_id;
+
+ ep_id = ipa_client_ep_id(client);
+ ep = &ipa_ctx->ep[ep_id];
+
+ ipa_reg_endp_init_ctrl(&init_ctrl, false);
+ ipa_write_reg_n_fields(IPA_ENDP_INIT_CTRL_N, ep_id, &init_ctrl);
+
+ if (!ipa_ep_polling(ep))
+ gsi_channel_intr_enable(ipa_ctx->gsi, ep->channel_id);
+}
+
+void ipa_ep_resume_all(void)
+{
+ ipa_ep_cons_resume(IPA_CLIENT_APPS_LAN_CONS);
+ ipa_ep_cons_resume(IPA_CLIENT_APPS_WAN_CONS);
+}
+
+/** ipa_cfg_route() - configure IPA route
+ * @route: IPA route
+ *
+ * Return codes:
+ * 0: success
+ */
+void ipa_cfg_default_route(enum ipa_client_type client)
+{
+ struct ipa_reg_route route;
+
+ ipa_reg_route(&route, ipa_client_ep_id(client));
+ ipa_write_reg_fields(IPA_ROUTE, &route);
+}
+
+/* In certain cases we need to issue a command to reliably clear the
+ * IPA pipeline. Sending a 1-byte DMA task is sufficient, and this
+ * function preallocates a command to do just that. There are
+ * conditions (process context in KILL state) where DMA allocations
+ * can fail, and we need to be able to issue this command to put the
+ * hardware in a known state. By preallocating the command here we
+ * guarantee it can't fail for that reason.
+ */
+int ipa_gsi_dma_task_alloc(void)
+{
+ struct ipa_dma_mem *mem = &ipa_ctx->dma_task_info.mem;
+
+ if (ipa_dma_alloc(mem, IPA_GSI_CHANNEL_STOP_PKT_SIZE, GFP_KERNEL))
+ return -ENOMEM;
+
+ /* IPA_IMM_CMD_DMA_TASK_32B_ADDR */
+ ipa_ctx->dma_task_info.payload = ipahal_dma_task_32b_addr_pyld(mem);
+ if (!ipa_ctx->dma_task_info.payload) {
+ ipa_dma_free(mem);
+
+ return -ENOMEM;
+ }
+
+ return 0;
+}
+
+void ipa_gsi_dma_task_free(void)
+{
+ struct ipa_dma_mem *mem = &ipa_ctx->dma_task_info.mem;
+
+ ipahal_payload_free(ipa_ctx->dma_task_info.payload);
+ ipa_ctx->dma_task_info.payload = NULL;
+ ipa_dma_free(mem);
+}
+
+/** ipa_gsi_dma_task_inject()- Send DMA_TASK to IPA for GSI stop channel
+ *
+ * Send a DMA_TASK of 1B to IPA to unblock GSI channel in STOP_IN_PROG.
+ * Return value: 0 on success, negative otherwise
+ */
+static int ipa_gsi_dma_task_inject(void)
+{
+ struct ipa_desc desc = { };
+
+ desc.type = IPA_IMM_CMD_DESC;
+ desc.len_opcode = IPA_IMM_CMD_DMA_TASK_32B_ADDR;
+ desc.payload = ipa_ctx->dma_task_info.payload;
+
+ return ipa_send_cmd_timeout(&desc, IPA_GSI_DMA_TASK_TIMEOUT);
+}
+
+/** ipa_stop_gsi_channel()- Stops a GSI channel in IPA
+ * @chan_hdl: GSI channel handle
+ *
+ * This function implements the sequence to stop a GSI channel
+ * in IPA. This function returns when the channel is is STOP state.
+ *
+ * Return value: 0 on success, negative otherwise
+ */
+int ipa_stop_gsi_channel(u32 ep_id)
+{
+ struct ipa_ep_context *ep = &ipa_ctx->ep[ep_id];
+ int ret;
+ int i;
+
+ if (ipa_producer(ep->client))
+ return gsi_channel_stop(ipa_ctx->gsi, ep->channel_id);
+
+ for (i = 0; i < IPA_GSI_CHANNEL_STOP_MAX_RETRY; i++) {
+ ret = gsi_channel_stop(ipa_ctx->gsi, ep->channel_id);
+ if (ret != -EAGAIN && ret != -ETIMEDOUT)
+ return ret;
+
+ /* Send a 1B packet DMA_TASK to IPA and try again */
+ ret = ipa_gsi_dma_task_inject();
+ if (ret)
+ return ret;
+
+ /* sleep for short period to flush IPA */
+ usleep_range(IPA_GSI_CHANNEL_STOP_SLEEP_MIN,
+ IPA_GSI_CHANNEL_STOP_SLEEP_MAX);
+ }
+
+ ipa_err("Failed to stop GSI channel with retries\n");
+
+ return -EFAULT;
+}
+
+/** ipa_enable_dcd() - enable dynamic clock division on IPA
+ *
+ * Return value: Non applicable
+ *
+ */
+void ipa_enable_dcd(void)
+{
+ struct ipa_reg_idle_indication_cfg indication;
+
+ /* recommended values for IPA 3.5 according to IPA HPG */
+ ipa_reg_idle_indication_cfg(&indication, 256, 0);
+ ipa_write_reg_fields(IPA_IDLE_INDICATION_CFG, &indication);
+}
+
+/** ipa_set_flt_tuple_mask() - Sets the flt tuple masking for the given
+ * endpoint. Endpoint must be for AP (not modem) and support filtering.
+ * Updates the the filtering masking values without changing the rt ones.
+ *
+ * @ep_id: filter endpoint to configure the tuple masking
+ * @tuple: the tuple members masking
+ * Returns: 0 on success, negative on failure
+ *
+ */
+void ipa_set_flt_tuple_mask(u32 ep_id)
+{
+ struct ipa_ep_filter_router_hsh_cfg hsh_cfg;
+
+ ipa_read_reg_n_fields(IPA_ENDP_FILTER_ROUTER_HSH_CFG_N, ep_id,
+ &hsh_cfg);
+
+ ipa_reg_hash_tuple(&hsh_cfg.flt);
+
+ ipa_write_reg_n_fields(IPA_ENDP_FILTER_ROUTER_HSH_CFG_N, ep_id,
+ &hsh_cfg);
+}
+
+/** ipa_set_rt_tuple_mask() - Sets the rt tuple masking for the given tbl
+ * table index must be for AP EP (not modem)
+ * updates the the routing masking values without changing the flt ones.
+ *
+ * @tbl_idx: routing table index to configure the tuple masking
+ * @tuple: the tuple members masking
+ * Returns: 0 on success, negative on failure
+ *
+ */
+void ipa_set_rt_tuple_mask(int tbl_idx)
+{
+ struct ipa_ep_filter_router_hsh_cfg hsh_cfg;
+
+ ipa_read_reg_n_fields(IPA_ENDP_FILTER_ROUTER_HSH_CFG_N, tbl_idx,
+ &hsh_cfg);
+
+ ipa_reg_hash_tuple(&hsh_cfg.rt);
+
+ ipa_write_reg_n_fields(IPA_ENDP_FILTER_ROUTER_HSH_CFG_N, tbl_idx,
+ &hsh_cfg);
+}
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("IPA HW device driver");
--
2.17.1
^ permalink raw reply related
* [RFC PATCH 09/12] soc: qcom: ipa: main IPA source file
From: Alex Elder @ 2018-11-07 0:32 UTC (permalink / raw)
To: davem, arnd, bjorn.andersson, ilias.apalodimas
Cc: netdev, devicetree, linux-arm-msm, linux-soc, linux-arm-kernel,
linux-kernel, syadagir, mjavid, robh+dt, mark.rutland
In-Reply-To: <20181107003250.5832-1-elder@linaro.org>
This patch includes "ipa_main.c", which consists mostly of the
initialization code.
The IPA is a hardware resource shared by multiple independent
execution environments (currently, the AP and the modem). In some
cases, initialization must be performed by only one of these. As an
example, the AP must initialize some filter table data structures
that are only used by the modem. (And in general, some initialization
of IPA hardware is required regardless of whether it will be used.)
There are two phases of IPA initialization. The first phase is
triggered by the probe of the driver. It involves setting up
operating system resources, and doing some basic initialization
of IPA memory resources using register and DMA access.
The second phase involves configuration of enpoints used, and this
phase requires access to the GSI layer. However the GSI layer is
requires some firmware to be loaded before it can be used. So
the second stage (in ipa_post_init()) only occurs after it is known
firmware is loaded.
The GSI firmware can be loaded in two ways: the modem can load it;
or Trust Zone code running on the AP can load it. If the modem
loads the firmware, it will send an SMP2P interrupt to the AP to
signal that GSI firmware is loaded and the AP can proceed with its
second stage IPA initialization. If Trust Zone is responsible for
loading the firmware, the IPA driver requests the firmware blob
from the file system and passes the result via an SMC to Trust Zone
to load and activate the GSI firmware. When that has completed
successfully, the second stage of initialization can proceed.
Signed-off-by: Alex Elder <elder@linaro.org>
---
drivers/net/ipa/ipa_main.c | 1400 ++++++++++++++++++++++++++++++++++++
1 file changed, 1400 insertions(+)
create mode 100644 drivers/net/ipa/ipa_main.c
diff --git a/drivers/net/ipa/ipa_main.c b/drivers/net/ipa/ipa_main.c
new file mode 100644
index 000000000000..3d7c59177388
--- /dev/null
+++ b/drivers/net/ipa/ipa_main.c
@@ -0,0 +1,1400 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
+ * Copyright (C) 2018 Linaro Ltd.
+ */
+
+#include <linux/types.h>
+#include <linux/atomic.h>
+#include <linux/spinlock.h>
+#include <linux/mutex.h>
+#include <linux/device.h>
+#include <linux/firmware.h>
+#include <linux/workqueue.h>
+#include <linux/bug.h>
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <linux/interrupt.h>
+#include <linux/notifier.h>
+#include <linux/remoteproc.h>
+#include <linux/pm_wakeup.h>
+#include <linux/kconfig.h>
+#include <linux/qcom_scm.h>
+#include <linux/soc/qcom/mdt_loader.h>
+#include <linux/soc/qcom/smem.h>
+#include <linux/soc/qcom/smem_state.h>
+#include <linux/module.h>
+
+#include "ipa_i.h"
+#include "ipa_dma.h"
+#include "ipahal.h"
+
+#define IPA_CORE_CLOCK_RATE (75UL * 1000 * 1000)
+
+/* The name of the main firmware file relative to /lib/firmware */
+#define IPA_FWS_PATH "ipa_fws.mdt"
+#define IPA_PAS_ID 15
+
+#define IPA_APPS_CMD_PROD_RING_COUNT 256
+#define IPA_APPS_LAN_CONS_RING_COUNT 256
+
+/* Details of the initialization sequence are determined by who is
+ * responsible for doing some early IPA hardware initialization.
+ * The Device Tree compatible string defines what to expect.
+ */
+enum ipa_init_type {
+ ipa_undefined_init = 0,
+ ipa_tz_init,
+ ipa_modem_init,
+};
+
+struct ipa_match_data {
+ enum ipa_init_type init_type;
+};
+
+static void ipa_client_remove_deferred(struct work_struct *work);
+static DECLARE_WORK(ipa_client_remove_work, ipa_client_remove_deferred);
+
+static struct ipa_context ipa_ctx_struct;
+struct ipa_context *ipa_ctx = &ipa_ctx_struct;
+
+static int hdr_init_local_cmd(u32 offset, u32 size)
+{
+ struct ipa_desc desc = { };
+ struct ipa_dma_mem mem;
+ void *payload;
+ int ret;
+
+ if (ipa_dma_alloc(&mem, size, GFP_KERNEL))
+ return -ENOMEM;
+
+ offset += ipa_ctx->smem_offset;
+
+ payload = ipahal_hdr_init_local_pyld(&mem, offset);
+ if (!payload) {
+ ret = -ENOMEM;
+ goto err_dma_free;
+ }
+
+ desc.type = IPA_IMM_CMD_DESC;
+ desc.len_opcode = IPA_IMM_CMD_HDR_INIT_LOCAL;
+ desc.payload = payload;
+
+ ret = ipa_send_cmd(&desc);
+
+ ipahal_payload_free(payload);
+err_dma_free:
+ ipa_dma_free(&mem);
+
+ return ret;
+}
+
+static int dma_shared_mem_zero_cmd(u32 offset, u32 size)
+{
+ struct ipa_desc desc = { };
+ struct ipa_dma_mem mem;
+ void *payload;
+ int ret;
+
+ ipa_assert(size > 0);
+
+ if (ipa_dma_alloc(&mem, size, GFP_KERNEL))
+ return -ENOMEM;
+
+ offset += ipa_ctx->smem_offset;
+
+ payload = ipahal_dma_shared_mem_write_pyld(&mem, offset);
+ if (!payload) {
+ ret = -ENOMEM;
+ goto err_dma_free;
+ }
+
+ desc.type = IPA_IMM_CMD_DESC;
+ desc.len_opcode = IPA_IMM_CMD_DMA_SHARED_MEM;
+ desc.payload = payload;
+
+ ret = ipa_send_cmd(&desc);
+
+ ipahal_payload_free(payload);
+err_dma_free:
+ ipa_dma_free(&mem);
+
+ return ret;
+}
+
+/**
+ * ipa_modem_smem_init() - Initialize modem general memory and header memory
+ */
+int ipa_modem_smem_init(void)
+{
+ int ret;
+
+ ret = dma_shared_mem_zero_cmd(IPA_MEM_MODEM_OFST, IPA_MEM_MODEM_SIZE);
+ if (ret)
+ return ret;
+
+ ret = dma_shared_mem_zero_cmd(IPA_MEM_MODEM_HDR_OFST,
+ IPA_MEM_MODEM_HDR_SIZE);
+ if (ret)
+ return ret;
+
+ return dma_shared_mem_zero_cmd(IPA_MEM_MODEM_HDR_PROC_CTX_OFST,
+ IPA_MEM_MODEM_HDR_PROC_CTX_SIZE);
+}
+
+static int ipa_ep_apps_cmd_prod_setup(void)
+{
+ enum ipa_client_type dst_client;
+ enum ipa_client_type client;
+ u32 channel_count;
+ u32 ep_id;
+ int ret;
+
+ if (ipa_ctx->cmd_prod_ep_id != IPA_EP_ID_BAD)
+ ret = -EBUSY;
+
+ client = IPA_CLIENT_APPS_CMD_PROD;
+ dst_client = IPA_CLIENT_APPS_LAN_CONS;
+ channel_count = IPA_APPS_CMD_PROD_RING_COUNT;
+
+ ret = ipa_ep_alloc(client);
+ if (ret < 0)
+ return ret;
+ ep_id = ret;
+
+
+ ipa_endp_init_mode_prod(ep_id, IPA_DMA, dst_client);
+ ipa_endp_init_seq_prod(ep_id);
+ ipa_endp_init_deaggr_prod(ep_id);
+
+ ret = ipa_ep_setup(ep_id, channel_count, 2, 0, NULL, NULL);
+ if (ret)
+ ipa_ep_free(ep_id);
+ else
+ ipa_ctx->cmd_prod_ep_id = ep_id;
+
+ return ret;
+}
+
+/* Only used for IPA_MEM_UC_EVENT_RING_OFST, which must be 1KB aligned */
+static __always_inline void sram_set_canary(u32 *sram_mmio, u32 offset)
+{
+ BUILD_BUG_ON(offset < sizeof(*sram_mmio));
+ BUILD_BUG_ON(offset % 1024);
+
+ sram_mmio += offset / sizeof(*sram_mmio);
+ *--sram_mmio = IPA_MEM_CANARY_VAL;
+}
+
+static __always_inline void sram_set_canaries(u32 *sram_mmio, u32 offset)
+{
+ BUILD_BUG_ON(offset < 2 * sizeof(*sram_mmio));
+ BUILD_BUG_ON(offset % 8);
+
+ sram_mmio += offset / sizeof(*sram_mmio);
+ *--sram_mmio = IPA_MEM_CANARY_VAL;
+ *--sram_mmio = IPA_MEM_CANARY_VAL;
+}
+
+/**
+ * ipa_init_sram() - Initialize IPA local SRAM.
+ *
+ * Return: 0 if successful, or a negative error code
+ */
+static int ipa_init_sram(void)
+{
+ phys_addr_t phys_addr;
+ u32 *ipa_sram_mmio;
+
+ phys_addr = ipa_ctx->ipa_phys;
+ phys_addr += ipa_reg_n_offset(IPA_SRAM_DIRECT_ACCESS_N, 0);
+ phys_addr += ipa_ctx->smem_offset;
+
+ ipa_sram_mmio = ioremap(phys_addr, ipa_ctx->smem_size);
+ if (!ipa_sram_mmio) {
+ ipa_err("fail to ioremap IPA SRAM\n");
+ return -ENOMEM;
+ }
+
+ sram_set_canaries(ipa_sram_mmio, IPA_MEM_V4_FLT_HASH_OFST);
+ sram_set_canaries(ipa_sram_mmio, IPA_MEM_V4_FLT_NHASH_OFST);
+ sram_set_canaries(ipa_sram_mmio, IPA_MEM_V6_FLT_HASH_OFST);
+ sram_set_canaries(ipa_sram_mmio, IPA_MEM_V6_FLT_NHASH_OFST);
+ sram_set_canaries(ipa_sram_mmio, IPA_MEM_V4_RT_HASH_OFST);
+ sram_set_canaries(ipa_sram_mmio, IPA_MEM_V4_RT_NHASH_OFST);
+ sram_set_canaries(ipa_sram_mmio, IPA_MEM_V6_RT_HASH_OFST);
+ sram_set_canaries(ipa_sram_mmio, IPA_MEM_V6_RT_NHASH_OFST);
+ sram_set_canaries(ipa_sram_mmio, IPA_MEM_MODEM_HDR_OFST);
+ sram_set_canaries(ipa_sram_mmio, IPA_MEM_MODEM_HDR_PROC_CTX_OFST);
+ sram_set_canaries(ipa_sram_mmio, IPA_MEM_MODEM_OFST);
+
+ /* Only one canary precedes the microcontroller ring */
+ sram_set_canary(ipa_sram_mmio, IPA_MEM_UC_EVENT_RING_OFST);
+
+ iounmap(ipa_sram_mmio);
+
+ return 0;
+}
+
+/**
+ * ipa_init_hdr() - Initialize IPA header block.
+ *
+ * Return: 0 if successful, or a negative error code
+ */
+static int ipa_init_hdr(void)
+{
+ int ret;
+
+ if (IPA_MEM_MODEM_HDR_SIZE) {
+ ret = hdr_init_local_cmd(IPA_MEM_MODEM_HDR_OFST,
+ IPA_MEM_MODEM_HDR_SIZE);
+ if (ret)
+ return ret;
+ }
+
+ if (IPA_MEM_APPS_HDR_SIZE) {
+ BUILD_BUG_ON(IPA_MEM_APPS_HDR_OFST % 8);
+ ret = hdr_init_local_cmd(IPA_MEM_APPS_HDR_OFST,
+ IPA_MEM_APPS_HDR_SIZE);
+ if (ret)
+ return ret;
+ }
+
+ if (IPA_MEM_MODEM_HDR_PROC_CTX_SIZE) {
+ ret = dma_shared_mem_zero_cmd(IPA_MEM_MODEM_HDR_PROC_CTX_OFST,
+ IPA_MEM_MODEM_HDR_PROC_CTX_SIZE);
+ if (ret)
+ return ret;
+ }
+
+ if (IPA_MEM_APPS_HDR_PROC_CTX_SIZE) {
+ BUILD_BUG_ON(IPA_MEM_APPS_HDR_PROC_CTX_OFST % 8);
+ ret = dma_shared_mem_zero_cmd(IPA_MEM_APPS_HDR_PROC_CTX_OFST,
+ IPA_MEM_APPS_HDR_PROC_CTX_SIZE);
+ if (ret)
+ return ret;
+ }
+
+ ipa_write_reg(IPA_LOCAL_PKT_PROC_CNTXT_BASE,
+ ipa_ctx->smem_offset + IPA_MEM_MODEM_HDR_PROC_CTX_OFST);
+
+ return 0;
+}
+
+/**
+ * ipa_init_rt4() - Initialize IPA routing block for IPv4.
+ *
+ * Return: 0 if successful, or a negative error code
+ */
+static int ipa_init_rt4(struct ipa_dma_mem *mem)
+{
+ struct ipa_desc desc = { };
+ u32 nhash_offset;
+ u32 hash_offset;
+ void *payload;
+ int ret;
+
+ hash_offset = ipa_ctx->smem_offset + IPA_MEM_V4_RT_HASH_OFST;
+ nhash_offset = ipa_ctx->smem_offset + IPA_MEM_V4_RT_NHASH_OFST;
+ payload = ipahal_ip_v4_routing_init_pyld(mem, hash_offset,
+ nhash_offset);
+ if (!payload)
+ return -ENOMEM;
+
+ desc.type = IPA_IMM_CMD_DESC;
+ desc.len_opcode = IPA_IMM_CMD_IP_V4_ROUTING_INIT;
+ desc.payload = payload;
+
+ ret = ipa_send_cmd(&desc);
+
+ ipahal_payload_free(payload);
+
+ return ret;
+}
+
+/**
+ * ipa_init_rt6() - Initialize IPA routing block for IPv6.
+ *
+ * Return: 0 if successful, or a negative error code
+ */
+static int ipa_init_rt6(struct ipa_dma_mem *mem)
+{
+ struct ipa_desc desc = { };
+ u32 nhash_offset;
+ u32 hash_offset;
+ void *payload;
+ int ret;
+
+ hash_offset = ipa_ctx->smem_offset + IPA_MEM_V6_RT_HASH_OFST;
+ nhash_offset = ipa_ctx->smem_offset + IPA_MEM_V6_RT_NHASH_OFST;
+ payload = ipahal_ip_v6_routing_init_pyld(mem, hash_offset,
+ nhash_offset);
+ if (!payload)
+ return -ENOMEM;
+
+ desc.type = IPA_IMM_CMD_DESC;
+ desc.len_opcode = IPA_IMM_CMD_IP_V6_ROUTING_INIT;
+ desc.payload = payload;
+
+ ret = ipa_send_cmd(&desc);
+
+ ipahal_payload_free(payload);
+
+ return ret;
+}
+
+/**
+ * ipa_init_flt4() - Initialize IPA filtering block for IPv4.
+ *
+ * Return: 0 if successful, or a negative error code
+ */
+static int ipa_init_flt4(struct ipa_dma_mem *mem)
+{
+ struct ipa_desc desc = { };
+ u32 nhash_offset;
+ u32 hash_offset;
+ void *payload;
+ int ret;
+
+ hash_offset = ipa_ctx->smem_offset + IPA_MEM_V4_FLT_HASH_OFST;
+ nhash_offset = ipa_ctx->smem_offset + IPA_MEM_V4_FLT_NHASH_OFST;
+ payload = ipahal_ip_v4_filter_init_pyld(mem, hash_offset,
+ nhash_offset);
+ if (!payload)
+ return -ENOMEM;
+
+ desc.type = IPA_IMM_CMD_DESC;
+ desc.len_opcode = IPA_IMM_CMD_IP_V4_FILTER_INIT;
+ desc.payload = payload;
+
+ ret = ipa_send_cmd(&desc);
+
+ ipahal_payload_free(payload);
+
+ return ret;
+}
+
+/**
+ * ipa_init_flt6() - Initialize IPA filtering block for IPv6.
+ *
+ * Return: 0 if successful, or a negative error code
+ */
+static int ipa_init_flt6(struct ipa_dma_mem *mem)
+{
+ struct ipa_desc desc = { };
+ u32 nhash_offset;
+ u32 hash_offset;
+ void *payload;
+ int ret;
+
+ hash_offset = ipa_ctx->smem_offset + IPA_MEM_V6_FLT_HASH_OFST;
+ nhash_offset = ipa_ctx->smem_offset + IPA_MEM_V6_FLT_NHASH_OFST;
+ payload = ipahal_ip_v6_filter_init_pyld(mem, hash_offset,
+ nhash_offset);
+ if (!payload)
+ return -ENOMEM;
+
+ desc.type = IPA_IMM_CMD_DESC;
+ desc.len_opcode = IPA_IMM_CMD_IP_V6_FILTER_INIT;
+ desc.payload = payload;
+
+ ret = ipa_send_cmd(&desc);
+
+ ipahal_payload_free(payload);
+
+ return ret;
+}
+
+static void ipa_setup_flt_hash_tuple(void)
+{
+ u32 ep_mask = ipa_ctx->filter_bitmap;
+
+ while (ep_mask) {
+ u32 i = __ffs(ep_mask);
+
+ ep_mask ^= BIT(i);
+ if (!ipa_is_modem_ep(i))
+ ipa_set_flt_tuple_mask(i);
+ }
+}
+
+static void ipa_setup_rt_hash_tuple(void)
+{
+ u32 route_mask;
+ u32 modem_mask;
+
+ BUILD_BUG_ON(!IPA_MEM_MODEM_RT_COUNT);
+ BUILD_BUG_ON(IPA_MEM_RT_COUNT < IPA_MEM_MODEM_RT_COUNT);
+
+ /* Compute a mask representing non-modem route table entries */
+ route_mask = GENMASK(IPA_MEM_RT_COUNT - 1, 0);
+ modem_mask = GENMASK(IPA_MEM_MODEM_RT_INDEX_MAX,
+ IPA_MEM_MODEM_RT_INDEX_MIN);
+ route_mask &= ~modem_mask;
+
+ while (route_mask) {
+ u32 i = __ffs(route_mask);
+
+ route_mask ^= BIT(i);
+ ipa_set_rt_tuple_mask(i);
+ }
+}
+
+static int ipa_ep_apps_lan_cons_setup(void)
+{
+ enum ipa_client_type client;
+ u32 rx_buffer_size;
+ u32 channel_count;
+ u32 aggr_count;
+ u32 aggr_bytes;
+ u32 aggr_size;
+ u32 ep_id;
+ int ret;
+
+ client = IPA_CLIENT_APPS_LAN_CONS;
+ channel_count = IPA_APPS_LAN_CONS_RING_COUNT;
+ aggr_count = IPA_GENERIC_AGGR_PKT_LIMIT;
+ aggr_bytes = IPA_GENERIC_AGGR_BYTE_LIMIT;
+
+ if (aggr_bytes > ipa_reg_aggr_max_byte_limit())
+ return -EINVAL;
+
+ if (aggr_count > ipa_reg_aggr_max_packet_limit())
+ return -EINVAL;
+
+ if (ipa_ctx->lan_cons_ep_id != IPA_EP_ID_BAD)
+ return -EBUSY;
+
+ /* Compute the buffer size required to handle the requested
+ * aggregation byte limit. The aggr_byte_limit value is
+ * expressed as a number of KB, but we derive that value
+ * after computing the buffer size to use (in bytes). The
+ * buffer must be sufficient to hold one IPA_MTU-sized
+ * packet *after* the limit is reached.
+ *
+ * (Note that the rx_buffer_size value reflects only the
+ * space for data, not any standard metadata or headers.)
+ */
+ rx_buffer_size = ipa_aggr_byte_limit_buf_size(aggr_bytes);
+
+ /* Account for the extra IPA_MTU past the limit in the
+ * buffer, and convert the result to the KB units the
+ * aggr_byte_limit uses.
+ */
+ aggr_size = (rx_buffer_size - IPA_MTU) / SZ_1K;
+
+ ret = ipa_ep_alloc(client);
+ if (ret < 0)
+ return ret;
+ ep_id = ret;
+
+ ipa_endp_init_hdr_cons(ep_id, IPA_LAN_RX_HEADER_LENGTH, 0, 0);
+ ipa_endp_init_hdr_ext_cons(ep_id, ilog2(sizeof(u32)), false);
+ ipa_endp_init_aggr_cons(ep_id, aggr_size, aggr_count, false);
+ ipa_endp_init_cfg_cons(ep_id, IPA_CS_OFFLOAD_DL);
+ ipa_endp_init_hdr_metadata_mask_cons(ep_id, 0x0);
+ ipa_endp_status_cons(ep_id, true);
+
+ ret = ipa_ep_setup(ep_id, channel_count, 1, rx_buffer_size,
+ ipa_lan_rx_cb, NULL);
+ if (ret)
+ ipa_ep_free(ep_id);
+ else
+ ipa_ctx->lan_cons_ep_id = ep_id;
+
+ return ret;
+}
+
+static int ipa_ep_apps_setup(void)
+{
+ struct ipa_dma_mem mem; /* Empty table */
+ int ret;
+
+ /* CMD OUT (AP->IPA) */
+ ret = ipa_ep_apps_cmd_prod_setup();
+ if (ret < 0)
+ return ret;
+
+ ipa_init_sram();
+ ipa_init_hdr();
+
+ ret = ipahal_rt_generate_empty_img(IPA_MEM_RT_COUNT, &mem);
+ ipa_assert(!ret);
+ ipa_init_rt4(&mem);
+ ipa_init_rt6(&mem);
+ ipahal_free_empty_img(&mem);
+
+ ret = ipahal_flt_generate_empty_img(ipa_ctx->filter_bitmap, &mem);
+ ipa_assert(!ret);
+ ipa_init_flt4(&mem);
+ ipa_init_flt6(&mem);
+ ipahal_free_empty_img(&mem);
+
+ ipa_setup_flt_hash_tuple();
+ ipa_setup_rt_hash_tuple();
+
+ /* LAN IN (IPA->AP)
+ *
+ * Even without supporting LAN traffic, we use the LAN consumer
+ * endpoint for receiving some information from the IPA. If we issue
+ * a tagged command, we arrange to be notified of its completion
+ * through this endpoint. In addition, we arrange for this endpoint
+ * to be used as the IPA's default route; the IPA will notify the AP
+ * of exceptions (unroutable packets, but other events as well)
+ * through this endpoint.
+ */
+ ret = ipa_ep_apps_lan_cons_setup();
+ if (ret < 0)
+ goto fail_flt_hash_tuple;
+
+ ipa_cfg_default_route(IPA_CLIENT_APPS_LAN_CONS);
+
+ return 0;
+
+fail_flt_hash_tuple:
+ ipa_ep_teardown(ipa_ctx->cmd_prod_ep_id);
+ ipa_ctx->cmd_prod_ep_id = IPA_EP_ID_BAD;
+
+ return ret;
+}
+
+static int ipa_clock_init(struct device *dev)
+{
+ struct clk *clk;
+ int ret;
+
+ clk = clk_get(dev, "core");
+ if (IS_ERR(clk))
+ return PTR_ERR(clk);
+
+ ret = clk_set_rate(clk, IPA_CORE_CLOCK_RATE);
+ if (ret) {
+ clk_put(clk);
+ return ret;
+ }
+
+ ipa_ctx->core_clock = clk;
+
+ return 0;
+}
+
+static void ipa_clock_exit(void)
+{
+ clk_put(ipa_ctx->core_clock);
+ ipa_ctx->core_clock = NULL;
+}
+
+/**
+ * ipa_enable_clks() - Turn on IPA clocks
+ */
+static void ipa_enable_clks(void)
+{
+ if (WARN_ON(ipa_interconnect_enable()))
+ return;
+
+ if (WARN_ON(clk_prepare_enable(ipa_ctx->core_clock)))
+ ipa_interconnect_disable();
+}
+
+/**
+ * ipa_disable_clks() - Turn off IPA clocks
+ */
+static void ipa_disable_clks(void)
+{
+ clk_disable_unprepare(ipa_ctx->core_clock);
+ WARN_ON(ipa_interconnect_disable());
+}
+
+/* Add an IPA client under protection of the mutex. This is called
+ * for the first client, but a race could mean another caller gets
+ * the first reference. When the first reference is taken, IPA
+ * clocks are enabled endpoints are resumed. A positive reference count
+ * means the endpoints are active; this doesn't set the first reference
+ * until after this is complete (and the mutex, not the atomic
+ * count, is what protects this).
+ */
+static void ipa_client_add_first(void)
+{
+ mutex_lock(&ipa_ctx->active_clients_mutex);
+
+ /* A reference might have been added while awaiting the mutex. */
+ if (!atomic_inc_not_zero(&ipa_ctx->active_clients_count)) {
+ ipa_enable_clks();
+ ipa_ep_resume_all();
+ atomic_inc(&ipa_ctx->active_clients_count);
+ } else {
+ ipa_assert(atomic_read(&ipa_ctx->active_clients_count) > 1);
+ }
+
+ mutex_unlock(&ipa_ctx->active_clients_mutex);
+}
+
+/* Attempt to add an IPA client reference, but only if this does not
+ * represent the initiaal reference. Returns true if the reference
+ * was taken, false otherwise.
+ */
+static bool ipa_client_add_not_first(void)
+{
+ return !!atomic_inc_not_zero(&ipa_ctx->active_clients_count);
+}
+
+/* Add an IPA client, but only if the reference count is already
+ * non-zero. (This is used to avoid blocking.) Returns true if the
+ * additional reference was added successfully, or false otherwise.
+ */
+bool ipa_client_add_additional(void)
+{
+ return ipa_client_add_not_first();
+}
+
+/* Add an IPA client. If this is not the first client, the
+ * reference count is updated and return is immediate. Otherwise
+ * ipa_client_add_first() will safely add the first client, enabling
+ * clocks and setting up (resuming) endpoints before returning.
+ */
+void ipa_client_add(void)
+{
+ /* There's nothing more to do if this isn't the first reference */
+ if (!ipa_client_add_not_first())
+ ipa_client_add_first();
+}
+
+/* Remove an IPA client under protection of the mutex. This is
+ * called for the last remaining client, but a race could mean
+ * another caller gets an additional reference before the mutex
+ * is acquired. When the final reference is dropped, endpoints are
+ * suspended and IPA clocks disabled.
+ */
+static void ipa_client_remove_final(void)
+{
+ mutex_lock(&ipa_ctx->active_clients_mutex);
+
+ /* A reference might have been removed while awaiting the mutex. */
+ if (!atomic_dec_return(&ipa_ctx->active_clients_count)) {
+ ipa_ep_suspend_all();
+ ipa_disable_clks();
+ }
+
+ mutex_unlock(&ipa_ctx->active_clients_mutex);
+}
+
+/* Decrement the active clients reference count, and if the result
+ * is 0, suspend the endpoints and disable clocks.
+ *
+ * This function runs in work queue context, scheduled to run whenever
+ * the last reference would be dropped in ipa_client_remove().
+ */
+static void ipa_client_remove_deferred(struct work_struct *work)
+{
+ ipa_client_remove_final();
+}
+
+/* Attempt to remove a client reference, but only if this is not the
+ * only reference remaining. Returns true if the reference was
+ * removed, or false if doing so would produce a zero reference
+ * count.
+ */
+static bool ipa_client_remove_not_final(void)
+{
+ return !!atomic_add_unless(&ipa_ctx->active_clients_count, -1, 1);
+}
+
+/* Attempt to remove an IPA client reference. If this represents
+ * the last reference arrange for ipa_client_remove_final() to be
+ * called in workqueue context, dropping the last reference under
+ * protection of the mutex.
+ */
+void ipa_client_remove(void)
+{
+ if (!ipa_client_remove_not_final())
+ queue_work(ipa_ctx->power_mgmt_wq, &ipa_client_remove_work);
+}
+
+/** ipa_inc_acquire_wakelock() - Increase active clients counter, and
+ * acquire wakelock if necessary
+ */
+void ipa_inc_acquire_wakelock(void)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&ipa_ctx->wakeup_lock, flags);
+
+ ipa_ctx->wakeup_count++;
+ if (ipa_ctx->wakeup_count == 1)
+ __pm_stay_awake(&ipa_ctx->wakeup);
+
+ spin_unlock_irqrestore(&ipa_ctx->wakeup_lock, flags);
+}
+
+/** ipa_dec_release_wakelock() - Decrease active clients counter
+ *
+ * In case if the ref count is 0, release the wakelock.
+ */
+void ipa_dec_release_wakelock(void)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&ipa_ctx->wakeup_lock, flags);
+
+ ipa_ctx->wakeup_count--;
+ if (ipa_ctx->wakeup_count == 0)
+ __pm_relax(&ipa_ctx->wakeup);
+
+ spin_unlock_irqrestore(&ipa_ctx->wakeup_lock, flags);
+}
+
+/** ipa_suspend_handler() - Handle the suspend interrupt
+ * @interrupt: Interrupt type
+ * @endpoints: Interrupt specific information data
+ */
+static void ipa_suspend_handler(enum ipa_irq_type interrupt, u32 interrupt_data)
+{
+ u32 endpoints = interrupt_data;
+
+ while (endpoints) {
+ enum ipa_client_type client;
+ u32 i = __ffs(endpoints);
+
+ endpoints ^= BIT(i);
+
+ if (!ipa_ctx->ep[i].allocated)
+ continue;
+
+ client = ipa_ctx->ep[i].client;
+ if (!ipa_ap_consumer(client))
+ continue;
+
+ /* endpoint will be unsuspended by enabling IPA clocks */
+ mutex_lock(&ipa_ctx->transport_pm.transport_pm_mutex);
+ if (!atomic_read(&ipa_ctx->transport_pm.dec_clients)) {
+ ipa_client_add();
+
+ atomic_set(&ipa_ctx->transport_pm.dec_clients, 1);
+ }
+ mutex_unlock(&ipa_ctx->transport_pm.transport_pm_mutex);
+ }
+}
+
+/**
+ * ipa_init_interrupts() - Initialize IPA interrupts
+ */
+static int ipa_init_interrupts(void)
+{
+ int ret;
+
+ ret = ipa_interrupts_init();
+ if (!ret)
+ return ret;
+
+ ipa_add_interrupt_handler(IPA_TX_SUSPEND_IRQ, ipa_suspend_handler);
+
+ return 0;
+}
+
+static void ipa_freeze_clock_vote_and_notify_modem(void)
+{
+ u32 value;
+ u32 mask;
+
+ if (ipa_ctx->smp2p_info.res_sent)
+ return;
+
+ if (!ipa_ctx->smp2p_info.enabled_state) {
+ ipa_err("smp2p out gpio not assigned\n");
+ return;
+ }
+
+ ipa_ctx->smp2p_info.ipa_clk_on = ipa_client_add_additional();
+
+ /* Signal whether the clock is enabled */
+ mask = BIT(ipa_ctx->smp2p_info.enabled_bit);
+ value = ipa_ctx->smp2p_info.ipa_clk_on ? mask : 0;
+ qcom_smem_state_update_bits(ipa_ctx->smp2p_info.enabled_state, mask,
+ value);
+
+ /* Now indicate that the enabled flag is valid */
+ mask = BIT(ipa_ctx->smp2p_info.valid_bit);
+ value = mask;
+ qcom_smem_state_update_bits(ipa_ctx->smp2p_info.valid_state, mask,
+ value);
+
+ ipa_ctx->smp2p_info.res_sent = true;
+}
+
+void ipa_reset_freeze_vote(void)
+{
+ u32 mask;
+
+ if (!ipa_ctx->smp2p_info.res_sent)
+ return;
+
+ if (ipa_ctx->smp2p_info.ipa_clk_on)
+ ipa_client_remove();
+
+ /* Reset the clock enabled valid flag */
+ mask = BIT(ipa_ctx->smp2p_info.valid_bit);
+ qcom_smem_state_update_bits(ipa_ctx->smp2p_info.valid_state, mask, 0);
+
+ /* Mark the clock disabled for good measure... */
+ mask = BIT(ipa_ctx->smp2p_info.enabled_bit);
+ qcom_smem_state_update_bits(ipa_ctx->smp2p_info.enabled_state, mask, 0);
+
+ ipa_ctx->smp2p_info.res_sent = false;
+ ipa_ctx->smp2p_info.ipa_clk_on = false;
+}
+
+static int
+ipa_panic_notifier(struct notifier_block *this, unsigned long event, void *ptr)
+{
+ ipa_freeze_clock_vote_and_notify_modem();
+ ipa_uc_panic_notifier();
+
+ return NOTIFY_DONE;
+}
+
+static struct notifier_block ipa_panic_blk = {
+ .notifier_call = ipa_panic_notifier,
+ /* IPA panic handler needs to run before modem shuts down */
+ .priority = INT_MAX,
+};
+
+static void ipa_register_panic_hdlr(void)
+{
+ atomic_notifier_chain_register(&panic_notifier_list, &ipa_panic_blk);
+}
+
+/* Remoteproc callbacks for SSR events: prepare, start, stop, unprepare */
+int ipa_ssr_prepare(struct rproc_subdev *subdev)
+{
+ printk("======== SSR prepare received ========\n");
+ return 0;
+}
+EXPORT_SYMBOL_GPL(ipa_ssr_prepare);
+
+int ipa_ssr_start(struct rproc_subdev *subdev)
+{
+ printk("======== SSR start received ========\n");
+ return 0;
+}
+EXPORT_SYMBOL_GPL(ipa_ssr_start);
+
+void ipa_ssr_stop(struct rproc_subdev *subdev, bool crashed)
+{
+ printk("======== SSR stop received ========\n");
+}
+EXPORT_SYMBOL_GPL(ipa_ssr_stop);
+
+void ipa_ssr_unprepare(struct rproc_subdev *subdev)
+{
+ printk("======== SSR unprepare received ========\n");
+}
+EXPORT_SYMBOL_GPL(ipa_ssr_unprepare);
+
+/**
+ * ipa_post_init() - Initialize the IPA Driver (Part II).
+ *
+ * Perform initialization that requires interaction with IPA hardware.
+ */
+static void ipa_post_init(void)
+{
+ int ret;
+
+ ipa_debug("ipa_post_init() started\n");
+
+ ret = gsi_device_init(ipa_ctx->gsi);
+ if (ret) {
+ ipa_err(":gsi register error - %d\n", ret);
+ return;
+ }
+
+ /* setup the AP-IPA endpoints */
+ if (ipa_ep_apps_setup()) {
+ ipa_err(":failed to setup IPA-Apps endpoints\n");
+ gsi_device_exit(ipa_ctx->gsi);
+
+ return;
+ }
+
+ ipa_ctx->uc_ctx = ipa_uc_init(ipa_ctx->ipa_phys);
+ if (!ipa_ctx->uc_ctx)
+ ipa_err("microcontroller init failed\n");
+
+ ipa_register_panic_hdlr();
+
+ ipa_ctx->modem_clk_vote_valid = true;
+
+ if (ipa_wwan_init())
+ ipa_err("WWAN init failed (ignoring)\n");
+
+ dev_info(ipa_ctx->dev, "IPA driver initialization was successful.\n");
+}
+
+/** ipa_pre_init() - Initialize the IPA Driver.
+ *
+ * Perform initialization which doesn't require access to IPA hardware.
+ */
+static int ipa_pre_init(void)
+{
+ int ret = 0;
+
+ /* enable IPA clocks explicitly to allow the initialization */
+ ipa_enable_clks();
+
+ ipa_init_hw();
+
+ ipa_ctx->ep_count = ipa_get_ep_count();
+ ipa_debug("ep_count %u\n", ipa_get_ep_count());
+ ipa_assert(ipa_ctx->ep_count <= IPA_EP_COUNT_MAX);
+
+ ipa_sram_settings_read();
+ if (ipa_ctx->smem_size < IPA_MEM_END_OFST) {
+ ipa_err("insufficient memory: %hu bytes available, need %u\n",
+ ipa_ctx->smem_size, IPA_MEM_END_OFST);
+ ret = -ENOMEM;
+ goto err_disable_clks;
+ }
+
+ mutex_init(&ipa_ctx->active_clients_mutex);
+ atomic_set(&ipa_ctx->active_clients_count, 1);
+
+ /* Create workqueues for power management */
+ ipa_ctx->power_mgmt_wq =
+ create_singlethread_workqueue("ipa_power_mgmt");
+ if (!ipa_ctx->power_mgmt_wq) {
+ ipa_err("failed to create power mgmt wq\n");
+ ret = -ENOMEM;
+ goto err_disable_clks;
+ }
+
+ mutex_init(&ipa_ctx->transport_pm.transport_pm_mutex);
+
+ /* init the lookaside cache */
+
+ ipa_ctx->dp = ipa_dp_init();
+ if (!ipa_ctx->dp)
+ goto err_destroy_pm_wq;
+
+ /* allocate memory for DMA_TASK workaround */
+ ret = ipa_gsi_dma_task_alloc();
+ if (ret)
+ goto err_dp_exit;
+
+ /* Create a wakeup source. */
+ wakeup_source_init(&ipa_ctx->wakeup, "IPA_WS");
+ spin_lock_init(&ipa_ctx->wakeup_lock);
+
+ /* Note enabling dynamic clock division must not be
+ * attempted for IPA hardware versions prior to 3.5.
+ */
+ ipa_enable_dcd();
+
+ /* Assign resource limitation to each group */
+ ipa_set_resource_groups_min_max_limits();
+
+ ret = ipa_init_interrupts();
+ if (!ret)
+ return 0; /* Success! */
+
+ ipa_err("ipa initialization of interrupts failed\n");
+err_dp_exit:
+ ipa_dp_exit(ipa_ctx->dp);
+ ipa_ctx->dp = NULL;
+err_destroy_pm_wq:
+ destroy_workqueue(ipa_ctx->power_mgmt_wq);
+err_disable_clks:
+ ipa_disable_clks();
+
+ return ret;
+}
+
+static int ipa_firmware_load(struct device *dev)
+{
+ const struct firmware *fw;
+ struct device_node *node;
+ struct resource res;
+ phys_addr_t phys;
+ ssize_t size;
+ void *virt;
+ int ret;
+
+ ret = request_firmware(&fw, IPA_FWS_PATH, dev);
+ if (ret)
+ return ret;
+
+ node = of_parse_phandle(dev->of_node, "memory-region", 0);
+ if (!node) {
+ dev_err(dev, "memory-region not specified\n");
+ ret = -EINVAL;
+ goto out_release_firmware;
+ }
+
+ ret = of_address_to_resource(node, 0, &res);
+ if (ret)
+ goto out_release_firmware;
+
+ phys = res.start,
+ size = (size_t)resource_size(&res);
+ virt = memremap(phys, size, MEMREMAP_WC);
+ if (!virt) {
+ ret = -ENOMEM;
+ goto out_release_firmware;
+ }
+
+ ret = qcom_mdt_load(dev, fw, IPA_FWS_PATH, IPA_PAS_ID,
+ virt, phys, size, NULL);
+ if (!ret)
+ ret = qcom_scm_pas_auth_and_reset(IPA_PAS_ID);
+
+ memunmap(virt);
+out_release_firmware:
+ release_firmware(fw);
+
+ return ret;
+}
+
+/* Threaded IRQ handler for modem "ipa-clock-query" SMP2P interrupt */
+static irqreturn_t ipa_smp2p_modem_clk_query_isr(int irq, void *ctxt)
+{
+ ipa_freeze_clock_vote_and_notify_modem();
+
+ return IRQ_HANDLED;
+}
+
+/* Threaded IRQ handler for modem "ipa-post-init" SMP2P interrupt */
+static irqreturn_t ipa_smp2p_modem_post_init_isr(int irq, void *ctxt)
+{
+ ipa_post_init();
+
+ return IRQ_HANDLED;
+}
+
+static int
+ipa_smp2p_irq_init(struct device *dev, const char *name, irq_handler_t handler)
+{
+ struct device_node *node = dev->of_node;
+ unsigned int irq;
+ int ret;
+
+ ret = of_irq_get_byname(node, name);
+ if (ret < 0)
+ return ret;
+ if (!ret)
+ return -EINVAL; /* IRQ mapping failure */
+ irq = ret;
+
+ ret = devm_request_threaded_irq(dev, irq, NULL, handler, 0, name, dev);
+ if (ret)
+ return ret;
+
+ return irq;
+}
+
+static void
+ipa_smp2p_irq_exit(struct device *dev, unsigned int irq)
+{
+ devm_free_irq(dev, irq, dev);
+}
+
+static int ipa_smp2p_init(struct device *dev, bool modem_init)
+{
+ struct qcom_smem_state *enabled_state;
+ struct qcom_smem_state *valid_state;
+ struct device_node *node;
+ unsigned int enabled_bit;
+ unsigned int valid_bit;
+ unsigned int clock_irq;
+ int ret;
+
+ node = dev->of_node;
+
+ valid_state = qcom_smem_state_get(dev, "ipa-clock-enabled-valid",
+ &valid_bit);
+ if (IS_ERR(valid_state))
+ return PTR_ERR(valid_state);
+
+ enabled_state = qcom_smem_state_get(dev, "ipa-clock-enabled",
+ &enabled_bit);
+ if (IS_ERR(enabled_state)) {
+ ret = PTR_ERR(enabled_state);
+ ipa_err("error %d getting ipa-clock-enabled state\n", ret);
+
+ return ret;
+ }
+
+ ret = ipa_smp2p_irq_init(dev, "ipa-clock-query",
+ ipa_smp2p_modem_clk_query_isr);
+ if (ret < 0)
+ return ret;
+ clock_irq = ret;
+
+ if (modem_init) {
+ /* Result will be non-zero (negative for error) */
+ ret = ipa_smp2p_irq_init(dev, "ipa-post-init",
+ ipa_smp2p_modem_post_init_isr);
+ if (ret < 0) {
+ ipa_smp2p_irq_exit(dev, clock_irq);
+
+ return ret;
+ }
+ }
+
+ /* Success. Record our smp2p information */
+ ipa_ctx->smp2p_info.valid_state = valid_state;
+ ipa_ctx->smp2p_info.valid_bit = valid_bit;
+ ipa_ctx->smp2p_info.enabled_state = enabled_state;
+ ipa_ctx->smp2p_info.enabled_bit = enabled_bit;
+ ipa_ctx->smp2p_info.clock_query_irq = clock_irq;
+ ipa_ctx->smp2p_info.post_init_irq = modem_init ? ret : 0;
+
+ return 0;
+}
+
+static void ipa_smp2p_exit(struct device *dev)
+{
+ if (ipa_ctx->smp2p_info.post_init_irq)
+ ipa_smp2p_irq_exit(dev, ipa_ctx->smp2p_info.post_init_irq);
+ ipa_smp2p_irq_exit(dev, ipa_ctx->smp2p_info.clock_query_irq);
+
+ memset(&ipa_ctx->smp2p_info, 0, sizeof(ipa_ctx->smp2p_info));
+}
+
+static const struct ipa_match_data tz_init = {
+ .init_type = ipa_tz_init,
+};
+
+static const struct ipa_match_data modem_init = {
+ .init_type = ipa_modem_init,
+};
+
+static const struct of_device_id ipa_plat_drv_match[] = {
+ {
+ .compatible = "qcom,ipa-sdm845-tz_init",
+ .data = &tz_init,
+ },
+ {
+ .compatible = "qcom,ipa-sdm845-modem_init",
+ .data = &modem_init,
+ },
+ {}
+};
+
+static int ipa_plat_drv_probe(struct platform_device *pdev)
+{
+ const struct ipa_match_data *match_data;
+ struct resource *res;
+ struct device *dev;
+ bool modem_init;
+ int ret;
+
+ /* We assume we're working on 64-bit hardware */
+ BUILD_BUG_ON(!IS_ENABLED(CONFIG_64BIT));
+
+ dev = &pdev->dev;
+
+ match_data = of_device_get_match_data(dev);
+ modem_init = match_data->init_type == ipa_modem_init;
+
+ /* If we need Trust Zone, make sure it's ready */
+ if (!modem_init)
+ if (!qcom_scm_is_available())
+ return -EPROBE_DEFER;
+
+ /* Initialize the smp2p driver early. It might not be ready
+ * when we're probed, so it might return -EPROBE_DEFER.
+ */
+ ret = ipa_smp2p_init(dev, modem_init);
+ if (ret)
+ return ret;
+
+ /* Initialize the interconnect driver early too. It might
+ * also return -EPROBE_DEFER.
+ */
+ ret = ipa_interconnect_init(dev);
+ if (ret)
+ goto out_smp2p_exit;
+
+ ret = ipa_clock_init(dev);
+ if (ret)
+ goto err_interconnect_exit;
+
+ ipa_ctx->dev = dev; /* Set early for ipa_err()/ipa_debug() */
+
+ /* Compute a bitmask representing which endpoints support filtering */
+ ipa_ctx->filter_bitmap = ipa_filter_bitmap_init();
+ ipa_debug("filter_bitmap 0x%08x\n", ipa_ctx->filter_bitmap);
+ if (!ipa_ctx->filter_bitmap)
+ goto err_clock_exit;
+
+ ret = platform_get_irq_byname(pdev, "ipa");
+ if (ret < 0)
+ goto err_clear_filter_bitmap;
+ ipa_ctx->ipa_irq = ret;
+
+ /* Get IPA memory range */
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ipa");
+ if (!res) {
+ ret = -ENODEV;
+ goto err_clear_ipa_irq;
+ }
+
+ /* Setup IPA register access */
+ ret = ipa_reg_init(res->start, (size_t)resource_size(res));
+ if (ret)
+ goto err_clear_ipa_irq;
+ ipa_ctx->ipa_phys = res->start;
+
+ ipa_ctx->gsi = gsi_init(pdev);
+ if (IS_ERR(ipa_ctx->gsi)) {
+ ret = PTR_ERR(ipa_ctx->gsi);
+ goto err_clear_gsi;
+ }
+
+ ret = ipa_dma_init(dev, IPA_HW_TBL_SYSADDR_ALIGN);
+ if (ret)
+ goto err_clear_gsi;
+
+ ret = ipahal_init();
+ if (ret)
+ goto err_dma_exit;
+
+ ipa_ctx->cmd_prod_ep_id = IPA_EP_ID_BAD;
+ ipa_ctx->lan_cons_ep_id = IPA_EP_ID_BAD;
+
+ /* Proceed to real initialization */
+ ret = ipa_pre_init();
+ if (ret)
+ goto err_clear_dev;
+
+ /* If the modem is not verifying and loading firmware we need to
+ * get it loaded ourselves. Only then can we proceed with the
+ * second stage of IPA initialization. If the modem is doing it,
+ * it will send an SMP2P interrupt to signal this has been done,
+ * and that will trigger the "post init".
+ */
+ if (!modem_init) {
+ ret = ipa_firmware_load(dev);
+ if (ret)
+ goto err_clear_dev;
+
+ /* Now we can proceed to stage two initialization */
+ ipa_post_init();
+ }
+
+ return 0; /* Success */
+
+err_clear_dev:
+ ipa_ctx->lan_cons_ep_id = 0;
+ ipa_ctx->cmd_prod_ep_id = 0;
+ ipahal_exit();
+err_dma_exit:
+ ipa_dma_exit();
+err_clear_gsi:
+ ipa_ctx->gsi = NULL;
+ ipa_ctx->ipa_phys = 0;
+ ipa_reg_exit();
+err_clear_ipa_irq:
+ ipa_ctx->ipa_irq = 0;
+err_clear_filter_bitmap:
+ ipa_ctx->filter_bitmap = 0;
+err_interconnect_exit:
+ ipa_interconnect_exit();
+err_clock_exit:
+ ipa_clock_exit();
+ ipa_ctx->dev = NULL;
+out_smp2p_exit:
+ ipa_smp2p_exit(dev);
+
+ return ret;
+}
+
+static int ipa_plat_drv_remove(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+
+ ipa_ctx->dev = NULL;
+ ipahal_exit();
+ ipa_dma_exit();
+ ipa_ctx->gsi = NULL; /* XXX ipa_gsi_exit() */
+ ipa_reg_exit();
+
+ ipa_ctx->ipa_phys = 0;
+
+ if (ipa_ctx->lan_cons_ep_id != IPA_EP_ID_BAD) {
+ ipa_ep_free(ipa_ctx->lan_cons_ep_id);
+ ipa_ctx->lan_cons_ep_id = IPA_EP_ID_BAD;
+ }
+ if (ipa_ctx->cmd_prod_ep_id != IPA_EP_ID_BAD) {
+ ipa_ep_free(ipa_ctx->cmd_prod_ep_id);
+ ipa_ctx->cmd_prod_ep_id = IPA_EP_ID_BAD;
+ }
+ ipa_ctx->ipa_irq = 0; /* XXX Need to de-initialize? */
+ ipa_ctx->filter_bitmap = 0;
+ ipa_interconnect_exit();
+ ipa_smp2p_exit(dev);
+
+ return 0;
+}
+
+/**
+ * ipa_ap_suspend() - suspend callback for runtime_pm
+ * @dev: IPA device structure
+ *
+ * This callback will be invoked by the runtime_pm framework when an AP suspend
+ * operation is invoked, usually by pressing a suspend button.
+ *
+ * Return: 0 if successful, -EAGAIN if IPA is in use
+ */
+int ipa_ap_suspend(struct device *dev)
+{
+ u32 i;
+
+ /* In case there is a tx/rx handler in polling mode fail to suspend */
+ for (i = 0; i < ipa_ctx->ep_count; i++) {
+ if (ipa_ctx->ep[i].sys && ipa_ep_polling(&ipa_ctx->ep[i])) {
+ ipa_err("EP %d is in polling state, do not suspend\n",
+ i);
+ return -EAGAIN;
+ }
+ }
+
+ return 0;
+}
+
+/**
+ * ipa_ap_resume() - resume callback for runtime_pm
+ * @dev: IPA device structure
+ *
+ * This callback will be invoked by the runtime_pm framework when an AP resume
+ * operation is invoked.
+ *
+ * Return: Zero
+ */
+int ipa_ap_resume(struct device *dev)
+{
+ return 0;
+}
+
+static const struct dev_pm_ops ipa_pm_ops = {
+ .suspend_noirq = ipa_ap_suspend,
+ .resume_noirq = ipa_ap_resume,
+};
+
+static struct platform_driver ipa_plat_drv = {
+ .probe = ipa_plat_drv_probe,
+ .remove = ipa_plat_drv_remove,
+ .driver = {
+ .name = "ipa",
+ .owner = THIS_MODULE,
+ .pm = &ipa_pm_ops,
+ .of_match_table = ipa_plat_drv_match,
+ },
+};
+
+builtin_platform_driver(ipa_plat_drv);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("IPA HW device driver");
--
2.17.1
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