* Re: [PATCH iproute2-next] Introduce ip-brctl shell script
From: Stefano Brivio @ 2019-02-06 10:55 UTC (permalink / raw)
To: Stephen Hemminger, David Ahern
Cc: Roopa Prabhu, Nikolay Aleksandrov, Phil Sutter, Eric Garver,
Tomas Dolezal, Lennert Buytenhek, netdev
In-Reply-To: <20190205145033.5d90dc42@hermes.lan>
On Tue, 5 Feb 2019 14:50:33 -0800
Stephen Hemminger <stephen@networkplumber.org> wrote:
> Providing brctl or ifconfig scripts is possible, but it really should
> be put in a sample or demo directory and not installed by default.
> It would just cause too much pain to distributions.
On one hand, I did it this way exactly to make it easy for
distributions (after all, I work for a distributor). The rationale is
that it's easier to get rid of things from package scripts rather than
add them. Also implementing a Debian package diversion looked more
elegant this way. No idea about other ones though.
On the other hand, I didn't even think of adding that to examples/.
Maybe that would alleviate David's concern about having to maintain it
forever (if it breaks temporarily, or if we need to remove it for some
reason, it's not a drama).
> I love concise human readable output and hate long winded VMS style
> commands.
That's exactly where I feel the current tools included in iproute2 fall
rather short. Compare "brctl show" to the closest equivalent "IFS='
'
for b in $(ip -br link show type bridge); do ip -br link show type
bridge_slave master ${b%% *}; done".
Sure, as Roopa said, we could and should improve 'bridge', and by now
I'm even almost convinced it's doable without breaking the existing
syntax, but it's not something we're doing overnight.
--
Stefano
^ permalink raw reply
* Re: [PATCH RFC RFT net-next 00/10] Modernize mv88e6060 and remove legacy probe
From: Gregory CLEMENT @ 2019-02-06 11:31 UTC (permalink / raw)
To: Andrew Lunn, netdev
Cc: Vivien Didelot, Florian Fainelli, Pavel Machek, Andrew Lunn
In-Reply-To: <20190130003758.23852-1-andrew@lunn.ch>
Hi Andrew,
On mer., janv. 30 2019, Andrew Lunn <andrew@lunn.ch> wrote:
> The mv88e6060 is the last device using the legacy method of probing an
> DSA Ethernet switch. This patchset applies some cleanups to the
> driver, and then adds support for probing the device as an MDIO bus
> device. The legacy probe is then removed from the driver, and then
> from DSA as a whole.
>
> This is compile tested only. Comment and testing welcome.
>
> It should not be merged yet, and one of the patches should go via
> arm-soc.
>
> Andrew Lunn (10):
> net: dsa: mv88e6xxx: Remove legacy probe support
> net: dsa: mv88e6060: Replace ds with priv
> net: dsa: mv88e6060: Replace REG_WRITE macro
> net: dsa: mv88e6060: Replace REG_READ macro
> net: dsa: mv88e6060: Support probing as an mdio device
> net: dsa: mv88e6060: Remove support for legacy probing
> net: dsa: mv88e6060: Add SPDX header
> net: dsa: Remove legacy probing support
> arch: arm: dts: Remove disabled marvell,dsa properties
> bt-bindings: net: DSA: Remove legacy binding
I saw there was some test already done on this series, but unless I am
wrong it was not applied yet.
Do you plan to send a new iteration soon?
I am asking because this week the dt part can be applied to be merged in
v5.1, whereas next week, it will be doable but as rc6 will be released
there will be less chance to be accepted.
Thanks,
Gregory
>
> .../devicetree/bindings/net/dsa/dsa.txt | 155 ----
> arch/arm/boot/dts/armada-370-rd.dts | 42 -
> arch/arm/boot/dts/armada-388-clearfog.dts | 58 --
> arch/arm/boot/dts/armada-xp-linksys-mamba.dts | 47 --
> arch/arm/boot/dts/kirkwood-dir665.dts | 47 --
> arch/arm/boot/dts/kirkwood-linksys-viper.dts | 47 --
> .../arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts | 47 --
> arch/arm/boot/dts/kirkwood-rd88f6281.dtsi | 41 -
> drivers/net/dsa/Kconfig | 2 +-
> drivers/net/dsa/mv88e6060.c | 217 ++---
> drivers/net/dsa/mv88e6060.h | 1 +
> drivers/net/dsa/mv88e6xxx/chip.c | 71 +-
> include/net/dsa.h | 23 -
> net/dsa/Kconfig | 9 -
> net/dsa/Makefile | 1 -
> net/dsa/dsa.c | 5 -
> net/dsa/dsa_priv.h | 12 -
> net/dsa/legacy.c | 745 ------------------
> 18 files changed, 121 insertions(+), 1449 deletions(-)
>
> --
> 2.20.1
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
^ permalink raw reply
* [PATCH net-next 0/6] Add comphy support for Armada 38x
From: Russell King - ARM Linux admin @ 2019-02-06 11:34 UTC (permalink / raw)
To: Andrew Lunn, Gregory Clement, Jason Cooper,
Kishon Vijay Abraham I, Sebastian Hesselbarth, Thomas Petazzoni
Cc: David S. Miller, devicetree, linux-arm-kernel, Mark Rutland,
netdev, Rob Herring
Hi,
This series adds support for the comphy for Armada 38x, which allows
these SoCs to use 2500BASE-X mode with appropriate SFP modules.
Tested on SolidRun Clearfog.
.../bindings/net/marvell-armada-370-neta.txt | 2 +-
.../bindings/phy/phy-armada38x-comphy.txt | 40 ++++
arch/arm/boot/dts/armada-388-clearfog.dtsi | 2 +
arch/arm/boot/dts/armada-38x.dtsi | 37 ++++
drivers/net/ethernet/marvell/mvneta.c | 57 ++++-
drivers/phy/marvell/Kconfig | 10 +
drivers/phy/marvell/Makefile | 1 +
drivers/phy/marvell/phy-armada38x-comphy.c | 232 +++++++++++++++++++++
8 files changed, 376 insertions(+), 5 deletions(-)
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line in suburbia: sync at 12.1Mbps down 622kbps up
According to speedtest.net: 11.9Mbps down 500kbps up
^ permalink raw reply
* [PATCH net-next 1/6] dt-bindings: phy: Armada 38x common phy bindings
From: Russell King @ 2019-02-06 11:34 UTC (permalink / raw)
To: Andrew Lunn, Gregory Clement, Jason Cooper,
Kishon Vijay Abraham I, Sebastian Hesselbarth, Thomas Petazzoni
Cc: devicetree, linux-arm-kernel, netdev, Rob Herring, Mark Rutland
In-Reply-To: <20190206113409.ko7lwuv5kb7l7rjo@shell.armlinux.org.uk>
Add the Marvell Armada 38x common phy bindings.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
.../bindings/phy/phy-armada38x-comphy.txt | 40 ++++++++++++++++++++++
1 file changed, 40 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/phy-armada38x-comphy.txt
diff --git a/Documentation/devicetree/bindings/phy/phy-armada38x-comphy.txt b/Documentation/devicetree/bindings/phy/phy-armada38x-comphy.txt
new file mode 100644
index 000000000000..ad49e5c01334
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/phy-armada38x-comphy.txt
@@ -0,0 +1,40 @@
+mvebu armada 38x comphy driver
+------------------------------
+
+This comphy controller can be found on Marvell Armada 38x. It provides a
+number of shared PHYs used by various interfaces (network, sata, usb,
+PCIe...).
+
+Required properties:
+
+- compatible: should be "marvell,armada-380-comphy"
+- reg: should contain the comphy register location and length.
+- #address-cells: should be 1.
+- #size-cells: should be 0.
+
+A sub-node is required for each comphy lane provided by the comphy.
+
+Required properties (child nodes):
+
+- reg: comphy lane number.
+- #phy-cells : from the generic phy bindings, must be 1. Defines the
+ input port to use for a given comphy lane.
+
+Example:
+
+ comphy: phy@18300 {
+ compatible = "marvell,armada-380-comphy";
+ reg = <0x18300 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpm_comphy0: phy@0 {
+ reg = <0>;
+ #phy-cells = <1>;
+ };
+
+ cpm_comphy1: phy@1 {
+ reg = <1>;
+ #phy-cells = <1>;
+ };
+ };
--
2.7.4
^ permalink raw reply related
* [PATCH net-next 2/6] phy: armada38x: add common phy support
From: Russell King @ 2019-02-06 11:34 UTC (permalink / raw)
To: Andrew Lunn, Gregory Clement, Jason Cooper,
Kishon Vijay Abraham I, Sebastian Hesselbarth, Thomas Petazzoni
Cc: devicetree, linux-arm-kernel, netdev
In-Reply-To: <20190206113409.ko7lwuv5kb7l7rjo@shell.armlinux.org.uk>
Add support for the Armada 38x common phy to allow us to change the
speed of the Ethernet serdes lane. This driver only supports
manipulation of the speed, it does not support configuration of the
common phy.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
drivers/phy/marvell/Kconfig | 10 ++
drivers/phy/marvell/Makefile | 1 +
drivers/phy/marvell/phy-armada38x-comphy.c | 232 +++++++++++++++++++++++++++++
3 files changed, 243 insertions(+)
create mode 100644 drivers/phy/marvell/phy-armada38x-comphy.c
diff --git a/drivers/phy/marvell/Kconfig b/drivers/phy/marvell/Kconfig
index 6fb4b56e4c14..224ea4e6a46d 100644
--- a/drivers/phy/marvell/Kconfig
+++ b/drivers/phy/marvell/Kconfig
@@ -21,6 +21,16 @@ config PHY_BERLIN_USB
help
Enable this to support the USB PHY on Marvell Berlin SoCs.
+config PHY_MVEBU_A38X_COMPHY
+ tristate "Marvell Armada 38x comphy driver"
+ depends on ARCH_MVEBU || COMPILE_TEST
+ depends on OF
+ select GENERIC_PHY
+ help
+ This driver allows to control the comphy, an hardware block providing
+ shared serdes PHYs on Marvell Armada 38x. Its serdes lanes can be
+ used by various controllers (Ethernet, sata, usb, PCIe...).
+
config PHY_MVEBU_CP110_COMPHY
tristate "Marvell CP110 comphy driver"
depends on ARCH_MVEBU || COMPILE_TEST
diff --git a/drivers/phy/marvell/Makefile b/drivers/phy/marvell/Makefile
index 3975b144f8ec..59b6c03ef756 100644
--- a/drivers/phy/marvell/Makefile
+++ b/drivers/phy/marvell/Makefile
@@ -2,6 +2,7 @@
obj-$(CONFIG_ARMADA375_USBCLUSTER_PHY) += phy-armada375-usb2.o
obj-$(CONFIG_PHY_BERLIN_SATA) += phy-berlin-sata.o
obj-$(CONFIG_PHY_BERLIN_USB) += phy-berlin-usb.o
+obj-$(CONFIG_PHY_MVEBU_A38X_COMPHY) += phy-armada38x-comphy.o
obj-$(CONFIG_PHY_MVEBU_CP110_COMPHY) += phy-mvebu-cp110-comphy.o
obj-$(CONFIG_PHY_MVEBU_SATA) += phy-mvebu-sata.o
obj-$(CONFIG_PHY_PXA_28NM_HSIC) += phy-pxa-28nm-hsic.o
diff --git a/drivers/phy/marvell/phy-armada38x-comphy.c b/drivers/phy/marvell/phy-armada38x-comphy.c
new file mode 100644
index 000000000000..f921ff448cfb
--- /dev/null
+++ b/drivers/phy/marvell/phy-armada38x-comphy.c
@@ -0,0 +1,232 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2018 Russell King, Deep Blue Solutions Ltd.
+ *
+ * Partly derived from CP110 comphy driver by Antoine Tenart
+ * <antoine.tenart@bootlin.com>
+ */
+#include <linux/delay.h>
+#include <linux/iopoll.h>
+#include <linux/module.h>
+#include <linux/phy/phy.h>
+#include <linux/platform_device.h>
+
+#define MAX_A38X_COMPHY 6
+#define MAX_A38X_PORTS 3
+
+#define COMPHY_CFG1 0x00
+#define COMPHY_CFG1_GEN_TX(x) ((x) << 26)
+#define COMPHY_CFG1_GEN_TX_MSK COMPHY_CFG1_GEN_TX(15)
+#define COMPHY_CFG1_GEN_RX(x) ((x) << 22)
+#define COMPHY_CFG1_GEN_RX_MSK COMPHY_CFG1_GEN_RX(15)
+#define GEN_SGMII_1_25GBPS 6
+#define GEN_SGMII_3_125GBPS 8
+
+#define COMPHY_STAT1 0x18
+#define COMPHY_STAT1_PLL_RDY_TX BIT(3)
+#define COMPHY_STAT1_PLL_RDY_RX BIT(2)
+
+#define COMPHY_SELECTOR 0xfc
+
+struct a38x_comphy;
+
+struct a38x_comphy_lane {
+ void __iomem *base;
+ struct a38x_comphy *priv;
+ unsigned int n;
+
+ int port;
+};
+
+struct a38x_comphy {
+ void __iomem *base;
+ struct device *dev;
+ struct a38x_comphy_lane lane[MAX_A38X_COMPHY];
+};
+
+static const u8 gbe_mux[MAX_A38X_COMPHY][MAX_A38X_PORTS] = {
+ { 0, 0, 0 },
+ { 4, 5, 0 },
+ { 0, 4, 0 },
+ { 0, 0, 4 },
+ { 0, 3, 0 },
+ { 0, 0, 3 },
+};
+
+static void a38x_comphy_set_reg(struct a38x_comphy_lane *lane,
+ unsigned int offset, u32 mask, u32 value)
+{
+ u32 val;
+
+ val = readl_relaxed(lane->base + offset) & ~mask;
+ writel(val | value, lane->base + offset);
+}
+
+static void a38x_comphy_set_speed(struct a38x_comphy_lane *lane,
+ unsigned int gen_tx, unsigned int gen_rx)
+{
+ a38x_comphy_set_reg(lane, COMPHY_CFG1,
+ COMPHY_CFG1_GEN_TX_MSK | COMPHY_CFG1_GEN_RX_MSK,
+ COMPHY_CFG1_GEN_TX(gen_tx) |
+ COMPHY_CFG1_GEN_RX(gen_rx));
+}
+
+static int a38x_comphy_poll(struct a38x_comphy_lane *lane,
+ unsigned int offset, u32 mask, u32 value)
+{
+ u32 val;
+ int ret;
+
+ ret = readl_relaxed_poll_timeout_atomic(lane->base + offset, val,
+ (val & mask) == value,
+ 10, 100);
+
+ if (ret)
+ dev_err(lane->priv->dev,
+ "comphy%u: timed out waiting for status\n", lane->n);
+
+ return ret;
+}
+
+/*
+ * We only support changing the speed for comphys configured for GBE.
+ * Since that is all we do, we only poll for PLL ready status.
+ */
+static int a38x_comphy_set_mode(struct phy *phy, enum phy_mode mode)
+{
+ struct a38x_comphy_lane *lane = phy_get_drvdata(phy);
+ unsigned int gen;
+
+ switch (mode) {
+ case PHY_MODE_SGMII:
+ gen = GEN_SGMII_1_25GBPS;
+ break;
+
+ case PHY_MODE_2500SGMII:
+ gen = GEN_SGMII_3_125GBPS;
+ break;
+
+ default:
+ return -EINVAL;
+ }
+
+ a38x_comphy_set_speed(lane, gen, gen);
+
+ return a38x_comphy_poll(lane, COMPHY_STAT1,
+ COMPHY_STAT1_PLL_RDY_TX |
+ COMPHY_STAT1_PLL_RDY_RX,
+ COMPHY_STAT1_PLL_RDY_TX |
+ COMPHY_STAT1_PLL_RDY_RX);
+}
+
+static const struct phy_ops a38x_comphy_ops = {
+ .set_mode = a38x_comphy_set_mode,
+ .owner = THIS_MODULE,
+};
+
+static struct phy *a38x_comphy_xlate(struct device *dev,
+ struct of_phandle_args *args)
+{
+ struct a38x_comphy_lane *lane;
+ struct phy *phy;
+ u32 val;
+
+ if (WARN_ON(args->args[0] >= MAX_A38X_PORTS))
+ return ERR_PTR(-EINVAL);
+
+ phy = of_phy_simple_xlate(dev, args);
+ if (IS_ERR(phy))
+ return phy;
+
+ lane = phy_get_drvdata(phy);
+ if (lane->port >= 0)
+ return ERR_PTR(-EBUSY);
+
+ lane->port = args->args[0];
+
+ val = readl_relaxed(lane->priv->base + COMPHY_SELECTOR);
+ val = (val >> (4 * lane->n)) & 0xf;
+
+ if (!gbe_mux[lane->n][lane->port] ||
+ val != gbe_mux[lane->n][lane->port]) {
+ dev_warn(lane->priv->dev,
+ "comphy%u: not configured for GBE\n", lane->n);
+ phy = ERR_PTR(-EINVAL);
+ }
+
+ return phy;
+}
+
+static int a38x_comphy_probe(struct platform_device *pdev)
+{
+ struct a38x_comphy *priv;
+ struct phy_provider *provider;
+ struct device_node *child;
+ struct resource *res;
+ void __iomem *base;
+
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(base))
+ return PTR_ERR(base);
+
+ priv->dev = &pdev->dev;
+ priv->base = base;
+
+ for_each_available_child_of_node(pdev->dev.of_node, child) {
+ struct phy *phy;
+ int ret;
+ u32 val;
+
+ ret = of_property_read_u32(child, "reg", &val);
+ if (ret < 0) {
+ dev_err(&pdev->dev, "missing 'reg' property (%d)\n",
+ ret);
+ continue;
+ }
+
+ if (val >= MAX_A38X_COMPHY || priv->lane[val].base) {
+ dev_err(&pdev->dev, "invalid 'reg' property\n");
+ continue;
+ }
+
+ phy = devm_phy_create(&pdev->dev, child, &a38x_comphy_ops);
+ if (IS_ERR(phy))
+ return PTR_ERR(phy);
+
+ priv->lane[val].base = base + 0x28 * val;
+ priv->lane[val].priv = priv;
+ priv->lane[val].n = val;
+ priv->lane[val].port = -1;
+ phy_set_drvdata(phy, &priv->lane[val]);
+ }
+
+ dev_set_drvdata(&pdev->dev, priv);
+
+ provider = devm_of_phy_provider_register(&pdev->dev, a38x_comphy_xlate);
+
+ return PTR_ERR_OR_ZERO(provider);
+}
+
+static const struct of_device_id a38x_comphy_of_match_table[] = {
+ { .compatible = "marvell,armada-380-comphy" },
+ { },
+};
+MODULE_DEVICE_TABLE(of, a38x_comphy_of_match_table);
+
+static struct platform_driver a38x_comphy_driver = {
+ .probe = a38x_comphy_probe,
+ .driver = {
+ .name = "armada-38x-comphy",
+ .of_match_table = a38x_comphy_of_match_table,
+ },
+};
+module_platform_driver(a38x_comphy_driver);
+
+MODULE_AUTHOR("Russell King <rmk+kernel@armlinux.org.uk>");
+MODULE_DESCRIPTION("Common PHY driver for Armada 38x SoCs");
+MODULE_LICENSE("GPL v2");
--
2.7.4
^ permalink raw reply related
* [PATCH net-next 3/6] ARM: dts: add description for Armada 38x common phy
From: Russell King @ 2019-02-06 11:34 UTC (permalink / raw)
To: Andrew Lunn, Gregory Clement, Jason Cooper,
Kishon Vijay Abraham I, Sebastian Hesselbarth, Thomas Petazzoni
Cc: devicetree, linux-arm-kernel, netdev, Rob Herring, Mark Rutland
In-Reply-To: <20190206113409.ko7lwuv5kb7l7rjo@shell.armlinux.org.uk>
Add the DT description for the Armada 38x common phy.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
arch/arm/boot/dts/armada-38x.dtsi | 37 +++++++++++++++++++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index 929459c42760..7b2e2bd6479b 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -335,6 +335,43 @@
#clock-cells = <1>;
};
+ comphy: phy@18300 {
+ compatible = "marvell,armada-380-comphy";
+ reg = <0x18300 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ comphy0: phy@0 {
+ reg = <0>;
+ #phy-cells = <1>;
+ };
+
+ comphy1: phy@1 {
+ reg = <1>;
+ #phy-cells = <1>;
+ };
+
+ comphy2: phy@2 {
+ reg = <2>;
+ #phy-cells = <1>;
+ };
+
+ comphy3: phy@3 {
+ reg = <3>;
+ #phy-cells = <1>;
+ };
+
+ comphy4: phy@4 {
+ reg = <4>;
+ #phy-cells = <1>;
+ };
+
+ comphy5: phy@5 {
+ reg = <5>;
+ #phy-cells = <1>;
+ };
+ };
+
coreclk: mvebu-sar@18600 {
compatible = "marvell,armada-380-core-clock";
reg = <0x18600 0x04>;
--
2.7.4
^ permalink raw reply related
* [PATCH net-next 4/6] dt-bindings: net: mvneta: add phys property
From: Russell King @ 2019-02-06 11:35 UTC (permalink / raw)
To: Andrew Lunn, Gregory Clement, Jason Cooper,
Kishon Vijay Abraham I, Sebastian Hesselbarth, Thomas Petazzoni
Cc: devicetree, linux-arm-kernel, netdev, David S. Miller,
Rob Herring, Mark Rutland
In-Reply-To: <20190206113409.ko7lwuv5kb7l7rjo@shell.armlinux.org.uk>
Add an optional phys property to the mvneta binding documentation for
the common phy.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
Documentation/devicetree/bindings/net/marvell-armada-370-neta.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/net/marvell-armada-370-neta.txt b/Documentation/devicetree/bindings/net/marvell-armada-370-neta.txt
index bedcfd5a52cd..691f886cfc4a 100644
--- a/Documentation/devicetree/bindings/net/marvell-armada-370-neta.txt
+++ b/Documentation/devicetree/bindings/net/marvell-armada-370-neta.txt
@@ -19,7 +19,7 @@
"marvell,armada-370-neta" and 9800B for others.
- clock-names: List of names corresponding to clocks property; shall be
"core" for core clock and "bus" for the optional bus clock.
-
+- phys: comphy for the ethernet port, see ../phy/phy-bindings.txt
Optional properties (valid only for Armada XP/38x):
--
2.7.4
^ permalink raw reply related
* [PATCH net-next 5/6] net: marvell: neta: add comphy support
From: Russell King @ 2019-02-06 11:35 UTC (permalink / raw)
To: Andrew Lunn, Gregory Clement, Jason Cooper,
Kishon Vijay Abraham I, Sebastian Hesselbarth, Thomas Petazzoni
Cc: devicetree, linux-arm-kernel, netdev, David S. Miller
In-Reply-To: <20190206113409.ko7lwuv5kb7l7rjo@shell.armlinux.org.uk>
Add support for the common phy binding, so that we can reconfigure the
comphy according to the desired ethernet speed. This will allow us to
support 1000base-X and 2500base-X SFPs dynamically on SolidRun Clearfog.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
drivers/net/ethernet/marvell/mvneta.c | 57 ++++++++++++++++++++++++++++++++---
1 file changed, 53 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvneta.c b/drivers/net/ethernet/marvell/mvneta.c
index 61b23497f836..86bdb0eb463a 100644
--- a/drivers/net/ethernet/marvell/mvneta.c
+++ b/drivers/net/ethernet/marvell/mvneta.c
@@ -27,6 +27,7 @@
#include <linux/of_irq.h>
#include <linux/of_mdio.h>
#include <linux/of_net.h>
+#include <linux/phy/phy.h>
#include <linux/phy.h>
#include <linux/phylink.h>
#include <linux/platform_device.h>
@@ -436,6 +437,7 @@ struct mvneta_port {
struct device_node *dn;
unsigned int tx_csum_limit;
struct phylink *phylink;
+ struct phy *comphy;
struct mvneta_bm *bm_priv;
struct mvneta_bm_pool *pool_long;
@@ -3151,6 +3153,8 @@ static void mvneta_start_dev(struct mvneta_port *pp)
{
int cpu;
+ WARN_ON(phy_power_on(pp->comphy));
+
mvneta_max_rx_size_set(pp, pp->pkt_size);
mvneta_txq_max_tx_size_set(pp, pp->pkt_size);
@@ -3213,6 +3217,8 @@ static void mvneta_stop_dev(struct mvneta_port *pp)
mvneta_tx_reset(pp);
mvneta_rx_reset(pp);
+
+ WARN_ON(phy_power_off(pp->comphy));
}
static void mvneta_percpu_enable(void *arg)
@@ -3338,6 +3344,7 @@ static int mvneta_set_mac_addr(struct net_device *dev, void *addr)
static void mvneta_validate(struct net_device *ndev, unsigned long *supported,
struct phylink_link_state *state)
{
+ struct mvneta_port *pp = netdev_priv(ndev);
__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
/* We only support QSGMII, SGMII, 802.3z and RGMII modes */
@@ -3358,8 +3365,13 @@ static void mvneta_validate(struct net_device *ndev, unsigned long *supported,
phylink_set(mask, Pause);
/* Half-duplex at speeds higher than 100Mbit is unsupported */
- phylink_set(mask, 1000baseT_Full);
- phylink_set(mask, 1000baseX_Full);
+ if (pp->comphy || state->interface != PHY_INTERFACE_MODE_2500BASEX) {
+ phylink_set(mask, 1000baseT_Full);
+ phylink_set(mask, 1000baseX_Full);
+ }
+ if (pp->comphy || state->interface == PHY_INTERFACE_MODE_2500BASEX) {
+ phylink_set(mask, 2500baseX_Full);
+ }
if (!phy_interface_mode_is_8023z(state->interface)) {
/* 10M and 100M are only supported in non-802.3z mode */
@@ -3373,6 +3385,11 @@ static void mvneta_validate(struct net_device *ndev, unsigned long *supported,
__ETHTOOL_LINK_MODE_MASK_NBITS);
bitmap_and(state->advertising, state->advertising, mask,
__ETHTOOL_LINK_MODE_MASK_NBITS);
+
+ /* We can only operate at 2500BaseX or 1000BaseX. If requested
+ * to advertise both, only report advertising at 2500BaseX.
+ */
+ phylink_helper_basex_speed(state);
}
static int mvneta_mac_link_state(struct net_device *ndev,
@@ -3384,7 +3401,9 @@ static int mvneta_mac_link_state(struct net_device *ndev,
gmac_stat = mvreg_read(pp, MVNETA_GMAC_STATUS);
if (gmac_stat & MVNETA_GMAC_SPEED_1000)
- state->speed = SPEED_1000;
+ state->speed =
+ state->interface == PHY_INTERFACE_MODE_2500BASEX ?
+ SPEED_2500 : SPEED_1000;
else if (gmac_stat & MVNETA_GMAC_SPEED_100)
state->speed = SPEED_100;
else
@@ -3499,12 +3518,32 @@ static void mvneta_mac_config(struct net_device *ndev, unsigned int mode,
MVNETA_GMAC_FORCE_LINK_DOWN);
}
+
/* When at 2.5G, the link partner can send frames with shortened
* preambles.
*/
if (state->speed == SPEED_2500)
new_ctrl4 |= MVNETA_GMAC4_SHORT_PREAMBLE_ENABLE;
+ if (pp->comphy) {
+ enum phy_mode mode = PHY_MODE_INVALID;
+
+ switch (state->interface) {
+ case PHY_INTERFACE_MODE_SGMII:
+ case PHY_INTERFACE_MODE_1000BASEX:
+ mode = PHY_MODE_SGMII;
+ break;
+ case PHY_INTERFACE_MODE_2500BASEX:
+ mode = PHY_MODE_2500SGMII;
+ break;
+ default:
+ break;
+ }
+
+ if (mode != PHY_MODE_INVALID)
+ WARN_ON(phy_set_mode(pp->comphy, mode));
+ }
+
if (new_ctrl0 != gmac_ctrl0)
mvreg_write(pp, MVNETA_GMAC_CTRL_0, new_ctrl0);
if (new_ctrl2 != gmac_ctrl2)
@@ -4405,7 +4444,7 @@ static int mvneta_port_power_up(struct mvneta_port *pp, int phy_mode)
if (phy_mode == PHY_INTERFACE_MODE_QSGMII)
mvreg_write(pp, MVNETA_SERDES_CFG, MVNETA_QSGMII_SERDES_PROTO);
else if (phy_mode == PHY_INTERFACE_MODE_SGMII ||
- phy_mode == PHY_INTERFACE_MODE_1000BASEX)
+ phy_interface_mode_is_8023z(phy_mode))
mvreg_write(pp, MVNETA_SERDES_CFG, MVNETA_SGMII_SERDES_PROTO);
else if (!phy_interface_mode_is_rgmii(phy_mode))
return -EINVAL;
@@ -4422,6 +4461,7 @@ static int mvneta_probe(struct platform_device *pdev)
struct mvneta_port *pp;
struct net_device *dev;
struct phylink *phylink;
+ struct phy *comphy;
const char *dt_mac_addr;
char hw_mac_addr[ETH_ALEN];
const char *mac_from;
@@ -4447,6 +4487,14 @@ static int mvneta_probe(struct platform_device *pdev)
goto err_free_irq;
}
+ comphy = devm_of_phy_get(&pdev->dev, dn, NULL);
+ if (comphy == ERR_PTR(-EPROBE_DEFER)) {
+ err = -EPROBE_DEFER;
+ goto err_free_irq;
+ } else if (IS_ERR(comphy)) {
+ comphy = NULL;
+ }
+
phylink = phylink_create(dev, pdev->dev.fwnode, phy_mode,
&mvneta_phylink_ops);
if (IS_ERR(phylink)) {
@@ -4463,6 +4511,7 @@ static int mvneta_probe(struct platform_device *pdev)
pp = netdev_priv(dev);
spin_lock_init(&pp->lock);
pp->phylink = phylink;
+ pp->comphy = comphy;
pp->phy_interface = phy_mode;
pp->dn = dn;
--
2.7.4
^ permalink raw reply related
* [PATCH net-next 6/6] ARM: dts: clearfog: add comphy settings for Ethernet interfaces
From: Russell King @ 2019-02-06 11:35 UTC (permalink / raw)
To: Andrew Lunn, Gregory Clement, Jason Cooper,
Kishon Vijay Abraham I, Sebastian Hesselbarth, Thomas Petazzoni
Cc: devicetree, linux-arm-kernel, netdev, Rob Herring, Mark Rutland
In-Reply-To: <20190206113409.ko7lwuv5kb7l7rjo@shell.armlinux.org.uk>
Add the comphy settings for the Ethernet interfaces.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
arch/arm/boot/dts/armada-388-clearfog.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/armada-388-clearfog.dtsi b/arch/arm/boot/dts/armada-388-clearfog.dtsi
index 1b0d0680c8b6..0d81600ca247 100644
--- a/arch/arm/boot/dts/armada-388-clearfog.dtsi
+++ b/arch/arm/boot/dts/armada-388-clearfog.dtsi
@@ -93,6 +93,7 @@
bm,pool-long = <2>;
bm,pool-short = <1>;
buffer-manager = <&bm>;
+ phys = <&comphy1 1>;
phy-mode = "sgmii";
status = "okay";
};
@@ -103,6 +104,7 @@
bm,pool-short = <1>;
buffer-manager = <&bm>;
managed = "in-band-status";
+ phys = <&comphy5 2>;
phy-mode = "sgmii";
sfp = <&sfp>;
status = "okay";
--
2.7.4
^ permalink raw reply related
* Re: [net-next, PATCH] net: stmmac: fix ptp timestamping on Rx on gmac4
From: Jose Abreu @ 2019-02-06 11:45 UTC (permalink / raw)
To: Ilias Apalodimas, alexandre.torgue
Cc: peppe.cavallaro, davem, mcoquelin.stm32, netdev, jose.abreu
In-Reply-To: <1549368920-1989-1-git-send-email-ilias.apalodimas@linaro.org>
On 2/5/2019 12:15 PM, Ilias Apalodimas wrote:
> The current driver only enables Pdelay_Req and Pdelay_Resp when
> HWTSTAMP_FILTER_PTP_V2_EVENT, HWTSTAMP_FILTER_PTP_V1_L4_EVENT or
> HWTSTAMP_FILTER_PTP_V2_L4_EVENT is requested. This results in ptp sync on
> slave mode to report 'received SYNC without timestamp' when using ptp4l.
>
> Although the hardware can support Sync, Pdelay_Req and Pdelay_resp by
> setting bit14 annd bits 17/16 to 01 this leaves Delay_Req timestamps out.
>
> Fix this by enabling all event and general messages timestamps.
> This includes SYNC, Follow_Up, Delay_Req, Delay_Resp, Pdelay_Req,
> Pdelay_Resp and Pdelay_Resp_Follow_Up messages.
>
> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Jose Abreu <joabreu@synopsys.com>
and, on XGMAC2: Tested-by: Jose Abreu <joabreu@synopsys.com>
Thanks,
Jose Miguel Abreu
^ permalink raw reply
* Re: [PATCH net-next v5 12/12] sock: Add SO_RCVTIMEO_NEW and SO_SNDTIMEO_NEW
From: Michael Ellerman @ 2019-02-06 11:56 UTC (permalink / raw)
To: Deepa Dinamani, davem, linux-kernel
Cc: netdev, arnd, y2038, ccaulfie, deller, paulus, ralf, rth,
cluster-devel, linuxppc-dev, linux-alpha, linux-arch, linux-mips,
linux-parisc, sparclinux
In-Reply-To: <20190202153454.7121-13-deepa.kernel@gmail.com>
Deepa Dinamani <deepa.kernel@gmail.com> writes:
> Add new socket timeout options that are y2038 safe.
>
> Signed-off-by: Deepa Dinamani <deepa.kernel@gmail.com>
> Acked-by: Willem de Bruijn <willemb@google.com>
> Cc: ccaulfie@redhat.com
> Cc: davem@davemloft.net
> Cc: deller@gmx.de
> Cc: paulus@samba.org
> Cc: ralf@linux-mips.org
> Cc: rth@twiddle.net
> Cc: cluster-devel@redhat.com
> Cc: linuxppc-dev@lists.ozlabs.org
> Cc: linux-alpha@vger.kernel.org
> Cc: linux-arch@vger.kernel.org
> Cc: linux-mips@vger.kernel.org
> Cc: linux-parisc@vger.kernel.org
> Cc: sparclinux@vger.kernel.org
> ---
> arch/alpha/include/uapi/asm/socket.h | 12 ++++--
> arch/mips/include/uapi/asm/socket.h | 11 +++++-
> arch/parisc/include/uapi/asm/socket.h | 10 ++++-
> arch/sparc/include/uapi/asm/socket.h | 11 +++++-
You touched powerpc in the previous patch but not this one.
That's because we use the asm-generic version I assume. Would be good to
mention in the change log though to avoid any confusion.
cheers
> include/uapi/asm-generic/socket.h | 11 +++++-
> net/core/sock.c | 53 ++++++++++++++++++++-------
> 6 files changed, 83 insertions(+), 25 deletions(-)
>
> diff --git a/arch/alpha/include/uapi/asm/socket.h b/arch/alpha/include/uapi/asm/socket.h
> index 9826d1db71d0..0d0fddb7e738 100644
> --- a/arch/alpha/include/uapi/asm/socket.h
> +++ b/arch/alpha/include/uapi/asm/socket.h
> @@ -119,19 +119,25 @@
> #define SO_TIMESTAMPNS_NEW 64
> #define SO_TIMESTAMPING_NEW 65
>
> -#if !defined(__KERNEL__)
> +#define SO_RCVTIMEO_NEW 66
> +#define SO_SNDTIMEO_NEW 67
>
> -#define SO_RCVTIMEO SO_RCVTIMEO_OLD
> -#define SO_SNDTIMEO SO_SNDTIMEO_OLD
> +#if !defined(__KERNEL__)
>
> #if __BITS_PER_LONG == 64
> #define SO_TIMESTAMP SO_TIMESTAMP_OLD
> #define SO_TIMESTAMPNS SO_TIMESTAMPNS_OLD
> #define SO_TIMESTAMPING SO_TIMESTAMPING_OLD
> +
> +#define SO_RCVTIMEO SO_RCVTIMEO_OLD
> +#define SO_SNDTIMEO SO_SNDTIMEO_OLD
> #else
> #define SO_TIMESTAMP (sizeof(time_t) == sizeof(__kernel_long_t) ? SO_TIMESTAMP_OLD : SO_TIMESTAMP_NEW)
> #define SO_TIMESTAMPNS (sizeof(time_t) == sizeof(__kernel_long_t) ? SO_TIMESTAMPNS_OLD : SO_TIMESTAMPNS_NEW)
> #define SO_TIMESTAMPING (sizeof(time_t) == sizeof(__kernel_long_t) ? SO_TIMESTAMPING_OLD : SO_TIMESTAMPING_NEW)
> +
> +#define SO_RCVTIMEO (sizeof(time_t) == sizeof(__kernel_long_t) ? SO_RCVTIMEO_OLD : SO_RCVTIMEO_NEW)
> +#define SO_SNDTIMEO (sizeof(time_t) == sizeof(__kernel_long_t) ? SO_SNDTIMEO_OLD : SO_SNDTIMEO_NEW)
> #endif
>
> #define SCM_TIMESTAMP SO_TIMESTAMP
> diff --git a/arch/mips/include/uapi/asm/socket.h b/arch/mips/include/uapi/asm/socket.h
> index 96cc0e907f12..eb9f33f8a8b3 100644
> --- a/arch/mips/include/uapi/asm/socket.h
> +++ b/arch/mips/include/uapi/asm/socket.h
> @@ -130,18 +130,25 @@
> #define SO_TIMESTAMPNS_NEW 64
> #define SO_TIMESTAMPING_NEW 65
>
> +#define SO_RCVTIMEO_NEW 66
> +#define SO_SNDTIMEO_NEW 67
> +
> #if !defined(__KERNEL__)
>
> -#define SO_RCVTIMEO SO_RCVTIMEO_OLD
> -#define SO_SNDTIMEO SO_SNDTIMEO_OLD
> #if __BITS_PER_LONG == 64
> #define SO_TIMESTAMP SO_TIMESTAMP_OLD
> #define SO_TIMESTAMPNS SO_TIMESTAMPNS_OLD
> #define SO_TIMESTAMPING SO_TIMESTAMPING_OLD
> +
> +#define SO_RCVTIMEO SO_RCVTIMEO_OLD
> +#define SO_SNDTIMEO SO_SNDTIMEO_OLD
> #else
> #define SO_TIMESTAMP (sizeof(time_t) == sizeof(__kernel_long_t) ? SO_TIMESTAMP_OLD : SO_TIMESTAMP_NEW)
> #define SO_TIMESTAMPNS (sizeof(time_t) == sizeof(__kernel_long_t) ? SO_TIMESTAMPNS_OLD : SO_TIMESTAMPNS_NEW)
> #define SO_TIMESTAMPING (sizeof(time_t) == sizeof(__kernel_long_t) ? SO_TIMESTAMPING_OLD : SO_TIMESTAMPING_NEW)
> +
> +#define SO_RCVTIMEO (sizeof(time_t) == sizeof(__kernel_long_t) ? SO_RCVTIMEO_OLD : SO_RCVTIMEO_NEW)
> +#define SO_SNDTIMEO (sizeof(time_t) == sizeof(__kernel_long_t) ? SO_SNDTIMEO_OLD : SO_SNDTIMEO_NEW)
> #endif
>
> #define SCM_TIMESTAMP SO_TIMESTAMP
> diff --git a/arch/parisc/include/uapi/asm/socket.h b/arch/parisc/include/uapi/asm/socket.h
> index 046f0cd9cce4..16e428f03526 100644
> --- a/arch/parisc/include/uapi/asm/socket.h
> +++ b/arch/parisc/include/uapi/asm/socket.h
> @@ -111,18 +111,24 @@
> #define SO_TIMESTAMPNS_NEW 0x4039
> #define SO_TIMESTAMPING_NEW 0x403A
>
> +#define SO_RCVTIMEO_NEW 0x4040
> +#define SO_SNDTIMEO_NEW 0x4041
> +
> #if !defined(__KERNEL__)
>
> -#define SO_RCVTIMEO SO_RCVTIMEO_OLD
> -#define SO_SNDTIMEO SO_SNDTIMEO_OLD
> #if __BITS_PER_LONG == 64
> #define SO_TIMESTAMP SO_TIMESTAMP_OLD
> #define SO_TIMESTAMPNS SO_TIMESTAMPNS_OLD
> #define SO_TIMESTAMPING SO_TIMESTAMPING_OLD
> +#define SO_RCVTIMEO SO_RCVTIMEO_OLD
> +#define SO_SNDTIMEO SO_SNDTIMEO_OLD
> #else
> #define SO_TIMESTAMP (sizeof(time_t) == sizeof(__kernel_long_t) ? SO_TIMESTAMP_OLD : SO_TIMESTAMP_NEW)
> #define SO_TIMESTAMPNS (sizeof(time_t) == sizeof(__kernel_long_t) ? SO_TIMESTAMPNS_OLD : SO_TIMESTAMPNS_NEW)
> #define SO_TIMESTAMPING (sizeof(time_t) == sizeof(__kernel_long_t) ? SO_TIMESTAMPING_OLD : SO_TIMESTAMPING_NEW)
> +
> +#define SO_RCVTIMEO (sizeof(time_t) == sizeof(__kernel_long_t) ? SO_RCVTIMEO_OLD : SO_RCVTIMEO_NEW)
> +#define SO_SNDTIMEO (sizeof(time_t) == sizeof(__kernel_long_t) ? SO_SNDTIMEO_OLD : SO_SNDTIMEO_NEW)
> #endif
>
> #define SCM_TIMESTAMP SO_TIMESTAMP
> diff --git a/arch/sparc/include/uapi/asm/socket.h b/arch/sparc/include/uapi/asm/socket.h
> index 342ffdc3b424..8c9f74a66b55 100644
> --- a/arch/sparc/include/uapi/asm/socket.h
> +++ b/arch/sparc/include/uapi/asm/socket.h
> @@ -112,19 +112,26 @@
> #define SO_TIMESTAMPNS_NEW 0x0042
> #define SO_TIMESTAMPING_NEW 0x0043
>
> +#define SO_RCVTIMEO_NEW 0x0044
> +#define SO_SNDTIMEO_NEW 0x0045
> +
> #if !defined(__KERNEL__)
>
> -#define SO_RCVTIMEO SO_RCVTIMEO_OLD
> -#define SO_SNDTIMEO SO_SNDTIMEO_OLD
>
> #if __BITS_PER_LONG == 64
> #define SO_TIMESTAMP SO_TIMESTAMP_OLD
> #define SO_TIMESTAMPNS SO_TIMESTAMPNS_OLD
> #define SO_TIMESTAMPING SO_TIMESTAMPING_OLD
> +
> +#define SO_RCVTIMEO SO_RCVTIMEO_OLD
> +#define SO_SNDTIMEO SO_SNDTIMEO_OLD
> #else
> #define SO_TIMESTAMP (sizeof(time_t) == sizeof(__kernel_long_t) ? SO_TIMESTAMP_OLD : SO_TIMESTAMP_NEW)
> #define SO_TIMESTAMPNS (sizeof(time_t) == sizeof(__kernel_long_t) ? SO_TIMESTAMPNS_OLD : SO_TIMESTAMPNS_NEW)
> #define SO_TIMESTAMPING (sizeof(time_t) == sizeof(__kernel_long_t) ? SO_TIMESTAMPING_OLD : SO_TIMESTAMPING_NEW)
> +
> +#define SO_RCVTIMEO (sizeof(time_t) == sizeof(__kernel_long_t) ? SO_RCVTIMEO_OLD : SO_RCVTIMEO_NEW)
> +#define SO_SNDTIMEO (sizeof(time_t) == sizeof(__kernel_long_t) ? SO_SNDTIMEO_OLD : SO_SNDTIMEO_NEW)
> #endif
>
> #define SCM_TIMESTAMP SO_TIMESTAMP
> diff --git a/include/uapi/asm-generic/socket.h b/include/uapi/asm-generic/socket.h
> index c56b8b487c12..c8b430cb6dc4 100644
> --- a/include/uapi/asm-generic/socket.h
> +++ b/include/uapi/asm-generic/socket.h
> @@ -114,19 +114,26 @@
> #define SO_TIMESTAMPNS_NEW 64
> #define SO_TIMESTAMPING_NEW 65
>
> +#define SO_RCVTIMEO_NEW 66
> +#define SO_SNDTIMEO_NEW 67
> +
> #if !defined(__KERNEL__)
>
> -#define SO_RCVTIMEO SO_RCVTIMEO_OLD
> -#define SO_SNDTIMEO SO_SNDTIMEO_OLD
> #if __BITS_PER_LONG == 64 || (defined(__x86_64__) && defined(__ILP32__))
> /* on 64-bit and x32, avoid the ?: operator */
> #define SO_TIMESTAMP SO_TIMESTAMP_OLD
> #define SO_TIMESTAMPNS SO_TIMESTAMPNS_OLD
> #define SO_TIMESTAMPING SO_TIMESTAMPING_OLD
> +
> +#define SO_RCVTIMEO SO_RCVTIMEO_OLD
> +#define SO_SNDTIMEO SO_SNDTIMEO_OLD
> #else
> #define SO_TIMESTAMP (sizeof(time_t) == sizeof(__kernel_long_t) ? SO_TIMESTAMP_OLD : SO_TIMESTAMP_NEW)
> #define SO_TIMESTAMPNS (sizeof(time_t) == sizeof(__kernel_long_t) ? SO_TIMESTAMPNS_OLD : SO_TIMESTAMPNS_NEW)
> #define SO_TIMESTAMPING (sizeof(time_t) == sizeof(__kernel_long_t) ? SO_TIMESTAMPING_OLD : SO_TIMESTAMPING_NEW)
> +
> +#define SO_RCVTIMEO (sizeof(time_t) == sizeof(__kernel_long_t) ? SO_RCVTIMEO_OLD : SO_RCVTIMEO_NEW)
> +#define SO_SNDTIMEO (sizeof(time_t) == sizeof(__kernel_long_t) ? SO_SNDTIMEO_OLD : SO_SNDTIMEO_NEW)
> #endif
>
> #define SCM_TIMESTAMP SO_TIMESTAMP
> diff --git a/net/core/sock.c b/net/core/sock.c
> index 27b40002b780..a8904ae40713 100644
> --- a/net/core/sock.c
> +++ b/net/core/sock.c
> @@ -335,9 +335,10 @@ int __sk_backlog_rcv(struct sock *sk, struct sk_buff *skb)
> }
> EXPORT_SYMBOL(__sk_backlog_rcv);
>
> -static int sock_get_timeout(long timeo, void *optval)
> +static int sock_get_timeout(long timeo, void *optval, bool old_timeval)
> {
> - struct __kernel_old_timeval tv;
> + struct __kernel_sock_timeval tv;
> + int size;
>
> if (timeo == MAX_SCHEDULE_TIMEOUT) {
> tv.tv_sec = 0;
> @@ -353,13 +354,23 @@ static int sock_get_timeout(long timeo, void *optval)
> return sizeof(tv32);
> }
>
> - *(struct __kernel_old_timeval *)optval = tv;
> - return sizeof(tv);
> + if (old_timeval) {
> + struct __kernel_old_timeval old_tv;
> + old_tv.tv_sec = tv.tv_sec;
> + old_tv.tv_usec = tv.tv_usec;
> + *(struct __kernel_old_timeval *)optval = old_tv;
> + size = sizeof(old_tv);
> + } else {
> + *(struct __kernel_sock_timeval *)optval = tv;
> + size = sizeof(tv);
> + }
> +
> + return size;
> }
>
> -static int sock_set_timeout(long *timeo_p, char __user *optval, int optlen)
> +static int sock_set_timeout(long *timeo_p, char __user *optval, int optlen, bool old_timeval)
> {
> - struct __kernel_old_timeval tv;
> + struct __kernel_sock_timeval tv;
>
> if (in_compat_syscall() && !COMPAT_USE_64BIT_TIME) {
> struct old_timeval32 tv32;
> @@ -371,6 +382,15 @@ static int sock_set_timeout(long *timeo_p, char __user *optval, int optlen)
> return -EFAULT;
> tv.tv_sec = tv32.tv_sec;
> tv.tv_usec = tv32.tv_usec;
> + } else if (old_timeval) {
> + struct __kernel_old_timeval old_tv;
> +
> + if (optlen < sizeof(old_tv))
> + return -EINVAL;
> + if (copy_from_user(&old_tv, optval, sizeof(old_tv)))
> + return -EFAULT;
> + tv.tv_sec = old_tv.tv_sec;
> + tv.tv_usec = old_tv.tv_usec;
> } else {
> if (optlen < sizeof(tv))
> return -EINVAL;
> @@ -394,8 +414,8 @@ static int sock_set_timeout(long *timeo_p, char __user *optval, int optlen)
> *timeo_p = MAX_SCHEDULE_TIMEOUT;
> if (tv.tv_sec == 0 && tv.tv_usec == 0)
> return 0;
> - if (tv.tv_sec < (MAX_SCHEDULE_TIMEOUT/HZ - 1))
> - *timeo_p = tv.tv_sec * HZ + DIV_ROUND_UP(tv.tv_usec, USEC_PER_SEC / HZ);
> + if (tv.tv_sec < (MAX_SCHEDULE_TIMEOUT / HZ - 1))
> + *timeo_p = tv.tv_sec * HZ + DIV_ROUND_UP((unsigned long)tv.tv_usec, USEC_PER_SEC / HZ);
> return 0;
> }
>
> @@ -942,11 +962,13 @@ int sock_setsockopt(struct socket *sock, int level, int optname,
> break;
>
> case SO_RCVTIMEO_OLD:
> - ret = sock_set_timeout(&sk->sk_rcvtimeo, optval, optlen);
> + case SO_RCVTIMEO_NEW:
> + ret = sock_set_timeout(&sk->sk_rcvtimeo, optval, optlen, optname == SO_RCVTIMEO_OLD);
> break;
>
> case SO_SNDTIMEO_OLD:
> - ret = sock_set_timeout(&sk->sk_sndtimeo, optval, optlen);
> + case SO_SNDTIMEO_NEW:
> + ret = sock_set_timeout(&sk->sk_sndtimeo, optval, optlen, optname == SO_SNDTIMEO_OLD);
> break;
>
> case SO_ATTACH_FILTER:
> @@ -1171,6 +1193,7 @@ int sock_getsockopt(struct socket *sock, int level, int optname,
> struct linger ling;
> struct old_timeval32 tm32;
> struct __kernel_old_timeval tm;
> + struct __kernel_sock_timeval stm;
> struct sock_txtime txtime;
> } v;
>
> @@ -1279,12 +1302,14 @@ int sock_getsockopt(struct socket *sock, int level, int optname,
> v.val = sk->sk_tsflags;
> break;
>
> - case SO_RCVTIMEO:
> - lv = sock_get_timeout(sk->sk_rcvtimeo, &v);
> + case SO_RCVTIMEO_OLD:
> + case SO_RCVTIMEO_NEW:
> + lv = sock_get_timeout(sk->sk_rcvtimeo, &v, SO_RCVTIMEO_OLD == optname);
> break;
>
> - case SO_SNDTIMEO:
> - lv = sock_get_timeout(sk->sk_sndtimeo, &v);
> + case SO_SNDTIMEO_OLD:
> + case SO_SNDTIMEO_NEW:
> + lv = sock_get_timeout(sk->sk_sndtimeo, &v, SO_SNDTIMEO_OLD == optname);
> break;
>
> case SO_RCVLOWAT:
> --
> 2.17.1
^ permalink raw reply
* Re: [PATCH net-next v5 11/12] socket: Rename SO_RCVTIMEO/ SO_SNDTIMEO with _OLD suffixes
From: Michael Ellerman @ 2019-02-06 11:58 UTC (permalink / raw)
To: Deepa Dinamani, davem, linux-kernel
Cc: netdev, arnd, y2038, ccaulfie, deller, paulus, ralf, rth,
cluster-devel, linuxppc-dev, linux-alpha, linux-arch, linux-mips,
linux-parisc, sparclinux
In-Reply-To: <20190202153454.7121-12-deepa.kernel@gmail.com>
Deepa Dinamani <deepa.kernel@gmail.com> writes:
> SO_RCVTIMEO and SO_SNDTIMEO socket options use struct timeval
> as the time format. struct timeval is not y2038 safe.
> The subsequent patches in the series add support for new socket
> timeout options with _NEW suffix that will use y2038 safe
> data structures. Although the existing struct timeval layout
> is sufficiently wide to represent timeouts, because of the way
> libc will interpret time_t based on user defined flag, these
> new flags provide a way of having a structure that is the same
> for all architectures consistently.
> Rename the existing options with _OLD suffix forms so that the
> right option is enabled for userspace applications according
> to the architecture and time_t definition of libc.
>
> Signed-off-by: Deepa Dinamani <deepa.kernel@gmail.com>
> Acked-by: Willem de Bruijn <willemb@google.com>
> Cc: ccaulfie@redhat.com
> Cc: deller@gmx.de
> Cc: paulus@samba.org
> Cc: ralf@linux-mips.org
> Cc: rth@twiddle.net
> Cc: cluster-devel@redhat.com
> Cc: linuxppc-dev@lists.ozlabs.org
> Cc: linux-alpha@vger.kernel.org
> Cc: linux-arch@vger.kernel.org
> Cc: linux-mips@vger.kernel.org
> Cc: linux-parisc@vger.kernel.org
> Cc: sparclinux@vger.kernel.org
> ---
> arch/alpha/include/uapi/asm/socket.h | 7 +++++--
> arch/mips/include/uapi/asm/socket.h | 6 ++++--
> arch/parisc/include/uapi/asm/socket.h | 6 ++++--
> arch/powerpc/include/uapi/asm/socket.h | 4 ++--
The powerpc changes look OK to me.
Acked-by: Michael Ellerman <mpe@ellerman.id.au> (powerpc)
cheers
> diff --git a/arch/powerpc/include/uapi/asm/socket.h b/arch/powerpc/include/uapi/asm/socket.h
> index 94de465e0920..12aa0c43e775 100644
> --- a/arch/powerpc/include/uapi/asm/socket.h
> +++ b/arch/powerpc/include/uapi/asm/socket.h
> @@ -11,8 +11,8 @@
>
> #define SO_RCVLOWAT 16
> #define SO_SNDLOWAT 17
> -#define SO_RCVTIMEO 18
> -#define SO_SNDTIMEO 19
> +#define SO_RCVTIMEO_OLD 18
> +#define SO_SNDTIMEO_OLD 19
> #define SO_PASSCRED 20
> #define SO_PEERCRED 21
>
> diff --git a/include/uapi/asm-generic/socket.h b/include/uapi/asm-generic/socket.h
> index 2713e0fa68ef..c56b8b487c12 100644
> --- a/include/uapi/asm-generic/socket.h
> +++ b/include/uapi/asm-generic/socket.h
> @@ -30,8 +30,8 @@
> #define SO_PEERCRED 17
> #define SO_RCVLOWAT 18
> #define SO_SNDLOWAT 19
> -#define SO_RCVTIMEO 20
> -#define SO_SNDTIMEO 21
> +#define SO_RCVTIMEO_OLD 20
> +#define SO_SNDTIMEO_OLD 21
> #endif
>
> /* Security levels - as per NRL IPv6 - don't actually do anything */
> @@ -116,6 +116,8 @@
>
> #if !defined(__KERNEL__)
>
> +#define SO_RCVTIMEO SO_RCVTIMEO_OLD
> +#define SO_SNDTIMEO SO_SNDTIMEO_OLD
> #if __BITS_PER_LONG == 64 || (defined(__x86_64__) && defined(__ILP32__))
> /* on 64-bit and x32, avoid the ?: operator */
> #define SO_TIMESTAMP SO_TIMESTAMP_OLD
^ permalink raw reply
* Re: [Patch net-next] mlx5: use RCU lock in mlx5_eq_cq_get()
From: Tariq Toukan @ 2019-02-06 12:02 UTC (permalink / raw)
To: Cong Wang, netdev@vger.kernel.org; +Cc: Saeed Mahameed
In-Reply-To: <20190206003525.5041-1-xiyou.wangcong@gmail.com>
On 2/6/2019 2:35 AM, Cong Wang wrote:
> mlx5_eq_cq_get() is called in IRQ handler, the spinlock inside
> gets a lot of contentions when we test some heavy workload
> with 60 RX queues and 80 CPU's, and it is clearly shown in the
> flame graph.
>
> In fact, radix_tree_lookup() is perfectly fine with RCU read lock,
> we don't have to take a spinlock on this hot path. It is pretty much
> similar to commit 291c566a2891
> ("net/mlx4_core: Fix racy CQ (Completion Queue) free"). Slow paths
> are still serialized with the spinlock, and with synchronize_irq()
> it should be safe to just move the fast path to RCU read lock.
>
> This patch itself reduces the latency by about 50% with our workload.
>
> Cc: Saeed Mahameed <saeedm@mellanox.com>
> Cc: Tariq Toukan <tariqt@mellanox.com>
> Signed-off-by: Cong Wang <xiyou.wangcong@gmail.com>
> ---
> drivers/net/ethernet/mellanox/mlx5/core/eq.c | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eq.c b/drivers/net/ethernet/mellanox/mlx5/core/eq.c
> index ee04aab65a9f..7092457705a2 100644
> --- a/drivers/net/ethernet/mellanox/mlx5/core/eq.c
> +++ b/drivers/net/ethernet/mellanox/mlx5/core/eq.c
> @@ -114,11 +114,11 @@ static struct mlx5_core_cq *mlx5_eq_cq_get(struct mlx5_eq *eq, u32 cqn)
> struct mlx5_cq_table *table = &eq->cq_table;
> struct mlx5_core_cq *cq = NULL;
>
> - spin_lock(&table->lock);
> + rcu_read_lock();
> cq = radix_tree_lookup(&table->tree, cqn);
> if (likely(cq))
> mlx5_cq_hold(cq);
> - spin_unlock(&table->lock);
> + rcu_read_unlock();
Thanks for you patch.
I think we can improve it further, by taking the if statement out of the
critical section.
Other than that, patch LGTM.
Regards,
Tariq
>
> return cq;
> }
> @@ -371,9 +371,9 @@ int mlx5_eq_add_cq(struct mlx5_eq *eq, struct mlx5_core_cq *cq)
> struct mlx5_cq_table *table = &eq->cq_table;
> int err;
>
> - spin_lock_irq(&table->lock);
> + spin_lock(&table->lock);
> err = radix_tree_insert(&table->tree, cq->cqn, cq);
> - spin_unlock_irq(&table->lock);
> + spin_unlock(&table->lock);
>
> return err;
> }
> @@ -383,9 +383,9 @@ int mlx5_eq_del_cq(struct mlx5_eq *eq, struct mlx5_core_cq *cq)
> struct mlx5_cq_table *table = &eq->cq_table;
> struct mlx5_core_cq *tmp;
>
> - spin_lock_irq(&table->lock);
> + spin_lock(&table->lock);
> tmp = radix_tree_delete(&table->tree, cq->cqn);
> - spin_unlock_irq(&table->lock);
> + spin_unlock(&table->lock);
>
> if (!tmp) {
> mlx5_core_warn(eq->dev, "cq 0x%x not found in eq 0x%x tree\n", eq->eqn, cq->cqn);
>
^ permalink raw reply
* [PATCH v3 2/2] r8169: Avoid pointer aliasing
From: Thierry Reding @ 2019-02-06 12:30 UTC (permalink / raw)
To: David S. Miller
Cc: Heiner Kallweit, Andrew Lunn, Joe Perches, Eric Dumazet,
Paul Zimmerman, Michal Kubecek, Realtek linux nic maintainers,
netdev, linux-kernel
In-Reply-To: <20190206123018.24802-1-thierry.reding@gmail.com>
From: Thierry Reding <treding@nvidia.com>
Read MAC address 32-bit at a time and manually extract the individual
bytes. This avoids pointer aliasing and gives the compiler a better
chance of optimizing the operation.
Suggested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
Applies to net-next.
I tested this on a Jetson TX2 with an add-in Realtek ethernet card that
has a properly programmed OTP to verify that I got the endianess right.
Seems like everything works and the device behaves the same with or
without this patch.
Changes in v3:
- align MAC address to u16 for is_valid_ether_addr()
drivers/net/ethernet/realtek/r8169.c | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index 501891be7c56..1dd72137fd53 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -7113,12 +7113,21 @@ static int rtl_alloc_irq(struct rtl8169_private *tp)
static void rtl_read_mac_address(struct rtl8169_private *tp,
u8 mac_addr[ETH_ALEN])
{
+ u32 value;
+
/* Get MAC address */
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_35 ... RTL_GIGA_MAC_VER_38:
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_51:
- *(u32 *)&mac_addr[0] = rtl_eri_read(tp, 0xe0, ERIAR_EXGMAC);
- *(u16 *)&mac_addr[4] = rtl_eri_read(tp, 0xe4, ERIAR_EXGMAC);
+ value = rtl_eri_read(tp, 0xe0, ERIAR_EXGMAC);
+ mac_addr[0] = (value >> 0) & 0xff;
+ mac_addr[1] = (value >> 8) & 0xff;
+ mac_addr[2] = (value >> 16) & 0xff;
+ mac_addr[3] = (value >> 24) & 0xff;
+
+ value = rtl_eri_read(tp, 0xe4, ERIAR_EXGMAC);
+ mac_addr[4] = (value >> 0) & 0xff;
+ mac_addr[5] = (value >> 8) & 0xff;
break;
default:
break;
@@ -7316,7 +7325,8 @@ static int rtl_get_ether_clk(struct rtl8169_private *tp)
static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{
const struct rtl_cfg_info *cfg = rtl_cfg_infos + ent->driver_data;
- u8 mac_addr[ETH_ALEN] __aligned(4) = {};
+ /* align to u16 for is_valid_ether_addr() */
+ u8 mac_addr[ETH_ALEN] __aligned(2) = {};
struct rtl8169_private *tp;
struct net_device *dev;
int chipset, region, i;
--
2.19.1
^ permalink raw reply related
* [PATCH v3 1/2] r8169: Load MAC address from device tree if present
From: Thierry Reding @ 2019-02-06 12:30 UTC (permalink / raw)
To: David S. Miller
Cc: Heiner Kallweit, Andrew Lunn, Joe Perches, Eric Dumazet,
Paul Zimmerman, Michal Kubecek, Realtek linux nic maintainers,
netdev, linux-kernel
From: Thierry Reding <treding@nvidia.com>
If the system was booted using a device tree and if the device tree
contains a MAC address, use it instead of reading one from the EEPROM.
This is useful in situations where the EEPROM isn't properly programmed
or where the firmware wants to override the existing MAC address.
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
Applies on net-next.
Changes in v2:
- rewrite error check for readability
- initialize mac_addr array
drivers/net/ethernet/realtek/r8169.c | 36 ++++++++++++++++++----------
1 file changed, 23 insertions(+), 13 deletions(-)
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index e8a112149a62..501891be7c56 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -7110,6 +7110,21 @@ static int rtl_alloc_irq(struct rtl8169_private *tp)
return pci_alloc_irq_vectors(tp->pci_dev, 1, 1, flags);
}
+static void rtl_read_mac_address(struct rtl8169_private *tp,
+ u8 mac_addr[ETH_ALEN])
+{
+ /* Get MAC address */
+ switch (tp->mac_version) {
+ case RTL_GIGA_MAC_VER_35 ... RTL_GIGA_MAC_VER_38:
+ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_51:
+ *(u32 *)&mac_addr[0] = rtl_eri_read(tp, 0xe0, ERIAR_EXGMAC);
+ *(u16 *)&mac_addr[4] = rtl_eri_read(tp, 0xe4, ERIAR_EXGMAC);
+ break;
+ default:
+ break;
+ }
+}
+
DECLARE_RTL_COND(rtl_link_list_ready_cond)
{
return RTL_R8(tp, MCU) & LINK_LIST_RDY;
@@ -7301,6 +7316,7 @@ static int rtl_get_ether_clk(struct rtl8169_private *tp)
static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{
const struct rtl_cfg_info *cfg = rtl_cfg_infos + ent->driver_data;
+ u8 mac_addr[ETH_ALEN] __aligned(4) = {};
struct rtl8169_private *tp;
struct net_device *dev;
int chipset, region, i;
@@ -7403,20 +7419,14 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
u64_stats_init(&tp->rx_stats.syncp);
u64_stats_init(&tp->tx_stats.syncp);
- /* Get MAC address */
- switch (tp->mac_version) {
- u8 mac_addr[ETH_ALEN] __aligned(4);
- case RTL_GIGA_MAC_VER_35 ... RTL_GIGA_MAC_VER_38:
- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_51:
- *(u32 *)&mac_addr[0] = rtl_eri_read(tp, 0xe0, ERIAR_EXGMAC);
- *(u16 *)&mac_addr[4] = rtl_eri_read(tp, 0xe4, ERIAR_EXGMAC);
+ /* get MAC address */
+ rc = eth_platform_get_mac_address(&pdev->dev, mac_addr);
+ if (rc)
+ rtl_read_mac_address(tp, mac_addr);
+
+ if (is_valid_ether_addr(mac_addr))
+ rtl_rar_set(tp, mac_addr);
- if (is_valid_ether_addr(mac_addr))
- rtl_rar_set(tp, mac_addr);
- break;
- default:
- break;
- }
for (i = 0; i < ETH_ALEN; i++)
dev->dev_addr[i] = RTL_R8(tp, MAC0 + i);
--
2.19.1
^ permalink raw reply related
* Re: [PATCH v3 1/2] r8169: Load MAC address from device tree if present
From: Thierry Reding @ 2019-02-06 12:33 UTC (permalink / raw)
To: David S. Miller
Cc: Heiner Kallweit, Andrew Lunn, Joe Perches, Eric Dumazet,
Paul Zimmerman, Michal Kubecek, Realtek linux nic maintainers,
netdev, linux-kernel
In-Reply-To: <20190206123018.24802-1-thierry.reding@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 920 bytes --]
On Wed, Feb 06, 2019 at 01:30:17PM +0100, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> If the system was booted using a device tree and if the device tree
> contains a MAC address, use it instead of reading one from the EEPROM.
> This is useful in situations where the EEPROM isn't properly programmed
> or where the firmware wants to override the existing MAC address.
>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> Applies on net-next.
>
> Changes in v2:
> - rewrite error check for readability
> - initialize mac_addr array
>
> drivers/net/ethernet/realtek/r8169.c | 36 ++++++++++++++++++----------
> 1 file changed, 23 insertions(+), 13 deletions(-)
Sorry, I forgot to include Heiner's Reviewed-by tag here, but with any
luck patchwork will pick it up if I do this:
This patch previously:
Reviewed-by: Heiner Kallweit <hkallweit1@gmail.com>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply
* Re: [PATCH v3 2/2] r8169: Avoid pointer aliasing
From: Thierry Reding @ 2019-02-06 12:35 UTC (permalink / raw)
To: David S. Miller
Cc: Heiner Kallweit, Andrew Lunn, Joe Perches, Eric Dumazet,
Paul Zimmerman, Michal Kubecek, Realtek linux nic maintainers,
netdev, linux-kernel
In-Reply-To: <20190206123018.24802-2-thierry.reding@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 1047 bytes --]
On Wed, Feb 06, 2019 at 01:30:18PM +0100, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> Read MAC address 32-bit at a time and manually extract the individual
> bytes. This avoids pointer aliasing and gives the compiler a better
> chance of optimizing the operation.
>
> Suggested-by: Andrew Lunn <andrew@lunn.ch>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> Applies to net-next.
>
> I tested this on a Jetson TX2 with an add-in Realtek ethernet card that
> has a properly programmed OTP to verify that I got the endianess right.
> Seems like everything works and the device behaves the same with or
> without this patch.
>
> Changes in v3:
> - align MAC address to u16 for is_valid_ether_addr()
>
> drivers/net/ethernet/realtek/r8169.c | 16 +++++++++++++---
> 1 file changed, 13 insertions(+), 3 deletions(-)
I also forgot Andrew's Reviewed-by here, but technically the patch has
changed, so I'll leave it up to him to confirm he's still okay with this
version.
Thierry
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply
* Re: [PATCH v2 3/6] ethtool: introduce new ioctl for per-queue settings
From: Michal Kubecek @ 2019-02-06 12:43 UTC (permalink / raw)
To: netdev; +Cc: Jeff Kirsher, linville, Nicholas Nunley, nhorman, sassmann
In-Reply-To: <20190206000106.24364-3-jeffrey.t.kirsher@intel.com>
On Tue, Feb 05, 2019 at 04:01:03PM -0800, Jeff Kirsher wrote:
> +static int do_perqueue(struct cmd_context *ctx)
> +{
> + __u32 queue_mask[__KERNEL_DIV_ROUND_UP(MAX_NUM_QUEUE, 32)] = {0};
> + int i, n_queues = 0;
> +
> + if (ctx->argc == 0)
> + exit_bad_args();
> +
> + /*
> + * The sub commands will be applied to
> + * all queues if no queue_mask set
> + */
> + if (strncmp(*ctx->argp, "queue_mask", 10)) {
This would match any string starting with "queue_mask", is it intended?
> + n_queues = find_max_num_queues(ctx);
> + if (n_queues < 0) {
> + perror("Cannot get number of queues");
> + return -EFAULT;
> + }
> + for (i = 0; i < n_queues / 32; i++)
> + queue_mask[i] = ~0;
> + queue_mask[i] = (1 << (n_queues - i * 32)) - 1;
It's unlikely today, I guess, but in theory, this would overflow if
n_queues == MAX_NUM_QUEUE
> + fprintf(stdout,
> + "The sub commands will be applied to all %d queues\n",
> + n_queues);
> + } else {
> + ctx->argc--;
> + ctx->argp++;
> + n_queues = set_queue_mask(queue_mask, *ctx->argp);
> + if (n_queues < 0) {
> + perror("Invalid queue mask");
> + return n_queues;
> + }
> + ctx->argc--;
> + ctx->argp++;
> + }
> +
> + i = find_option(ctx->argc, ctx->argp);
> + if (i < 0)
> + exit_bad_args();
> +
> + /* no sub_command support yet */
> +
> + return 0;
> +}
Michal Kubecek
^ permalink raw reply
* [PATCH net 0/2] fix two kernel panics when disabled IPv6 on boot up
From: Hangbin Liu @ 2019-02-06 12:51 UTC (permalink / raw)
To: netdev; +Cc: Stefano Brivio, David Miller, Hangbin Liu
When disabled IPv6 on boot up, since there is no ipv6 route tables, we should
not call rt6_lookup. Fix them by checking if we have inet6_dev pointer on
netdevice.
Hangbin Liu (2):
geneve: should not call rt6_lookup() when ipv6 was disabled
sit: check if IPv6 enabled before call ip6_err_gen_icmpv6_unreach()
drivers/net/geneve.c | 6 ++++++
net/ipv6/sit.c | 8 +++++++-
2 files changed, 13 insertions(+), 1 deletion(-)
--
2.19.2
^ permalink raw reply
* [PATCH net 1/2] geneve: should not call rt6_lookup() when ipv6 was disabled
From: Hangbin Liu @ 2019-02-06 12:51 UTC (permalink / raw)
To: netdev; +Cc: Stefano Brivio, David Miller, Hangbin Liu
In-Reply-To: <20190206125111.5286-1-liuhangbin@gmail.com>
When we add a new GENEVE device with IPv6 remote, checking only for
IS_ENABLED(CONFIG_IPV6) is not enough as we may disable IPv6 in kernel
cmd(ipv6.disable=1), which will cause a NULL pointer dereference.
Reported-by: Jianlin Shi <jishi@redhat.com>
Signed-off-by: Hangbin Liu <liuhangbin@gmail.com>
---
drivers/net/geneve.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/net/geneve.c b/drivers/net/geneve.c
index 58bbba8582b0..0658715581e3 100644
--- a/drivers/net/geneve.c
+++ b/drivers/net/geneve.c
@@ -1512,6 +1512,10 @@ static void geneve_link_config(struct net_device *dev,
}
#if IS_ENABLED(CONFIG_IPV6)
case AF_INET6: {
+ struct inet6_dev *idev = in6_dev_get(dev);
+ if (!idev)
+ break;
+
struct rt6_info *rt = rt6_lookup(geneve->net,
&info->key.u.ipv6.dst, NULL, 0,
NULL, 0);
@@ -1519,6 +1523,8 @@ static void geneve_link_config(struct net_device *dev,
if (rt && rt->dst.dev)
ldev_mtu = rt->dst.dev->mtu - GENEVE_IPV6_HLEN;
ip6_rt_put(rt);
+
+ in6_dev_put(idev);
break;
}
#endif
--
2.19.2
^ permalink raw reply related
* [PATCH net 2/2] sit: check if IPv6 enabled before call ip6_err_gen_icmpv6_unreach()
From: Hangbin Liu @ 2019-02-06 12:51 UTC (permalink / raw)
To: netdev; +Cc: Stefano Brivio, David Miller, Hangbin Liu
In-Reply-To: <20190206125111.5286-1-liuhangbin@gmail.com>
If we disabled IPv6 from kernel boot up cmd(ipv6.disable=1), we should not
call ip6_err_gen_icmpv6_unreach().
Reproducer:
ip link add sit1 type sit local 10.10.0.1 remote 10.10.1.1 ttl 1
ip link set sit1 up
ip addr add 192.168.0.1/24 dev sit1
ping 192.168.0.2
Reported-by: Jianlin Shi <jishi@redhat.com>
Signed-off-by: Hangbin Liu <liuhangbin@gmail.com>
---
net/ipv6/sit.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/net/ipv6/sit.c b/net/ipv6/sit.c
index 1e03305c0549..e43fbac0fd1a 100644
--- a/net/ipv6/sit.c
+++ b/net/ipv6/sit.c
@@ -493,6 +493,7 @@ static int ipip6_err(struct sk_buff *skb, u32 info)
const int type = icmp_hdr(skb)->type;
const int code = icmp_hdr(skb)->code;
unsigned int data_len = 0;
+ struct inet6_dev *idev;
struct ip_tunnel *t;
int sifindex;
int err;
@@ -546,8 +547,13 @@ static int ipip6_err(struct sk_buff *skb, u32 info)
}
err = 0;
- if (!ip6_err_gen_icmpv6_unreach(skb, iph->ihl * 4, type, data_len))
+
+ idev = in6_dev_get(skb->dev);
+ if (idev &&
+ !ip6_err_gen_icmpv6_unreach(skb, iph->ihl * 4, type, data_len)) {
+ in6_dev_put(idev);
goto out;
+ }
if (t->parms.iph.daddr == 0)
goto out;
--
2.19.2
^ permalink raw reply related
* Re: [net-next, PATCH] net: stmmac: fix ptp timestamping on Rx on gmac4
From: Alexandre Torgue @ 2019-02-06 12:56 UTC (permalink / raw)
To: Ilias Apalodimas; +Cc: peppe.cavallaro, davem, mcoquelin.stm32, netdev, joabreu
In-Reply-To: <1549368920-1989-1-git-send-email-ilias.apalodimas@linaro.org>
Hi Ilias
On 2/5/19 1:15 PM, Ilias Apalodimas wrote:
> The current driver only enables Pdelay_Req and Pdelay_Resp when
> HWTSTAMP_FILTER_PTP_V2_EVENT, HWTSTAMP_FILTER_PTP_V1_L4_EVENT or
> HWTSTAMP_FILTER_PTP_V2_L4_EVENT is requested. This results in ptp sync on
> slave mode to report 'received SYNC without timestamp' when using ptp4l.
>
> Although the hardware can support Sync, Pdelay_Req and Pdelay_resp by
> setting bit14 annd bits 17/16 to 01 this leaves Delay_Req timestamps out.
>
> Fix this by enabling all event and general messages timestamps.
> This includes SYNC, Follow_Up, Delay_Req, Delay_Resp, Pdelay_Req,
> Pdelay_Resp and Pdelay_Resp_Follow_Up messages.
>
> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
For GMAC4 part:
Tested-by: Alexandre TORGUE <alexandre.torgue@st.com>
^ permalink raw reply
* [PATCH net-next] cxgb4: Add new T6 PCI device ids 0x608b
From: Vishal Kulkarni @ 2019-02-06 12:57 UTC (permalink / raw)
To: netdev, davem; +Cc: nirranjan, indranil, dt, Vishal Kulkarni
Signed-off-by: Vishal Kulkarni <vishal@chelsio.com>
---
drivers/net/ethernet/chelsio/cxgb4/t4_pci_id_tbl.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_pci_id_tbl.h b/drivers/net/ethernet/chelsio/cxgb4/t4_pci_id_tbl.h
index bf7325f..0c53734 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/t4_pci_id_tbl.h
+++ b/drivers/net/ethernet/chelsio/cxgb4/t4_pci_id_tbl.h
@@ -218,6 +218,7 @@
CH_PCI_ID_TABLE_FENTRY(0x6088), /* Custom T62100-CR */
CH_PCI_ID_TABLE_FENTRY(0x6089), /* Custom T62100-KR */
CH_PCI_ID_TABLE_FENTRY(0x608a), /* Custom T62100-CR */
+ CH_PCI_ID_TABLE_FENTRY(0x608b), /* Custom T6225-CR */
CH_PCI_DEVICE_ID_TABLE_DEFINE_END;
#endif /* __T4_PCI_ID_TBL_H__ */
--
1.8.3.1
^ permalink raw reply related
* Re: [PATCH RFC RFT net-next 00/10] Modernize mv88e6060 and remove legacy probe
From: Andrew Lunn @ 2019-02-06 12:58 UTC (permalink / raw)
To: Gregory CLEMENT; +Cc: netdev, Vivien Didelot, Florian Fainelli, Pavel Machek
In-Reply-To: <87lg2t6tmt.fsf@FE-laptop>
> I am asking because this week the dt part can be applied to be merged in
> v5.1, whereas next week, it will be doable but as rc6 will be released
> there will be less chance to be accepted.
Hi Gregory
The DT changes can be applied anyway. They just remove disabled
nodes. I will repost that patch today, without the RFC.
Andrew
^ permalink raw reply
* [PATCH net-next] cxgb4: Update 1.22.9.0 as the latest firmware supported.
From: Vishal Kulkarni @ 2019-02-06 13:01 UTC (permalink / raw)
To: netdev, davem; +Cc: nirranjan, indranil, dt, Vishal Kulkarni
Change t4fw_version.h to update latest firmware version
number to 1.22.9.0.
Signed-off-by: Vishal Kulkarni <vishal@chelsio.com>
---
drivers/net/ethernet/chelsio/cxgb4/t4fw_version.h | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4fw_version.h b/drivers/net/ethernet/chelsio/cxgb4/t4fw_version.h
index a844296..9125ddd 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/t4fw_version.h
+++ b/drivers/net/ethernet/chelsio/cxgb4/t4fw_version.h
@@ -36,8 +36,8 @@
#define __T4FW_VERSION_H__
#define T4FW_VERSION_MAJOR 0x01
-#define T4FW_VERSION_MINOR 0x14
-#define T4FW_VERSION_MICRO 0x08
+#define T4FW_VERSION_MINOR 0x16
+#define T4FW_VERSION_MICRO 0x09
#define T4FW_VERSION_BUILD 0x00
#define T4FW_MIN_VERSION_MAJOR 0x01
@@ -45,8 +45,8 @@
#define T4FW_MIN_VERSION_MICRO 0x00
#define T5FW_VERSION_MAJOR 0x01
-#define T5FW_VERSION_MINOR 0x14
-#define T5FW_VERSION_MICRO 0x08
+#define T5FW_VERSION_MINOR 0x16
+#define T5FW_VERSION_MICRO 0x09
#define T5FW_VERSION_BUILD 0x00
#define T5FW_MIN_VERSION_MAJOR 0x00
@@ -54,8 +54,8 @@
#define T5FW_MIN_VERSION_MICRO 0x00
#define T6FW_VERSION_MAJOR 0x01
-#define T6FW_VERSION_MINOR 0x14
-#define T6FW_VERSION_MICRO 0x08
+#define T6FW_VERSION_MINOR 0x16
+#define T6FW_VERSION_MICRO 0x09
#define T6FW_VERSION_BUILD 0x00
#define T6FW_MIN_VERSION_MAJOR 0x00
--
1.8.3.1
^ permalink raw reply related
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