From: "Alexandre Courbot" <acourbot@nvidia.com>
To: "John Hubbard" <jhubbard@nvidia.com>
Cc: "Danilo Krummrich" <dakr@kernel.org>,
"Timur Tabi" <ttabi@nvidia.com>,
"Alistair Popple" <apopple@nvidia.com>,
"Eliot Courtney" <ecourtney@nvidia.com>,
"Shashank Sharma" <shashanks@nvidia.com>,
"Zhi Wang" <zhiw@nvidia.com>, "David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Miguel Ojeda" <ojeda@kernel.org>,
"Alex Gaynor" <alex.gaynor@gmail.com>,
"Boqun Feng" <boqun.feng@gmail.com>,
"Gary Guo" <gary@garyguo.net>,
"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
"Benno Lossin" <lossin@kernel.org>,
"Andreas Hindborg" <a.hindborg@kernel.org>,
"Alice Ryhl" <aliceryhl@google.com>,
"Trevor Gross" <tmgross@umich.edu>,
nova-gpu@lists.linux.dev, LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v12 19/22] gpu: nova-core: Hopper/Blackwell: add FSP Chain of Trust boot
Date: Wed, 03 Jun 2026 14:19:35 +0900 [thread overview]
Message-ID: <DIZ5SYLSQ358.1SIQT8367GRRL@nvidia.com> (raw)
In-Reply-To: <20260602032111.224790-20-jhubbard@nvidia.com>
On Tue Jun 2, 2026 at 12:21 PM JST, John Hubbard wrote:
> Build and send the Chain of Trust message to FSP, bundling the
> DMA-coherent boot parameters that FSP reads at boot time.
>
> Co-developed-by: Alexandre Courbot <acourbot@nvidia.com>
> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
> Signed-off-by: John Hubbard <jhubbard@nvidia.com>
> ---
> drivers/gpu/nova-core/firmware/fsp.rs | 2 -
> drivers/gpu/nova-core/fsp.rs | 140 +++++++++++++++++-
> drivers/gpu/nova-core/fsp/hal.rs | 1 -
> drivers/gpu/nova-core/gsp.rs | 1 +
> drivers/gpu/nova-core/gsp/fw.rs | 64 ++++++++
> .../gpu/nova-core/gsp/fw/r570_144/bindings.rs | 82 ++++++++++
> drivers/gpu/nova-core/gsp/hal/gh100.rs | 23 ++-
> drivers/gpu/nova-core/mctp.rs | 2 -
> 8 files changed, 302 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/nova-core/firmware/fsp.rs b/drivers/gpu/nova-core/firmware/fsp.rs
> index db61905eac9d..938aa3a3bad5 100644
> --- a/drivers/gpu/nova-core/firmware/fsp.rs
> +++ b/drivers/gpu/nova-core/firmware/fsp.rs
> @@ -39,10 +39,8 @@ pub(crate) struct FmcSignatures {
>
> pub(crate) struct FspFirmware {
> /// FMC firmware image data (only the "image" ELF section).
> - #[expect(dead_code)]
> pub(crate) fmc_image: Coherent<[u8]>,
> /// FMC firmware signatures.
> - #[expect(dead_code)]
> pub(crate) fmc_sigs: KBox<FmcSignatures>,
> }
>
> diff --git a/drivers/gpu/nova-core/fsp.rs b/drivers/gpu/nova-core/fsp.rs
> index 67cf83aba83c..352ef7683cf2 100644
> --- a/drivers/gpu/nova-core/fsp.rs
> +++ b/drivers/gpu/nova-core/fsp.rs
> @@ -9,8 +9,14 @@
>
> use kernel::{
> device,
> + dma::Coherent,
> io::poll::read_poll_timeout,
> prelude::*,
> + ptr::{
> + Alignable,
> + Alignment, //
> + },
> + sizes::SZ_2M,
> time::Delta,
> transmute::{
> AsBytes,
> @@ -24,8 +30,13 @@
> fsp::Fsp as FspEngine,
> Falcon, //
> },
> - firmware::fsp::FspFirmware,
> + fb::FbLayout,
> + firmware::fsp::{
> + FmcSignatures,
> + FspFirmware, //
> + },
> gpu::Chipset,
> + gsp::GspFmcBootParams,
> mctp::{
> MctpHeader,
> NvdmHeader,
> @@ -49,6 +60,35 @@ struct NvdmPayloadCommandResponse {
> error_code: u32,
> }
>
> +/// NVDM (NVIDIA Device Management) CoT (Chain of Trust) payload, the main
> +/// message body sent to FSP for Chain of Trust boot.
> +#[repr(C, packed)]
> +#[derive(Clone, Copy)]
> +struct NvdmPayloadCot {
> + version: u16,
> + size: u16,
> + gsp_fmc_sysmem_offset: u64,
> + frts_sysmem_offset: u64,
> + frts_sysmem_size: u32,
> + frts_vidmem_offset: u64,
> + frts_vidmem_size: u32,
> + sigs: FmcSignatures,
> + gsp_boot_args_sysmem_offset: u64,
> +}
> +
> +/// Complete FSP message structure with MCTP and NVDM headers.
> +#[repr(C, packed)]
> +#[derive(Clone, Copy)]
> +struct FspMessage {
> + mctp_header: MctpHeader,
> + nvdm_header: NvdmHeader,
> + cot: NvdmPayloadCot,
> +}
> +
> +// SAFETY: `FspMessage` is `#[repr(C, packed)]` with no padding, so all of its
> +// bytes are initialized.
> +unsafe impl AsBytes for FspMessage {}
> +
> /// Complete FSP response structure with MCTP and NVDM headers.
> #[repr(C, packed)]
> #[derive(Clone, Copy)]
> @@ -70,6 +110,44 @@ pub(crate) trait MessageToFsp: AsBytes {
> const NVDM_TYPE: u32;
This should probably be a `NvdmType`.
> }
>
> +impl MessageToFsp for FspMessage {
> + const NVDM_TYPE: u32 = NvdmType::Cot as u32;
> +}
> +
> +/// Bundled arguments for FMC boot via FSP Chain of Trust.
> +pub(crate) struct FmcBootArgs {
> + chipset: Chipset,
> + fmc_boot_params: Coherent<GspFmcBootParams>,
> + resume: bool,
> +}
> +
> +impl FmcBootArgs {
> + /// Builds FMC boot arguments, allocating the DMA-coherent boot parameter
> + /// structure that FSP will read.
> + pub(crate) fn new(
> + dev: &device::Device<device::Bound>,
> + chipset: Chipset,
> + wpr_meta_addr: u64,
> + libos_addr: u64,
> + resume: bool,
> + ) -> Result<Self> {
> + let init = GspFmcBootParams::new(wpr_meta_addr, libos_addr);
> +
> + Ok(Self {
> + chipset,
> + fmc_boot_params: Coherent::<GspFmcBootParams>::init(dev, GFP_KERNEL, init)?,
> + resume,
> + })
> + }
> +
> + /// DMA address of the FMC boot parameters, needed after boot for lockdown
> + /// release polling.
> + #[expect(dead_code)]
> + pub(crate) fn boot_params_dma_handle(&self) -> u64 {
> + self.fmc_boot_params.dma_handle()
> + }
> +}
> +
> /// FSP interface for Hopper/Blackwell GPUs.
> ///
> /// An `Fsp` is produced by [`Fsp::wait_secure_boot`], which only returns once FSP secure boot
> @@ -77,7 +155,6 @@ pub(crate) trait MessageToFsp: AsBytes {
> /// Chain of Trust boot.
> pub(crate) struct Fsp {
> falcon: Falcon<FspEngine>,
> - #[expect(dead_code)]
> fsp_fw: FspFirmware,
> }
>
> @@ -113,8 +190,65 @@ pub(crate) fn wait_secure_boot(
> Ok(Fsp { falcon, fsp_fw })
> }
>
> + /// Boots GSP FMC via FSP Chain of Trust.
> + ///
> + /// Builds the CoT message from the pre-configured [`FmcBootArgs`], sends it
> + /// to FSP, and waits for the response.
> + pub(crate) fn boot_fmc(
> + &mut self,
> + dev: &device::Device<device::Bound>,
> + bar: &Bar0,
> + fb_layout: &FbLayout,
> + args: &FmcBootArgs,
> + ) -> Result {
> + dev_dbg!(dev, "Starting FSP boot sequence for {}\n", args.chipset);
> +
> + let fmc_addr = self.fsp_fw.fmc_image.dma_handle();
> + let fmc_boot_params_addr = args.fmc_boot_params.dma_handle();
> +
> + // frts_offset is relative to FB end: FRTS_location = FB_END - frts_offset
> + let frts_offset = if !args.resume {
> + let frts_reserved_size = fb_layout.heap.len() + u64::from(fb_layout.pmu_reserved_size);
> +
> + frts_reserved_size
> + .align_up(Alignment::new::<SZ_2M>())
> + .ok_or(EINVAL)?
> + } else {
> + 0
> + };
> + let frts_size: u32 = if !args.resume {
> + fb_layout.frts.len().try_into()?
> + } else {
> + 0
> + };
> +
> + let msg = KBox::new(
> + FspMessage {
We have the same problem as the FSP signatures, this will result in the
`FspMessage` (868 bytes) being created on the stack before being moved
into the `KBox`. And because `FspMessage` is `packed` we cannot use `init!`...
So I guess the only way for now will be to zero-init it and initialize
the fields à la C using `chain`. Let me do that in a constructor.
> + mctp_header: MctpHeader::single_packet(),
> + nvdm_header: NvdmHeader::new(NvdmType::Cot),
> + cot: NvdmPayloadCot {
> + version: hal::fsp_hal(args.chipset).ok_or(ENOTSUPP)?.cot_version(),
> + size: u16::try_from(core::mem::size_of::<NvdmPayloadCot>())
> + .map_err(|_| EINVAL)?,
This can be:
size: num::usize_into_u16::<{ core::mem::size_of::<NvdmPayloadCot>() }>(),
to infer the value at build time and avoid the runtime error check.
next prev parent reply other threads:[~2026-06-03 5:19 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-02 3:20 [PATCH v12 00/22] gpu: nova-core: firmware: Hopper/Blackwell support John Hubbard
2026-06-02 3:20 ` [PATCH v12 01/22] gpu: nova-core: set DMA mask width based on GPU architecture John Hubbard
2026-06-02 6:40 ` Eliot Courtney
2026-06-02 3:20 ` [PATCH v12 02/22] gpu: nova-core: Hopper/Blackwell: new location for PCI config mirror John Hubbard
2026-06-02 3:20 ` [PATCH v12 03/22] gpu: nova-core: Blackwell: compute PMU-reserved framebuffer size John Hubbard
2026-06-02 3:20 ` [PATCH v12 04/22] gpu: nova-core: Hopper/Blackwell: larger non-WPR heap John Hubbard
2026-06-02 3:20 ` [PATCH v12 05/22] gpu: nova-core: Hopper/Blackwell: larger WPR2 (GSP) heap John Hubbard
2026-06-02 3:20 ` [PATCH v12 06/22] gpu: nova-core: Blackwell: use correct sysmem flush registers John Hubbard
2026-06-02 3:30 ` sashiko-bot
2026-06-02 8:00 ` Alexandre Courbot
2026-06-02 7:12 ` Eliot Courtney
2026-06-02 8:26 ` Alexandre Courbot
2026-06-02 3:20 ` [PATCH v12 07/22] gpu: nova-core: don't assume 64-bit firmware images John Hubbard
2026-06-02 3:20 ` [PATCH v12 08/22] gpu: nova-core: add support for 32-bit " John Hubbard
2026-06-02 3:20 ` [PATCH v12 09/22] gpu: nova-core: add auto-detection of 32-bit, 64-bit " John Hubbard
2026-06-02 3:20 ` [PATCH v12 10/22] gpu: nova-core: Hopper/Blackwell: add FSP falcon engine stub John Hubbard
2026-06-02 6:50 ` Eliot Courtney
2026-06-02 3:20 ` [PATCH v12 11/22] gpu: nova-core: Hopper/Blackwell: add FMC firmware image John Hubbard
2026-06-02 7:18 ` Eliot Courtney
2026-06-02 3:21 ` [PATCH v12 12/22] gpu: nova-core: Hopper/Blackwell: add FSP secure boot completion waiting John Hubbard
2026-06-02 7:56 ` Eliot Courtney
2026-06-02 8:22 ` Alexandre Courbot
2026-06-02 3:21 ` [PATCH v12 13/22] gpu: nova-core: Hopper/Blackwell: add FMC signature extraction John Hubbard
2026-06-02 3:32 ` sashiko-bot
2026-06-02 7:56 ` Alexandre Courbot
2026-06-02 8:11 ` Eliot Courtney
2026-06-02 8:28 ` Alexandre Courbot
2026-06-03 0:04 ` Timur Tabi
2026-06-03 0:20 ` Alexandre Courbot
2026-06-03 3:09 ` Timur Tabi
2026-06-03 3:53 ` John Hubbard
2026-06-02 3:21 ` [PATCH v12 14/22] gpu: nova-core: Hopper/Blackwell: add FSP falcon EMEM operations John Hubbard
2026-06-02 11:42 ` Eliot Courtney
2026-06-02 14:55 ` Alexandre Courbot
2026-06-02 15:02 ` Alexandre Courbot
2026-06-02 3:21 ` [PATCH v12 15/22] gpu: nova-core: Hopper/Blackwell: add FSP message infrastructure John Hubbard
2026-06-02 3:33 ` sashiko-bot
2026-06-03 1:14 ` Alexandre Courbot
2026-06-03 1:41 ` Eliot Courtney
2026-06-02 12:21 ` Eliot Courtney
2026-06-03 1:34 ` Alexandre Courbot
2026-06-03 4:49 ` Eliot Courtney
2026-06-03 5:00 ` Alexandre Courbot
2026-06-03 1:00 ` Alexandre Courbot
2026-06-02 3:21 ` [PATCH v12 16/22] gpu: nova-core: add MCTP/NVDM protocol types for firmware communication John Hubbard
2026-06-02 5:36 ` sashiko-bot
2026-06-03 2:41 ` Alexandre Courbot
2026-06-02 12:53 ` Eliot Courtney
2026-06-02 3:21 ` [PATCH v12 17/22] gpu: nova-core: Hopper/Blackwell: add FSP send/receive messaging John Hubbard
2026-06-02 3:35 ` sashiko-bot
2026-06-02 3:21 ` [PATCH v12 18/22] gpu: nova-core: Hopper/Blackwell: select FSP Chain of Trust version John Hubbard
2026-06-02 12:55 ` Eliot Courtney
2026-06-02 3:21 ` [PATCH v12 19/22] gpu: nova-core: Hopper/Blackwell: add FSP Chain of Trust boot John Hubbard
2026-06-02 3:40 ` sashiko-bot
2026-06-03 5:23 ` Alexandre Courbot
2026-06-03 5:19 ` Alexandre Courbot [this message]
2026-06-02 3:21 ` [PATCH v12 20/22] gpu: nova-core: Hopper/Blackwell: add GSP lockdown release polling John Hubbard
2026-06-02 3:38 ` sashiko-bot
2026-06-03 5:45 ` Alexandre Courbot
2026-06-02 3:21 ` [PATCH v12 21/22] gpu: nova-core: add non-sec2 unload path John Hubbard
2026-06-02 3:21 ` [PATCH v12 22/22] gpu: nova-core: gsp: enable FSP boot path John Hubbard
2026-06-02 3:38 ` sashiko-bot
2026-06-02 12:38 ` [PATCH v12 00/22] gpu: nova-core: firmware: Hopper/Blackwell support Danilo Krummrich
2026-06-02 13:37 ` Alexandre Courbot
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