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* [PATCH v2] ntb: ntb_hw_intel: Skylake doorbells should be 32bits, not 64bits
@ 2017-06-08 19:46 Dave Jiang
  2017-06-09 13:51 ` Allen Hubbe
  0 siblings, 1 reply; 3+ messages in thread
From: Dave Jiang @ 2017-06-08 19:46 UTC (permalink / raw)
  To: jdmason; +Cc: linux-ntb, allen.hubbe, ujjal.singh

Fixing doorbell register length to 32bits per spec. On Skylake NTB, the
doorbell registers are 32bit write only registers. The source for the
doorbell is a 64bit register that shows the interrupt bits.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
---

v2: Allen: remove unnecessary change to code.

 drivers/ntb/hw/intel/ntb_hw_intel.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/ntb/hw/intel/ntb_hw_intel.c b/drivers/ntb/hw/intel/ntb_hw_intel.c
index c002384..7b3b6fd 100644
--- a/drivers/ntb/hw/intel/ntb_hw_intel.c
+++ b/drivers/ntb/hw/intel/ntb_hw_intel.c
@@ -2878,7 +2878,7 @@ static const struct intel_ntb_reg skx_reg = {
 	.link_is_up		= xeon_link_is_up,
 	.db_ioread		= skx_db_ioread,
 	.db_iowrite		= skx_db_iowrite,
-	.db_size		= sizeof(u64),
+	.db_size		= sizeof(u32),
 	.ntb_ctl		= SKX_NTBCNTL_OFFSET,
 	.mw_bar			= {2, 4},
 };


^ permalink raw reply related	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2017-06-09 21:08 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2017-06-08 19:46 [PATCH v2] ntb: ntb_hw_intel: Skylake doorbells should be 32bits, not 64bits Dave Jiang
2017-06-09 13:51 ` Allen Hubbe
2017-06-09 21:08   ` Jon Mason

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