* [PATCH 2/2] NTB: Register and offset values fix for memory window
@ 2016-12-01 19:14 Shyam Sundar S K
2016-12-02 2:22 ` Allen Hubbe
0 siblings, 1 reply; 3+ messages in thread
From: Shyam Sundar S K @ 2016-12-01 19:14 UTC (permalink / raw)
To: Yu, Xiangliang
Cc: Allen Hubbe, Jon Mason, Dave Jiang, Shah, Nehal-bakulchandra,
Sen, Pankaj, Agrawal, Nitesh-kumar, Su, Richard (Bin),
Subramaniyan, Ramkumar, linux-ntb
Due to incorrect limit and translation register values, NTB link was
going down when the memory window was setup. Made appropriate changes
as per spec.
Fix limit register values for BAR1, which was overlapping
with the BAR23 address.
Reviewed-by: Sen, Pankaj <Pankaj.Sen@amd.com>
Reviewed-by: Shah, Nehal-bakulchandra <Nehal-bakulchandra.Shah@amd.com>
Acked-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: S-k, Shyam-sundar <Shyam-sundar.S-k@amd.com>
---
drivers/ntb/hw/amd/ntb_hw_amd.c | 14 ++++----------
1 file changed, 4 insertions(+), 10 deletions(-)
diff --git a/drivers/ntb/hw/amd/ntb_hw_amd.c b/drivers/ntb/hw/amd/ntb_hw_amd.c
index 6ccba0d..d59f494 100644
--- a/drivers/ntb/hw/amd/ntb_hw_amd.c
+++ b/drivers/ntb/hw/amd/ntb_hw_amd.c
@@ -138,11 +138,11 @@ static int amd_ntb_mw_set_trans(struct ntb_dev *ntb, int idx,
base_addr = pci_resource_start(ndev->ntb.pdev, bar);
if (bar != 1) {
- xlat_reg = AMD_BAR23XLAT_OFFSET + ((bar - 2) << 3);
- limit_reg = AMD_BAR23LMT_OFFSET + ((bar - 2) << 3);
+ xlat_reg = AMD_BAR23XLAT_OFFSET + ((bar - 2) << 2);
+ limit_reg = AMD_BAR23LMT_OFFSET + ((bar - 2) << 2);
/* Set the limit if supported */
- limit = base_addr + size;
+ limit = size;
/* set and verify setting the translation address */
write64(addr, peer_mmio + xlat_reg);
@@ -164,14 +164,8 @@ static int amd_ntb_mw_set_trans(struct ntb_dev *ntb, int idx,
xlat_reg = AMD_BAR1XLAT_OFFSET;
limit_reg = AMD_BAR1LMT_OFFSET;
- /* split bar addr range must all be 32 bit */
- if (addr & (~0ull << 32))
- return -EINVAL;
- if ((addr + size) & (~0ull << 32))
- return -EINVAL;
-
/* Set the limit if supported */
- limit = base_addr + size;
+ limit = size;
/* set and verify setting the translation address */
write64(addr, peer_mmio + xlat_reg);
--
2.7.4
^ permalink raw reply related [flat|nested] 3+ messages in thread* RE: [PATCH 2/2] NTB: Register and offset values fix for memory window
2016-12-01 19:14 [PATCH 2/2] NTB: Register and offset values fix for memory window Shyam Sundar S K
@ 2016-12-02 2:22 ` Allen Hubbe
2016-12-21 16:58 ` Jon Mason
0 siblings, 1 reply; 3+ messages in thread
From: Allen Hubbe @ 2016-12-02 2:22 UTC (permalink / raw)
To: 'Shyam Sundar S K', 'Yu, Xiangliang'
Cc: 'Jon Mason', 'Dave Jiang',
'Shah, Nehal-bakulchandra', 'Sen, Pankaj',
'Agrawal, Nitesh-kumar', 'Su, Richard (Bin)',
'Subramaniyan, Ramkumar', linux-ntb
From: Shyam Sundar S K
> Due to incorrect limit and translation register values, NTB link was
> going down when the memory window was setup. Made appropriate changes
> as per spec.
>
> Fix limit register values for BAR1, which was overlapping
> with the BAR23 address.
>
> Reviewed-by: Sen, Pankaj <Pankaj.Sen@amd.com>
> Reviewed-by: Shah, Nehal-bakulchandra <Nehal-bakulchandra.Shah@amd.com>
> Acked-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
> Signed-off-by: S-k, Shyam-sundar <Shyam-sundar.S-k@amd.com>
Acked-by: Allen Hubbe <Allen.Hubbe@dell.com>
> ---
> drivers/ntb/hw/amd/ntb_hw_amd.c | 14 ++++----------
> 1 file changed, 4 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/ntb/hw/amd/ntb_hw_amd.c b/drivers/ntb/hw/amd/ntb_hw_amd.c
> index 6ccba0d..d59f494 100644
> --- a/drivers/ntb/hw/amd/ntb_hw_amd.c
> +++ b/drivers/ntb/hw/amd/ntb_hw_amd.c
> @@ -138,11 +138,11 @@ static int amd_ntb_mw_set_trans(struct ntb_dev *ntb, int idx,
> base_addr = pci_resource_start(ndev->ntb.pdev, bar);
>
> if (bar != 1) {
> - xlat_reg = AMD_BAR23XLAT_OFFSET + ((bar - 2) << 3);
> - limit_reg = AMD_BAR23LMT_OFFSET + ((bar - 2) << 3);
> + xlat_reg = AMD_BAR23XLAT_OFFSET + ((bar - 2) << 2);
> + limit_reg = AMD_BAR23LMT_OFFSET + ((bar - 2) << 2);
>
> /* Set the limit if supported */
> - limit = base_addr + size;
> + limit = size;
>
> /* set and verify setting the translation address */
> write64(addr, peer_mmio + xlat_reg);
> @@ -164,14 +164,8 @@ static int amd_ntb_mw_set_trans(struct ntb_dev *ntb, int idx,
> xlat_reg = AMD_BAR1XLAT_OFFSET;
> limit_reg = AMD_BAR1LMT_OFFSET;
>
> - /* split bar addr range must all be 32 bit */
> - if (addr & (~0ull << 32))
> - return -EINVAL;
> - if ((addr + size) & (~0ull << 32))
> - return -EINVAL;
> -
> /* Set the limit if supported */
> - limit = base_addr + size;
> + limit = size;
>
> /* set and verify setting the translation address */
> write64(addr, peer_mmio + xlat_reg);
> --
> 2.7.4
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH 2/2] NTB: Register and offset values fix for memory window
2016-12-02 2:22 ` Allen Hubbe
@ 2016-12-21 16:58 ` Jon Mason
0 siblings, 0 replies; 3+ messages in thread
From: Jon Mason @ 2016-12-21 16:58 UTC (permalink / raw)
To: Allen Hubbe
Cc: 'Shyam Sundar S K', 'Yu, Xiangliang',
'Dave Jiang', 'Shah, Nehal-bakulchandra',
'Sen, Pankaj', 'Agrawal, Nitesh-kumar',
'Su, Richard (Bin)', 'Subramaniyan, Ramkumar',
linux-ntb
On Thu, Dec 01, 2016 at 09:22:37PM -0500, Allen Hubbe wrote:
> From: Shyam Sundar S K
> > Due to incorrect limit and translation register values, NTB link was
> > going down when the memory window was setup. Made appropriate changes
> > as per spec.
> >
> > Fix limit register values for BAR1, which was overlapping
> > with the BAR23 address.
> >
> > Reviewed-by: Sen, Pankaj <Pankaj.Sen@amd.com>
> > Reviewed-by: Shah, Nehal-bakulchandra <Nehal-bakulchandra.Shah@amd.com>
> > Acked-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
> > Signed-off-by: S-k, Shyam-sundar <Shyam-sundar.S-k@amd.com>
>
> Acked-by: Allen Hubbe <Allen.Hubbe@dell.com>
Applied to my NTB branch
Thanks,
Jon
>
> > ---
> > drivers/ntb/hw/amd/ntb_hw_amd.c | 14 ++++----------
> > 1 file changed, 4 insertions(+), 10 deletions(-)
> >
> > diff --git a/drivers/ntb/hw/amd/ntb_hw_amd.c b/drivers/ntb/hw/amd/ntb_hw_amd.c
> > index 6ccba0d..d59f494 100644
> > --- a/drivers/ntb/hw/amd/ntb_hw_amd.c
> > +++ b/drivers/ntb/hw/amd/ntb_hw_amd.c
> > @@ -138,11 +138,11 @@ static int amd_ntb_mw_set_trans(struct ntb_dev *ntb, int idx,
> > base_addr = pci_resource_start(ndev->ntb.pdev, bar);
> >
> > if (bar != 1) {
> > - xlat_reg = AMD_BAR23XLAT_OFFSET + ((bar - 2) << 3);
> > - limit_reg = AMD_BAR23LMT_OFFSET + ((bar - 2) << 3);
> > + xlat_reg = AMD_BAR23XLAT_OFFSET + ((bar - 2) << 2);
> > + limit_reg = AMD_BAR23LMT_OFFSET + ((bar - 2) << 2);
> >
> > /* Set the limit if supported */
> > - limit = base_addr + size;
> > + limit = size;
> >
> > /* set and verify setting the translation address */
> > write64(addr, peer_mmio + xlat_reg);
> > @@ -164,14 +164,8 @@ static int amd_ntb_mw_set_trans(struct ntb_dev *ntb, int idx,
> > xlat_reg = AMD_BAR1XLAT_OFFSET;
> > limit_reg = AMD_BAR1LMT_OFFSET;
> >
> > - /* split bar addr range must all be 32 bit */
> > - if (addr & (~0ull << 32))
> > - return -EINVAL;
> > - if ((addr + size) & (~0ull << 32))
> > - return -EINVAL;
> > -
> > /* Set the limit if supported */
> > - limit = base_addr + size;
> > + limit = size;
> >
> > /* set and verify setting the translation address */
> > write64(addr, peer_mmio + xlat_reg);
> > --
> > 2.7.4
>
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2016-12-21 16:58 UTC | newest]
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2016-12-01 19:14 [PATCH 2/2] NTB: Register and offset values fix for memory window Shyam Sundar S K
2016-12-02 2:22 ` Allen Hubbe
2016-12-21 16:58 ` Jon Mason
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