Re: [OE-core] [PATCH 1/6] riscv tunes: ISA Implementation of RISC-V tune features

[Mark Hatle <mark.hatle@kernel.crashing.org>]

These all seem to be related to the same issue reported by Gyorgy Sarvari.

atomic_4 and atomic_8 functions are not working.

--Mark

On 6/16/25 5:11 AM, Richard Purdie wrote:
> On Sun, 2025-06-15 at 21:29 -0500, Mark Hatle via lists.openembedded.org wrote:
>> From: Mark Hatle <mark.hatle@amd.com>
>>
>> This implements the following base ISAs:
>>
>> * rv32i, rv64i
>> * rv32e, rv64i
>>
>> The following ABIs:
>> * ilp32, ilp32e, ilp32f, ilp32d
>> * lp64, lp64e, lp64f, lp64d
>>
>> The following ISA extension are also implemented:
>> * M - Integer Multiplication and Division Extension
>> * A - Atomic Memory Extension
>> * F - Single-Precision Floating-Point Extension
>> * D - Double-Precision Floating-Point Extension
>> * C - Compressed Extension
>> * B - Bit Manipulation Extension (implies Zba, Zbb, Zbs)
>> * V - Vector Operations Extension
>> * Zicsr - Control and Status Register Access Extension
>> * Zifencei - Instruction-Fetch Fence Extension
>> * Zba - Address bit manipulation extension
>> * Zbb - Basic bit manipulation extension
>> * Zbc - Carry-less multiplication extension
>> * Zbs - Single-bit manipulation extension
>> * Zicbom - Cache-block management extension
>>
>> The existing processors tunes are preserved:
>> * riscv64 (rv64gc)
>> * riscv32 (rv32gc)
>> * riscv64nf (rv64imac_zicsr_zifencei)
>> * riscv32nf (rv32imac_zicsr_zifencei)
>> * riscv64nc (rv64imafd_zicsr_zifencei)
>>
>> Previously defined feature 'big-endian' has been removed as it was not used.
> 
> I tried this (just 1/6) and it caused:
> 
> https://autobuilder.yoctoproject.org/valkyrie/#/builders/58/builds/142
> https://autobuilder.yoctoproject.org/valkyrie/#/builders/45/builds/135
> https://autobuilder.yoctoproject.org/valkyrie/#/builders/56/builds/114
> 
> Cheers,
> 
> Richard