From: Christoph Hellwig <hch@lst.de>
To: openrisc@lists.librecores.org
Subject: [OpenRISC] [PATCH 10/29] c6x: use asm-generic/cacheflush.h
Date: Fri, 15 May 2020 16:36:27 +0200 [thread overview]
Message-ID: <20200515143646.3857579-11-hch@lst.de> (raw)
In-Reply-To: <20200515143646.3857579-1-hch@lst.de>
C6x needs almost no cache flushing routines of its own. Rely on
asm-generic/cacheflush.h for the defaults.
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
arch/c6x/include/asm/cacheflush.h | 19 +------------------
1 file changed, 1 insertion(+), 18 deletions(-)
diff --git a/arch/c6x/include/asm/cacheflush.h b/arch/c6x/include/asm/cacheflush.h
index 4540b40475e6c..10922d528de6d 100644
--- a/arch/c6x/include/asm/cacheflush.h
+++ b/arch/c6x/include/asm/cacheflush.h
@@ -16,21 +16,6 @@
#include <asm/page.h>
#include <asm/string.h>
-/*
- * virtually-indexed cache management (our cache is physically indexed)
- */
-#define flush_cache_all() do {} while (0)
-#define flush_cache_mm(mm) do {} while (0)
-#define flush_cache_dup_mm(mm) do {} while (0)
-#define flush_cache_range(mm, start, end) do {} while (0)
-#define flush_cache_page(vma, vmaddr, pfn) do {} while (0)
-#define flush_cache_vmap(start, end) do {} while (0)
-#define flush_cache_vunmap(start, end) do {} while (0)
-#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
-#define flush_dcache_page(page) do {} while (0)
-#define flush_dcache_mmap_lock(mapping) do {} while (0)
-#define flush_dcache_mmap_unlock(mapping) do {} while (0)
-
/*
* physically-indexed cache management
*/
@@ -49,14 +34,12 @@ do { \
(unsigned long) page_address(page) + PAGE_SIZE)); \
} while (0)
-
#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
do { \
memcpy(dst, src, len); \
flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len)); \
} while (0)
-#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
- memcpy(dst, src, len)
+#include <asm-generic/cacheflush.h>
#endif /* _ASM_C6X_CACHEFLUSH_H */
--
2.26.2
next prev parent reply other threads:[~2020-05-15 14:36 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-15 14:36 [OpenRISC] sort out the flush_icache_range mess v2 Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 01/29] arm: fix the flush_icache_range arguments in set_fiq_handler Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 02/29] nds32: unexport flush_icache_page Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 03/29] powerpc: unexport flush_icache_user_range Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 04/29] unicore32: remove flush_cache_user_range Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 05/29] asm-generic: fix the inclusion guards for cacheflush.h Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 06/29] asm-generic: don't include <linux/mm.h> in cacheflush.h Christoph Hellwig
2020-05-27 4:34 ` [OpenRISC] [PATCH] media: omap3isp: Shuffle cacheflush.h and include mm.h Nathan Chancellor
2020-05-27 5:10 ` Christoph Hellwig
2020-05-27 7:02 ` Geert Uytterhoeven
2020-05-27 8:13 ` Nathan Chancellor
2020-05-27 13:45 ` Laurent Pinchart
2020-05-15 14:36 ` [OpenRISC] [PATCH 07/29] asm-generic: improve the flush_dcache_page stub Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 08/29] alpha: use asm-generic/cacheflush.h Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 09/29] arm64: " Christoph Hellwig
2020-05-22 15:54 ` Catalin Marinas
2020-05-15 14:36 ` Christoph Hellwig [this message]
2020-05-18 18:20 ` [OpenRISC] [PATCH 10/29] c6x: " Mark Salter
2020-05-15 14:36 ` [OpenRISC] [PATCH 11/29] hexagon: " Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 12/29] ia64: " Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 13/29] microblaze: " Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 14/29] m68knommu: " Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 15/29] openrisc: " Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 16/29] powerpc: " Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 17/29] riscv: " Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 18/29] arm, sparc, unicore32: remove flush_icache_user_range Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 19/29] mm: rename flush_icache_user_range to flush_icache_user_page Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 20/29] asm-generic: add a flush_icache_user_range stub Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 21/29] sh: implement flush_icache_user_range Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 22/29] xtensa: " Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 23/29] arm: rename flush_cache_user_range to flush_icache_user_range Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 24/29] m68k: implement flush_icache_user_range Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 25/29] exec: only build read_code when needed Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 26/29] exec: use flush_icache_user_range in read_code Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 27/29] binfmt_flat: use flush_icache_user_range Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 28/29] nommu: use flush_icache_user_range in brk and mmap Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 29/29] module: move the set_fs hack for flush_icache_range to m68k Christoph Hellwig
2020-05-18 13:04 ` Jessica Yu
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