From: Christoph Hellwig <hch@lst.de>
To: openrisc@lists.librecores.org
Subject: [OpenRISC] [PATCH 23/29] arm: rename flush_cache_user_range to flush_icache_user_range
Date: Fri, 15 May 2020 16:36:40 +0200 [thread overview]
Message-ID: <20200515143646.3857579-24-hch@lst.de> (raw)
In-Reply-To: <20200515143646.3857579-1-hch@lst.de>
flush_icache_user_range will be the name for a generic primitive.
Move the arm name so that arm already has an implementation.
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
arch/arm/include/asm/cacheflush.h | 4 ++--
arch/arm/kernel/traps.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index c78e14fcfb5df..2e24e765e6d3a 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -258,11 +258,11 @@ extern void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr
#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
/*
- * flush_cache_user_range is used when we want to ensure that the
+ * flush_icache_user_range is used when we want to ensure that the
* Harvard caches are synchronised for the user space address range.
* This is used for the ARM private sys_cacheflush system call.
*/
-#define flush_cache_user_range(s,e) __cpuc_coherent_user_range(s,e)
+#define flush_icache_user_range(s,e) __cpuc_coherent_user_range(s,e)
/*
* Perform necessary cache operations to ensure that data previously
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 1e70e7227f0ff..316a7687f8133 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -566,7 +566,7 @@ __do_cache_op(unsigned long start, unsigned long end)
if (fatal_signal_pending(current))
return 0;
- ret = flush_cache_user_range(start, start + chunk);
+ ret = flush_icache_user_range(start, start + chunk);
if (ret)
return ret;
--
2.26.2
next prev parent reply other threads:[~2020-05-15 14:36 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-15 14:36 [OpenRISC] sort out the flush_icache_range mess v2 Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 01/29] arm: fix the flush_icache_range arguments in set_fiq_handler Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 02/29] nds32: unexport flush_icache_page Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 03/29] powerpc: unexport flush_icache_user_range Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 04/29] unicore32: remove flush_cache_user_range Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 05/29] asm-generic: fix the inclusion guards for cacheflush.h Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 06/29] asm-generic: don't include <linux/mm.h> in cacheflush.h Christoph Hellwig
2020-05-27 4:34 ` [OpenRISC] [PATCH] media: omap3isp: Shuffle cacheflush.h and include mm.h Nathan Chancellor
2020-05-27 5:10 ` Christoph Hellwig
2020-05-27 7:02 ` Geert Uytterhoeven
2020-05-27 8:13 ` Nathan Chancellor
2020-05-27 13:45 ` Laurent Pinchart
2020-05-15 14:36 ` [OpenRISC] [PATCH 07/29] asm-generic: improve the flush_dcache_page stub Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 08/29] alpha: use asm-generic/cacheflush.h Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 09/29] arm64: " Christoph Hellwig
2020-05-22 15:54 ` Catalin Marinas
2020-05-15 14:36 ` [OpenRISC] [PATCH 10/29] c6x: " Christoph Hellwig
2020-05-18 18:20 ` Mark Salter
2020-05-15 14:36 ` [OpenRISC] [PATCH 11/29] hexagon: " Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 12/29] ia64: " Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 13/29] microblaze: " Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 14/29] m68knommu: " Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 15/29] openrisc: " Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 16/29] powerpc: " Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 17/29] riscv: " Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 18/29] arm, sparc, unicore32: remove flush_icache_user_range Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 19/29] mm: rename flush_icache_user_range to flush_icache_user_page Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 20/29] asm-generic: add a flush_icache_user_range stub Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 21/29] sh: implement flush_icache_user_range Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 22/29] xtensa: " Christoph Hellwig
2020-05-15 14:36 ` Christoph Hellwig [this message]
2020-05-15 14:36 ` [OpenRISC] [PATCH 24/29] m68k: " Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 25/29] exec: only build read_code when needed Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 26/29] exec: use flush_icache_user_range in read_code Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 27/29] binfmt_flat: use flush_icache_user_range Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 28/29] nommu: use flush_icache_user_range in brk and mmap Christoph Hellwig
2020-05-15 14:36 ` [OpenRISC] [PATCH 29/29] module: move the set_fs hack for flush_icache_range to m68k Christoph Hellwig
2020-05-18 13:04 ` Jessica Yu
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