X86 platform drivers
 help / color / mirror / Atom feed
From: "Poosa, Karthik" <karthik.poosa@intel.com>
To: "Michael J. Ruhl" <michael.j.ruhl@intel.com>,
	<platform-driver-x86@vger.kernel.org>,
	<intel-xe@lists.freedesktop.org>, <hansg@kernel.org>,
	<ilpo.jarvinen@linux.intel.com>, <matthew.brost@intel.com>,
	<rodrigo.vivi@intel.com>, <thomas.hellstrom@linux.intel.com>,
	<airlied@gmail.com>, <simona@ffwll.ch>,
	<david.e.box@linux.intel.com>, <anoop.c.vijay@intel.com>,
	<badal.nilawar@intel.com>, <matthew.d.roper@intel.com>,
	<james.ausmus@intel.com>
Subject: Re: [PATCH v4 17/18] drm/xe/vsec: Update PMT internal access
Date: Thu, 3 Sep 2026 11:20:05 +0530	[thread overview]
Message-ID: <4fe43cd3-0feb-4833-ac62-1a40bcb9b417@intel.com> (raw)
In-Reply-To: <20260901192736.626777-37-michael.j.ruhl@intel.com>


On 02-09-2026 00:57, Michael J. Ruhl wrote:
> Current PMT internal access assumes BMG devices.
>
> Use the new PMT GUID API to read the device specific guid.
>
> Minor cleanup for a newly unused parameter (mmio).
>
> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> ---
>   drivers/gpu/drm/xe/xe_debugfs.c | 27 ++++++++++++++-------------
>   drivers/gpu/drm/xe/xe_hwmon.c   | 10 ++++++++--
>   drivers/gpu/drm/xe/xe_pcode.c   | 10 ++++++++--
>   3 files changed, 30 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c
> index b01f1e649b51..f17b993755f3 100644
> --- a/drivers/gpu/drm/xe/xe_debugfs.c
> +++ b/drivers/gpu/drm/xe/xe_debugfs.c
> @@ -5,6 +5,7 @@
>   
>   #include "xe_debugfs.h"
>   
> +#include <linux/array_size.h>
>   #include <linux/bits.h>
>   #include <linux/debugfs.h>
>   #include <linux/fault-inject.h>
> @@ -21,7 +22,6 @@
>   #include "xe_gt_printk.h"
>   #include "xe_guc_ads.h"
>   #include "xe_hw_engine.h"
> -#include "xe_mmio.h"
>   #include "xe_pagefault.h"
>   #include "xe_pcode.h"
>   #include "xe_pm.h"
> @@ -97,16 +97,20 @@ static void xe_fault_inject_debugfs_register(struct xe_device *xe,
>   	}
>   }
>   
> -static void read_residency_counter(struct xe_device *xe, struct xe_mmio *mmio,
> -				   u32 offset, const char *name, struct drm_printer *p)
> +static void read_residency_counter(struct xe_device *xe, u32 offset, const char *name,
> +				   struct drm_printer *p)
>   {
>   	u64 residency = 0;
> -
> +	u32 guid;
>   	int ret;
>   
> -	ret = xe_pmt_telem_read(xe->drm.dev,
> -				xe_mmio_read32(mmio, BMG_PUNIT_TELEMETRY_GUID),
> -				&residency, offset, sizeof(residency));
> +	ret = xe_vsec_get_guid(xe, &guid);
> +	if (ret) {
> +		drm_warn(&xe->drm, "PMT device is not available: %d\n", ret);
> +		return;
> +	}
> +
> +	ret = xe_pmt_telem_read(xe->drm.dev, guid, &residency, offset, sizeof(residency));
>   	if (ret != sizeof(residency)) {
>   		drm_warn(&xe->drm, "%s counter failed to read, ret %d\n", name, ret);
>   		return;
> @@ -245,13 +249,12 @@ static int pcode_info(struct seq_file *m, void *data)
>   static int dgfx_pkg_residencies_show(struct seq_file *m, void *data)
>   {
>   	struct xe_device *xe;
> -	struct xe_mmio *mmio;
>   	struct drm_printer p;
>   
>   	xe = node_to_xe(m->private);
>   	p = drm_seq_file_printer(m);
>   	guard(xe_pm_runtime)(xe);
> -	mmio = xe_root_tile_mmio(xe);
> +
>   	static const struct {
>   		u32 offset;
>   		const char *name;
> @@ -265,7 +268,7 @@ static int dgfx_pkg_residencies_show(struct seq_file *m, void *data)
>   	};
>   
>   	for (int i = 0; i < ARRAY_SIZE(residencies); i++)
> -		read_residency_counter(xe, mmio, residencies[i].offset, residencies[i].name, &p);
> +		read_residency_counter(xe, residencies[i].offset, residencies[i].name, &p);
>   
>   	return 0;
>   }
> @@ -273,13 +276,11 @@ static int dgfx_pkg_residencies_show(struct seq_file *m, void *data)
>   static int dgfx_pcie_link_residencies_show(struct seq_file *m, void *data)
>   {
>   	struct xe_device *xe;
> -	struct xe_mmio *mmio;
>   	struct drm_printer p;
>   
>   	xe = node_to_xe(m->private);
>   	p = drm_seq_file_printer(m);
>   	guard(xe_pm_runtime)(xe);
> -	mmio = xe_root_tile_mmio(xe);
>   
>   	static const struct {
>   		u32 offset;
> @@ -291,7 +292,7 @@ static int dgfx_pcie_link_residencies_show(struct seq_file *m, void *data)
>   	};
>   
>   	for (int i = 0; i < ARRAY_SIZE(residencies); i++)
> -		read_residency_counter(xe, mmio, residencies[i].offset, residencies[i].name, &p);
> +		read_residency_counter(xe, residencies[i].offset, residencies[i].name, &p);
>   
>   	return 0;
>   }
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index b9740224e07f..c44a7d24816d 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -517,9 +517,15 @@ xe_hwmon_energy_get(struct xe_hwmon *hwmon, int channel, long *energy)
>   
>   	if (hwmon->xe->info.platform == XE_BATTLEMAGE) {
>   		u64 pmt_val;
> +		u32 guid;
>   
> -		ret = xe_pmt_telem_read(hwmon->xe->drm.dev,
> -					xe_mmio_read32(mmio, BMG_PUNIT_TELEMETRY_GUID),
> +		ret = xe_vsec_get_guid(hwmon->xe, &guid);
> +		if (ret) {
> +			drm_warn(&hwmon->xe->drm, "PMT device is not available: %d\n", ret);
> +			*energy = 0;
> +			return;
> +		}
> +		ret = xe_pmt_telem_read(hwmon->xe->drm.dev, guid,
>   					&pmt_val, BMG_ENERGY_STATUS_PMT_OFFSET,	sizeof(pmt_val));
>   		if (ret != sizeof(pmt_val)) {
>   			drm_warn(&hwmon->xe->drm, "energy read from pmt failed, ret %d\n", ret);
> diff --git a/drivers/gpu/drm/xe/xe_pcode.c b/drivers/gpu/drm/xe/xe_pcode.c
> index 844d8c6face6..039c23086990 100644
> --- a/drivers/gpu/drm/xe/xe_pcode.c
> +++ b/drivers/gpu/drm/xe/xe_pcode.c
> @@ -365,11 +365,17 @@ ALLOW_ERROR_INJECTION(xe_pcode_probe_early, ERRNO); /* See xe_pci_probe */
>   int xe_get_pcode_version(struct xe_device *xe, struct xe_pcode_version *version)
>   {
>   	int ret = 0;
> +	u32 guid;
>   
>   	guard(xe_pm_runtime)(xe);
>   
> -	ret = xe_pmt_telem_read(xe->drm.dev,
> -				xe_mmio_read32(xe_root_tile_mmio(xe), BMG_PUNIT_TELEMETRY_GUID),
> +	ret = xe_vsec_get_guid(xe, &guid);
> +	if (ret) {
> +		xe_warn(xe, "PMT device is not availalbe: %d\n", ret);
Except this typo, other things looks good.

LGTM

Reviewed-by: Karthik Poosa <karthik.poosa@intel.com>


> +		return ret;
> +	}
> +
> +	ret = xe_pmt_telem_read(xe->drm.dev, guid,
>   				(u64 *)version, PUNIT_VERSION_OFFSET, sizeof(*version));
>   	if (ret != sizeof(*version)) {
>   		xe_warn(xe, "pcode version read from PMT failed, ret %pe\n", ERR_PTR(ret));

  reply	other threads:[~2026-09-03  5:50 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-01 19:27 [PATCH v4 00/18] Crescent Island PMT support Michael J. Ruhl
2026-09-01 19:27 ` [PATCH v4 01/18] platform/x86/intel/pmt: complete pcidev to device update Michael J. Ruhl
2026-09-01 19:27 ` [PATCH v4 02/18] platform/x86/intel/pmt: refactor rmw with a return value Michael J. Ruhl
2026-09-02  9:05   ` Ilpo Järvinen
2026-09-02  9:07   ` Ilpo Järvinen
2026-09-01 19:27 ` [PATCH v4 03/18] platform/x86/intel/pmt: refactor rc " Michael J. Ruhl
2026-09-02  9:08   ` Ilpo Järvinen
2026-09-01 19:27 ` [PATCH v4 04/18] platform/x86/intel/pmt: Add register access callbacks Michael J. Ruhl
2026-09-01 19:27 ` [PATCH v4 05/18] platform/x86/intel/pmt: Add helpers for callback info Michael J. Ruhl
2026-09-02  9:10   ` Ilpo Järvinen
2026-09-01 19:27 ` [PATCH v4 06/18] platform/x86/intel/pmt: Do not remap when using callbacks Michael J. Ruhl
2026-09-02  9:18   ` Ilpo Järvinen
2026-09-01 19:27 ` [PATCH v4 07/18] drm/xe/vsec: Do not register BMG PMT for VF Michael J. Ruhl
2026-09-02 19:06   ` Rodrigo Vivi
2026-09-02 20:47     ` Ruhl, Michael J
2026-09-01 19:27 ` [PATCH v4 08/18] drm/xe/vsec: Correct locking order Michael J. Ruhl
2026-09-02 19:08   ` Rodrigo Vivi
2026-09-02 19:11     ` Matthew Brost
2026-09-01 19:27 ` [PATCH v4 09/18] drm/xe/vsec: Use correct pm state get Michael J. Ruhl
2026-09-02 19:10   ` Rodrigo Vivi
2026-09-01 19:27 ` [PATCH v4 10/18] drm/xe/vsec: Support possible hotplug exit Michael J. Ruhl
2026-09-02 19:15   ` Rodrigo Vivi
2026-09-01 19:27 ` [PATCH v4 11/18] drm/xe/vsec: Support Crescent Island PMT Michael J. Ruhl
2026-09-02 19:16   ` Rodrigo Vivi
2026-09-01 19:27 ` [PATCH v4 12/18] drm/xe/vsec: Refactor BattleMage PMT defines Michael J. Ruhl
2026-09-02 19:18   ` Rodrigo Vivi
2026-09-01 19:27 ` [PATCH v4 13/18] drm/xe/vsec: Crescent Island PMT decode Michael J. Ruhl
2026-09-01 19:27 ` [PATCH v4 14/18] drm/xe/vsec: Crescent Island PMT callbacks Michael J. Ruhl
2026-09-01 19:27 ` [PATCH v4 15/18] drm/xe/vsec: Support late bind fw information Michael J. Ruhl
2026-09-01 19:27 ` [PATCH v4 16/18] drm/xe/vsec: Add PMT GUID internal access Michael J. Ruhl
2026-09-01 19:27 ` [PATCH v4 17/18] drm/xe/vsec: Update PMT " Michael J. Ruhl
2026-09-03  5:50   ` Poosa, Karthik [this message]
2026-09-01 19:27 ` [PATCH v4 18/18] drm/xe/vsec: Refactor platform check Michael J. Ruhl
2026-09-03  5:57   ` Poosa, Karthik

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=4fe43cd3-0feb-4833-ac62-1a40bcb9b417@intel.com \
    --to=karthik.poosa@intel.com \
    --cc=airlied@gmail.com \
    --cc=anoop.c.vijay@intel.com \
    --cc=badal.nilawar@intel.com \
    --cc=david.e.box@linux.intel.com \
    --cc=hansg@kernel.org \
    --cc=ilpo.jarvinen@linux.intel.com \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=james.ausmus@intel.com \
    --cc=matthew.brost@intel.com \
    --cc=matthew.d.roper@intel.com \
    --cc=michael.j.ruhl@intel.com \
    --cc=platform-driver-x86@vger.kernel.org \
    --cc=rodrigo.vivi@intel.com \
    --cc=simona@ffwll.ch \
    --cc=thomas.hellstrom@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox