From: Geert Uytterhoeven <geert+renesas@glider.be>
To: arm-soc <arm@kernel.org>, soc <soc@kernel.org>
Cc: Magnus Damm <magnus.damm@gmail.com>,
linux-arm-kernel@lists.infradead.org,
linux-renesas-soc@vger.kernel.org,
Geert Uytterhoeven <geert+renesas@glider.be>
Subject: [GIT PULL 0/7] Renesas SoC updates for v6.2 (take two)
Date: Fri, 18 Nov 2022 17:44:57 +0100 [thread overview]
Message-ID: <cover.1668788918.git.geert+renesas@glider.be> (raw)
Hi SoC folks,
This is my second pull request for the inclusion of Renesas SoC updates
for v6.2, and the first one including support for an SoC with a RISC-V
CPU core (and including no changes for SoCs with arm32 CPU cores).
It consists of 7 parts:
[GIT PULL 1/7] Renesas ARM defconfig updates for v6.2
- Enable support for Renesas R-Car S4-8 Spider Ethernet devices in the
arm64 defconfig.
[GIT PULL 2/7] Renesas ARM DT updates for v6.2 (take two)
- Timer (TMU and CMT) and quad Cortex-A76 CPU topology support for
the R-Car V4H SoC,
- Watchdog, L2 cache, and system controller support for the RZ/V2M
SoC on the RZ/V2M Evaluation Kit 2.0,
- Ethernet Switch and SERDES supports for the R-Car S4-8 SoC and the
Spider development board,
- Miscellaneous fixes and improvements.
[GIT PULL 3/7] Renesas driver updates for v6.2 (take two)
- Add support for identifying the SoC revision on RZ/V2M.
[GIT PULL 4/7] Renesas DT binding updates for v6.2 (take two)
- Document support for the Andes Technology AX45MP RISC-V CPU Core, as
used on the Renesas RZ/Five SoC,
- Document support for the Renesas RZ/V2M System Configuration.
[GIT PULL 5/7] Renesas RISC-V defconfig updates for v6.2
- Enable support for the Renesas RZ/Five SoC and the RZ/Five SMARC EVK
board in the risc-v defconfig.
[GIT PULL 6/7] Renesas RISC-V DT updates for v6.2
- Add initial support for the Renesas RZ/Five SoC and the Renesas
RZ/Five SMARC EVK development board.
[GIT PULL 7/7] Renesas RISC-V SoC updates for v6.2
- Add Kconfig option for Renesas RISC-V SoCs.
Thanks for pulling!
P.S. I'm wondering if I should reduce the number of branches?
Probably it would make sense to (at least) use a single branch for
the DTS changes, as the RZ/Five DTS files share base SoC and board
DTS with RZ/G2UL through #include <arm64/renesas/...>.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
next reply other threads:[~2022-11-18 16:45 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-18 16:44 Geert Uytterhoeven [this message]
2022-11-18 16:44 ` [GIT PULL 1/7] Renesas ARM defconfig updates for v6.2 Geert Uytterhoeven
2022-11-18 16:44 ` [GIT PULL 2/7] Renesas ARM DT updates for v6.2 (take two) Geert Uytterhoeven
2022-11-18 16:45 ` [GIT PULL 3/7] Renesas driver " Geert Uytterhoeven
2022-11-18 16:45 ` [GIT PULL 4/7] Renesas DT binding " Geert Uytterhoeven
2022-11-18 16:45 ` [GIT PULL 5/7] Renesas RISC-V defconfig updates for v6.2 Geert Uytterhoeven
2022-11-18 16:45 ` [GIT PULL 6/7] Renesas RISC-V DT " Geert Uytterhoeven
2022-11-18 16:45 ` [GIT PULL 7/7] Renesas RISC-V SoC " Geert Uytterhoeven
2022-11-21 14:52 ` [GIT PULL 0/7] Renesas SoC updates for v6.2 (take two) patchwork-bot+linux-soc
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